common/cnxk: fix link cfg for sdp

Message ID 20240227185519.7711-1-hkalra@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series common/cnxk: fix link cfg for sdp |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/intel-Functional success Functional PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS

Commit Message

Harman Kalra Feb. 27, 2024, 6:55 p.m. UTC
  Link configure registers are invalid and should not be accessed
for SDP ports. But while on txq release which does SQ flush calls
backpressure disable API which configures these link registers.

Fixes: 58debb813a8d ("common/cnxk: enable TM to listen on Rx pause frames")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
 drivers/common/cnxk/roc_nix_tm.c | 3 +++
 1 file changed, 3 insertions(+)
  

Comments

Jerin Jacob March 1, 2024, 12:44 p.m. UTC | #1
On Wed, Feb 28, 2024 at 12:25 AM Harman Kalra <hkalra@marvell.com> wrote:
>
> Link configure registers are invalid and should not be accessed
> for SDP ports. But while on txq release which does SQ flush calls
> backpressure disable API which configures these link registers.
>
> Fixes: 58debb813a8d ("common/cnxk: enable TM to listen on Rx pause frames")
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>

Updated the git commit as follows and applied to
dpdk-next-net-mrvl/for-main. Thanks


    common/cnxk: fix link config for SDP

    Link configure registers are invalid and should not be accessed
    for SDP ports. But while on Txq release which does SQ flush calls
    back pressure disable API which configures these link registers.

    Fixes: 58debb813a8d ("common/cnxk: enable TM to listen on Rx pause frames")
    Cc: stable@dpdk.org

    Signed-off-by: Harman Kalra <hkalra@marvell.com>
  

Patch

diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index 6a61e448a1..4e6a28f827 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -328,6 +328,9 @@  nix_tm_bp_config_set(struct roc_nix *roc_nix, uint16_t sq, uint16_t tc,
 	uint8_t k = 0;
 	int rc = 0, i;
 
+	if (roc_nix_is_sdp(roc_nix))
+		return 0;
+
 	sq_s = nix->sqs[sq];
 	if (!sq_s)
 		return -ENOENT;