@@ -429,6 +429,7 @@ static const struct eth_dev_ops nfp_net_eth_dev_ops = {
.udp_tunnel_port_del = nfp_udp_tunnel_port_del,
.fw_version_get = nfp_net_firmware_version_get,
.flow_ctrl_get = nfp_net_flow_ctrl_get,
+ .flow_ctrl_set = nfp_net_flow_ctrl_set,
};
static inline void
@@ -2114,3 +2114,78 @@ nfp_net_flow_ctrl_get(struct rte_eth_dev *dev,
return 0;
}
+
+static int
+nfp_net_pause_frame_set(struct nfp_net_hw *net_hw,
+ struct nfp_eth_table_port *eth_port,
+ enum rte_eth_fc_mode mode)
+{
+ int err;
+ bool flag;
+ struct nfp_nsp *nsp;
+
+ nsp = nfp_eth_config_start(net_hw->cpp, eth_port->index);
+ if (nsp == NULL) {
+ PMD_DRV_LOG(ERR, "NFP error when obtaining NSP handle.");
+ return -EIO;
+ }
+
+ flag = (mode & RTE_ETH_FC_TX_PAUSE) == 0 ? false : true;
+ err = nfp_eth_set_tx_pause(nsp, flag);
+ if (err != 0) {
+ PMD_DRV_LOG(ERR, "Failed to configure TX pause frame.");
+ nfp_eth_config_cleanup_end(nsp);
+ return err;
+ }
+
+ flag = (mode & RTE_ETH_FC_RX_PAUSE) == 0 ? false : true;
+ err = nfp_eth_set_rx_pause(nsp, flag);
+ if (err != 0) {
+ PMD_DRV_LOG(ERR, "Failed to configure RX pause frame.");
+ nfp_eth_config_cleanup_end(nsp);
+ return err;
+ }
+
+ err = nfp_eth_config_commit_end(nsp);
+ if (err != 0) {
+ PMD_DRV_LOG(ERR, "Failed to configure pause frame.");
+ return err;
+ }
+
+ return 0;
+}
+
+int
+nfp_net_flow_ctrl_set(struct rte_eth_dev *dev,
+ struct rte_eth_fc_conf *fc_conf)
+{
+ int ret;
+ struct nfp_net_hw *net_hw;
+ enum rte_eth_fc_mode set_mode;
+ enum rte_eth_fc_mode original_mode;
+ struct nfp_eth_table *nfp_eth_table;
+ struct nfp_eth_table_port *eth_port;
+
+ net_hw = nfp_net_get_hw(dev);
+ if (net_hw->pf_dev == NULL)
+ return -EINVAL;
+
+ nfp_eth_table = net_hw->pf_dev->nfp_eth_table;
+ eth_port = &nfp_eth_table->ports[net_hw->idx];
+
+ original_mode = nfp_net_get_pause_mode(eth_port);
+ set_mode = fc_conf->mode;
+
+ if (set_mode == original_mode)
+ return 0;
+
+ ret = nfp_net_pause_frame_set(net_hw, eth_port, set_mode);
+ if (ret != 0)
+ return ret;
+
+ /* Update eth_table after modifying RX/TX pause frame mode. */
+ eth_port->tx_pause_enabled = (set_mode & RTE_ETH_FC_TX_PAUSE) == 0 ? false : true;
+ eth_port->rx_pause_enabled = (set_mode & RTE_ETH_FC_RX_PAUSE) == 0 ? false : true;
+
+ return 0;
+}
@@ -240,6 +240,8 @@ struct nfp_net_hw *nfp_net_get_hw(const struct rte_eth_dev *dev);
int nfp_net_stop(struct rte_eth_dev *dev);
int nfp_net_flow_ctrl_get(struct rte_eth_dev *dev,
struct rte_eth_fc_conf *fc_conf);
+int nfp_net_flow_ctrl_set(struct rte_eth_dev *dev,
+ struct rte_eth_fc_conf *fc_conf);
#define NFP_PRIV_TO_APP_FW_NIC(app_fw_priv)\
((struct nfp_app_fw_nic *)app_fw_priv)
@@ -189,6 +189,8 @@ void nfp_eth_config_cleanup_end(struct nfp_nsp *nsp);
int nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode);
int nfp_eth_set_speed(struct nfp_nsp *nsp, uint32_t speed);
int nfp_eth_set_split(struct nfp_nsp *nsp, uint32_t lanes);
+int nfp_eth_set_tx_pause(struct nfp_nsp *nsp, bool tx_pause);
+int nfp_eth_set_rx_pause(struct nfp_nsp *nsp, bool rx_pause);
/* NSP static information */
struct nfp_nsp_identify {
@@ -44,6 +44,8 @@
#define NSP_ETH_CTRL_SET_LANES RTE_BIT64(5)
#define NSP_ETH_CTRL_SET_ANEG RTE_BIT64(6)
#define NSP_ETH_CTRL_SET_FEC RTE_BIT64(7)
+#define NSP_ETH_CTRL_SET_TX_PAUSE RTE_BIT64(10)
+#define NSP_ETH_CTRL_SET_RX_PAUSE RTE_BIT64(11)
/* Which connector port. */
#define PORT_TP 0x00
@@ -519,7 +521,7 @@ nfp_eth_set_bit_config(struct nfp_nsp *nsp,
uint32_t raw_idx,
const uint64_t mask,
const uint32_t shift,
- uint32_t val,
+ uint64_t val,
const uint64_t ctrl_bit)
{
uint64_t reg;
@@ -683,3 +685,51 @@ nfp_eth_set_split(struct nfp_nsp *nsp,
return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_PORT,
NSP_ETH_PORT_LANES, lanes, NSP_ETH_CTRL_SET_LANES);
}
+
+/**
+ * Set TX pause switch.
+ *
+ * @param nsp
+ * NFP NSP handle returned from nfp_eth_config_start()
+ * @param tx_pause
+ * TX pause switch
+ *
+ * @return
+ * 0 or -ERRNO
+ */
+int
+nfp_eth_set_tx_pause(struct nfp_nsp *nsp,
+ bool tx_pause)
+{
+ if (nfp_nsp_get_abi_ver_minor(nsp) < 37) {
+ PMD_DRV_LOG(ERR, "Set frame pause operation not supported, please update flash.");
+ return -EOPNOTSUPP;
+ }
+
+ return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,
+ NSP_ETH_STATE_TX_PAUSE, tx_pause, NSP_ETH_CTRL_SET_TX_PAUSE);
+}
+
+/**
+ * Set RX pause switch.
+ *
+ * @param nsp
+ * NFP NSP handle returned from nfp_eth_config_start()
+ * @param rx_pause
+ * RX pause switch
+ *
+ * @return
+ * 0 or -ERRNO
+ */
+int
+nfp_eth_set_rx_pause(struct nfp_nsp *nsp,
+ bool rx_pause)
+{
+ if (nfp_nsp_get_abi_ver_minor(nsp) < 37) {
+ PMD_DRV_LOG(ERR, "Set frame pause operation not supported, please update flash.");
+ return -EOPNOTSUPP;
+ }
+
+ return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE,
+ NSP_ETH_STATE_RX_PAUSE, rx_pause, NSP_ETH_CTRL_SET_RX_PAUSE);
+}