diff mbox series

[v2,11/16] net/mlx5: fix modify field expansion for raw DECAP / ENCAP

Message ID 20231016184235.200427-11-getelson@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: support indirect list actions |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Gregory Etelson Oct. 16, 2023, 6:42 p.m. UTC 
  Flow actions in HWS actions template must be arranged according to
pre-defined order.

MLX5 PMD handles RAW_DECAP / RAW_ENCAP actions sequence as a single
RAW ENCAP or DECAP flow action.

When the PMD scanned flow actions to locate position where
MODIFY_FIELD action could be inserted it processed the
RAW_DECAP / RAW_ENCAP sequence as 2 separate actions. As the result
location selection was wrong.

The patch fixes RAW_DECAP / RAW_ENCAP sequence processing for
MODIFY_FIELD expansion.

Fixes: cf7f458 ("net/mlx5: add indirect QUOTA create/query/modify")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 36 +++++++++++++++++++++++++++++++--
 1 file changed, 34 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index efb2d512b7..7b060442ac 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -4283,6 +4283,28 @@  flow_hw_validate_action_raw_encap(struct rte_eth_dev *dev __rte_unused,
 	return 0;
 }
 
+/**
+ * Process `... / raw_decap / raw_encap / ...` actions sequence.
+ * The PMD handles the sequence as a single encap or decap reformat action,
+ * depending on the raw_encap configuration.
+ *
+ * The function assumes that the sequence location in actions template list
+ * complies with relative HWS actions order for the required reformat.
+ */
+static uint64_t
+mlx5_decap_encap_reformat_type(const struct rte_flow_action *actions,
+			       uint32_t encap_ind, uint64_t flags)
+{
+	const struct rte_flow_action_raw_encap *encap = actions[encap_ind].conf;
+
+	if ((flags & MLX5_FLOW_ACTION_DECAP) == 0)
+		return MLX5_FLOW_ACTION_ENCAP;
+	if (actions[encap_ind - 1].type != RTE_FLOW_ACTION_TYPE_RAW_DECAP)
+		return MLX5_FLOW_ACTION_ENCAP;
+	return encap->size >= MLX5_ENCAPSULATION_DECISION_SIZE ?
+	       MLX5_FLOW_ACTION_ENCAP : MLX5_FLOW_ACTION_DECAP;
+}
+
 static inline uint16_t
 flow_hw_template_expand_modify_field(struct rte_flow_action actions[],
 				     struct rte_flow_action masks[],
@@ -4320,13 +4342,13 @@  flow_hw_template_expand_modify_field(struct rte_flow_action actions[],
 	 */
 	for (i = act_num - 2; (int)i >= 0; i--) {
 		enum rte_flow_action_type type = actions[i].type;
+		uint64_t reformat_type;
 
 		if (type == RTE_FLOW_ACTION_TYPE_INDIRECT)
 			type = masks[i].type;
 		switch (type) {
 		case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
 		case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
-		case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
 		case RTE_FLOW_ACTION_TYPE_DROP:
 		case RTE_FLOW_ACTION_TYPE_SEND_TO_KERNEL:
 		case RTE_FLOW_ACTION_TYPE_JUMP:
@@ -4337,10 +4359,20 @@  flow_hw_template_expand_modify_field(struct rte_flow_action actions[],
 		case RTE_FLOW_ACTION_TYPE_VOID:
 		case RTE_FLOW_ACTION_TYPE_END:
 			break;
+		case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
+			reformat_type =
+				mlx5_decap_encap_reformat_type(actions, i,
+							       flags);
+			if (reformat_type == MLX5_FLOW_ACTION_DECAP) {
+				i++;
+				goto insert;
+			}
+			if (flags & MLX5_FLOW_ACTION_DECAP)
+				i--;
+			break;
 		default:
 			i++; /* new MF inserted AFTER actions[i] */
 			goto insert;
-			break;
 		}
 	}
 	i = 0;