[v6,1/3] eal: add x86 cpuid support for monitorx

Message ID 20231009140546.862553-1-sivaprasad.tummala@amd.com (mailing list archive)
State Accepted, archived
Delegated to: David Marchand
Headers
Series [v6,1/3] eal: add x86 cpuid support for monitorx |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Sivaprasad Tummala Oct. 9, 2023, 2:05 p.m. UTC
  Add a new CPUID flag to indicate support for monitorx instruction
on AMD EPYC processors.

Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
 lib/eal/x86/include/rte_cpuflags.h | 1 +
 lib/eal/x86/rte_cpuflags.c         | 3 +++
 2 files changed, 4 insertions(+)
  

Comments

Patrick Robb Oct. 9, 2023, 4:23 p.m. UTC | #1
Recheck-request: iol-unit-amd64-testing

Failed for service_autotest on windows. I'm doing a retest to see if it's
reproducible.
  
David Marchand Oct. 10, 2023, 8:21 a.m. UTC | #2
On Mon, Oct 9, 2023 at 6:24 PM Patrick Robb <probb@iol.unh.edu> wrote:
>
> Recheck-request: iol-unit-amd64-testing
>
> Failed for service_autotest on windows. I'm doing a retest to see if it's reproducible.

Thanks for checking.
This unit test has never been entirely reliable... I see the rerun was fine.
I'll go ahead with this series.
  

Patch

diff --git a/lib/eal/x86/include/rte_cpuflags.h b/lib/eal/x86/include/rte_cpuflags.h
index d95bf33a16..1ee00e70fe 100644
--- a/lib/eal/x86/include/rte_cpuflags.h
+++ b/lib/eal/x86/include/rte_cpuflags.h
@@ -133,6 +133,7 @@  enum rte_cpu_flag_t {
 	RTE_CPUFLAG_AVX512VP2INTERSECT,     /**< AVX512 Two Register Intersection */
 
 	RTE_CPUFLAG_WAITPKG,                /**< UMONITOR/UMWAIT/TPAUSE */
+	RTE_CPUFLAG_MONITORX,               /**< MONITORX */
 };
 
 #include "generic/rte_cpuflags.h"
diff --git a/lib/eal/x86/rte_cpuflags.c b/lib/eal/x86/rte_cpuflags.c
index 3fb1cb9bab..26163ab746 100644
--- a/lib/eal/x86/rte_cpuflags.c
+++ b/lib/eal/x86/rte_cpuflags.c
@@ -133,6 +133,7 @@  const struct feature_entry rte_cpu_feature_table[] = {
 
 	FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX,  0)
 	FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX,  4)
+	FEAT_DEF(MONITORX, 0x80000001, 0, RTE_REG_ECX,  29)
 
 	FEAT_DEF(SYSCALL, 0x80000001, 0, RTE_REG_EDX, 11)
 	FEAT_DEF(XD, 0x80000001, 0, RTE_REG_EDX, 20)
@@ -195,5 +196,7 @@  rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)
 		intrinsics->power_pause = 1;
 		if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_RTM))
 			intrinsics->power_monitor_multi = 1;
+	} else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_MONITORX)) {
+		intrinsics->power_monitor = 1;
 	}
 }