@@ -13,6 +13,7 @@
#include "sssnic_mbox.h"
#include "sssnic_ctrlq.h"
#include "sssnic_api.h"
+#include "sssnic_misc.h"
int
sssnic_msix_attr_get(struct sssnic_hw *hw, uint16_t msix_idx,
@@ -497,3 +498,510 @@ sssnic_rxq_flush(struct sssnic_hw *hw, uint16_t qid)
return 0;
}
+
+static int
+sssnic_rxtx_size_set(struct sssnic_hw *hw, uint16_t rx_size, uint16_t tx_size,
+ uint32_t flags)
+{
+ int ret;
+ struct sssnic_rxtx_size_set_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ if (hw == NULL)
+ return -EINVAL;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.rx_size = rx_size;
+ cmd.tx_size = tx_size;
+ cmd.flags = flags;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len,
+ SSSNIC_SET_PORT_RXTX_SIZE_CMD, SSSNIC_MPU_FUNC_IDX,
+ SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_SET_PORT_RXTX_SIZE_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_rxtx_max_size_init(struct sssnic_hw *hw, uint16_t rx_size,
+ uint16_t tx_size)
+{
+ return sssnic_rxtx_size_set(hw, rx_size, tx_size,
+ SSSNIC_CMD_INIT_RXTX_SIZE_FLAG | SSSNIC_CMD_SET_RX_SIZE_FLAG |
+ SSSNIC_CMD_SET_TX_SIZE_FLAG);
+}
+
+int
+sssnic_tx_max_size_set(struct sssnic_hw *hw, uint16_t tx_size)
+{
+ return sssnic_rxtx_size_set(hw, 0, tx_size,
+ SSSNIC_CMD_SET_TX_SIZE_FLAG);
+}
+
+int
+sssnic_port_features_get(struct sssnic_hw *hw, uint64_t *features)
+{
+ int ret;
+ struct sssnic_port_feature_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.opcode = SSSNIC_CMD_OPCODE_GET;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len, SSSNIC_PORT_FEATURE_CMD,
+ SSSNIC_MPU_FUNC_IDX, SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_PORT_FEATURE_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ *features = cmd.features;
+
+ return 0;
+}
+
+int
+sssnic_port_features_set(struct sssnic_hw *hw, uint64_t features)
+{
+ int ret;
+ struct sssnic_port_feature_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.features = features;
+ cmd.opcode = SSSNIC_CMD_OPCODE_SET;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len, SSSNIC_PORT_FEATURE_CMD,
+ SSSNIC_MPU_FUNC_IDX, SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_PORT_FEATURE_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+#define SSSNIC_MAX_NUM_RXTXQ_CTX_SET_IN_BULK \
+ ((SSSNIC_CTRLQ_MAX_CMD_DATA_LEN - SSSNIC_RXTXQ_CTX_CMD_INFO_LEN) / \
+ SSSNIC_RXTXQ_CTX_SIZE)
+
+static int
+sssnic_rxtxq_ctx_set(struct sssnic_hw *hw, struct sssnic_rxtxq_ctx *q_ctx,
+ uint16_t q_start, enum sssnic_rxtxq_ctx_type type, uint16_t count)
+{
+ struct sssnic_ctrlq_cmd *cmd;
+ struct sssnic_rxtxq_ctx_cmd *data;
+ struct sssnic_rxtxq_ctx *ctx;
+ uint32_t num, i;
+ uint32_t max_num;
+ struct sssnic_rxtxq_ctx_cmd_info cmd_info;
+ int ret = 0;
+
+ cmd = sssnic_ctrlq_cmd_alloc(hw);
+ if (cmd == NULL) {
+ PMD_DRV_LOG(ERR, "Failed to alloc ctrlq command");
+ return -ENOMEM;
+ }
+
+ data = cmd->data;
+ ctx = (struct sssnic_rxtxq_ctx *)(data + 1);
+ max_num = SSSNIC_MAX_NUM_RXTXQ_CTX_SET_IN_BULK;
+
+ while (count > 0) {
+ num = RTE_MIN(count, max_num);
+
+ cmd_info.q_count = num;
+ cmd_info.q_type = type;
+ cmd_info.q_start = q_start;
+ cmd_info.resvd0 = 0;
+ sssnic_mem_cpu_to_be_32(&cmd_info, &data->info,
+ sizeof(struct sssnic_rxtxq_ctx_cmd_info));
+
+ for (i = 0; i < num; i++)
+ sssnic_mem_cpu_to_be_32(q_ctx + i, ctx + i,
+ SSSNIC_RXTXQ_CTX_SIZE);
+
+ cmd->data_len = sizeof(struct sssnic_rxtxq_ctx_cmd_info) +
+ (SSSNIC_RXTXQ_CTX_SIZE * num);
+ cmd->module = SSSNIC_LAN_MODULE;
+ cmd->cmd = SSSNIC_SET_RXTXQ_CTX_CMD;
+
+ rte_wmb();
+
+ ret = sssnic_ctrlq_cmd_exec(hw, cmd, 0);
+ if (ret != 0 || cmd->result != 0) {
+ PMD_DRV_LOG(ERR,
+ "Failed to execulte ctrlq command %s, ret=%d, result=%" PRIu64,
+ "SSSNIC_SET_RXTXQ_CTX_CMD", ret, cmd->result);
+ ret = -EIO;
+ goto out;
+ }
+
+ count -= num;
+ q_ctx += num;
+ q_start += num;
+ }
+
+out:
+ sssnic_ctrlq_cmd_destroy(hw, cmd);
+ return ret;
+}
+
+int
+sssnic_txq_ctx_set(struct sssnic_hw *hw, struct sssnic_txq_ctx *ctx,
+ uint16_t qstart, uint16_t count)
+{
+ return sssnic_rxtxq_ctx_set(hw, (struct sssnic_rxtxq_ctx *)ctx, qstart,
+ SSSNIC_TXQ_CTX, count);
+}
+
+int
+sssnic_rxq_ctx_set(struct sssnic_hw *hw, struct sssnic_rxq_ctx *ctx,
+ uint16_t qstart, uint16_t count)
+{
+ return sssnic_rxtxq_ctx_set(hw, (struct sssnic_rxtxq_ctx *)ctx, qstart,
+ SSSNIC_RXQ_CTX, count);
+}
+
+static int
+sssnic_offload_ctx_reset(struct sssnic_hw *hw, uint16_t q_start,
+ enum sssnic_rxtxq_ctx_type q_type, uint16_t count)
+{
+ struct sssnic_ctrlq_cmd cmd;
+ struct sssnic_offload_ctx_reset_cmd data;
+ int ret;
+
+ memset(&cmd, 0, sizeof(cmd));
+ memset(&data, 0, sizeof(data));
+
+ data.info.q_count = count;
+ data.info.q_start = q_start;
+ data.info.q_type = q_type;
+
+ cmd.data = &data;
+ cmd.module = SSSNIC_LAN_MODULE;
+ cmd.data_len = sizeof(data);
+ cmd.cmd = SSSNIC_RESET_OFFLOAD_CTX_CMD;
+
+ sssnic_mem_cpu_to_be_32(&data, &data, sizeof(data));
+
+ ret = sssnic_ctrlq_cmd_exec(hw, &cmd, 0);
+ if (ret != 0 || cmd.result != 0) {
+ PMD_DRV_LOG(ERR,
+ "Failed to execulte ctrlq command %s, ret=%d, result=%" PRIu64,
+ "SSSNIC_RESET_OFFLOAD_CTX_CMD", ret, cmd.result);
+
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_rx_offload_ctx_reset(struct sssnic_hw *hw)
+{
+ return sssnic_offload_ctx_reset(hw, 0, SSSNIC_RXQ_CTX,
+ SSSNIC_MAX_NUM_RXQ(hw));
+}
+
+int
+sssnic_tx_offload_ctx_reset(struct sssnic_hw *hw)
+{
+ return sssnic_offload_ctx_reset(hw, 0, SSSNIC_TXQ_CTX,
+ SSSNIC_MAX_NUM_TXQ(hw));
+}
+
+int
+sssnic_rxtx_ctx_set(struct sssnic_hw *hw, bool lro_en, uint16_t rxq_depth,
+ uint16_t rx_buf, uint16_t txq_depth)
+{
+ int ret;
+ struct sssnic_msg msg;
+ struct sssnic_root_ctx_cmd cmd;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.func_id = SSSNIC_FUNC_IDX(hw);
+ cmd.lro_enable = lro_en ? 1 : 0;
+ cmd.rx_buf = rx_buf;
+ cmd.rxq_depth = (uint16_t)rte_log2_u32(rxq_depth);
+ cmd.txq_depth = (uint16_t)rte_log2_u32(txq_depth);
+ cmd_len = sizeof(cmd);
+
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len, SSSNIC_SET_ROOT_CTX_CMD,
+ SSSNIC_MPU_FUNC_IDX, SSSNIC_COMM_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SET_ROOT_CTX_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_port_tx_ci_attr_set(struct sssnic_hw *hw, uint16_t tx_qid,
+ uint8_t pending_limit, uint8_t coalescing_time, uint64_t dma_addr)
+{
+ int ret;
+ struct sssnic_port_tx_ci_attr_set_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.coalescing_time = coalescing_time;
+ cmd.pending_limit = pending_limit;
+ cmd.qid = tx_qid;
+ cmd.dma_addr = dma_addr >> 2;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len,
+ SSSNIC_SET_PORT_TX_CI_ATTR_CMD, SSSNIC_MPU_FUNC_IDX,
+ SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_SET_PORT_TX_CI_ATTR_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_port_rx_mode_set(struct sssnic_hw *hw, uint32_t mode)
+{
+ int ret;
+ struct sssnic_port_rx_mode_set_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.mode = mode;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len,
+ SSSNIC_SET_PORT_RX_MODE_CMD, SSSNIC_MPU_FUNC_IDX,
+ SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_SET_PORT_RX_MODE_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_lro_enable_set(struct sssnic_hw *hw, bool ipv4_en, bool ipv6_en,
+ uint8_t nb_lro_bufs)
+{
+ int ret;
+ struct sssnic_lro_cfg_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.ipv4_en = ipv4_en ? 1 : 0;
+ cmd.opcode = SSSNIC_CMD_OPCODE_SET;
+ cmd.ipv6_en = ipv6_en ? 1 : 0;
+ cmd.nb_bufs = nb_lro_bufs;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len, SSSNIC_PORT_LRO_CFG_CMD,
+ SSSNIC_MPU_FUNC_IDX, SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_PORT_LRO_CFG_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_lro_timer_set(struct sssnic_hw *hw, uint32_t timer)
+{
+ int ret;
+ struct sssnic_lro_timer_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ if (SSSNIC_FUNC_TYPE(hw) == SSSNIC_FUNC_TYPE_VF)
+ return 0;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.opcode = SSSNIC_CMD_OPCODE_SET;
+ cmd.timer = timer;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len,
+ SSSNIC_PORT_LRO_TIMER_CMD, SSSNIC_MPU_FUNC_IDX,
+ SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_PORT_LRO_TIMER_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_vlan_filter_enable_set(struct sssnic_hw *hw, bool state)
+{
+ int ret;
+ struct sssnic_vlan_filter_enable_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.state = state ? 1 : 0;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len,
+ SSSNIC_ENABLE_PORT_VLAN_FILTER_CMD, SSSNIC_MPU_FUNC_IDX,
+ SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_ENABLE_PORT_VLAN_FILTER_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_vlan_strip_enable_set(struct sssnic_hw *hw, bool state)
+{
+ int ret;
+ struct sssnic_vlan_strip_enable_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd.state = state ? 1 : 0;
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len,
+ SSSNIC_ENABLE_PORT_VLAN_STRIP_CMD, SSSNIC_MPU_FUNC_IDX,
+ SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_ENABLE_PORT_VLAN_STRIP_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int
+sssnic_port_resource_clean(struct sssnic_hw *hw)
+{
+ int ret;
+ struct sssnic_port_resource_clean_cmd cmd;
+ struct sssnic_msg msg;
+ uint32_t cmd_len;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.function = SSSNIC_FUNC_IDX(hw);
+ cmd_len = sizeof(cmd);
+ sssnic_msg_init(&msg, (uint8_t *)&cmd, cmd_len,
+ SSSNIC_CLEAN_PORT_RES_CMD, SSSNIC_MPU_FUNC_IDX,
+ SSSNIC_LAN_MODULE, SSSNIC_MSG_TYPE_REQ);
+ ret = sssnic_mbox_send(hw, &msg, (uint8_t *)&cmd, &cmd_len, 0);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to send mbox message, ret=%d", ret);
+ return ret;
+ }
+
+ if (cmd_len == 0 || cmd.common.status != 0) {
+ PMD_DRV_LOG(ERR,
+ "Bad response to SSSNIC_CLEAN_PORT_RES_CMD, len=%u, status=%u",
+ cmd_len, cmd.common.status);
+ return -EIO;
+ }
+
+ return 0;
+}
@@ -32,6 +32,241 @@ struct sssnic_netif_link_info {
uint8_t fec;
};
+struct sssnic_rxq_ctx {
+ union {
+ uint32_t dword0;
+ struct {
+ /* producer index of workq */
+ uint32_t pi : 16;
+ /* consumer index of workq */
+ uint32_t ci : 16;
+ };
+ };
+
+ union {
+ uint32_t dword1;
+ struct {
+ uint32_t dw1_resvd0 : 21;
+ uint32_t msix_id : 10;
+ uint32_t intr_dis : 1;
+ };
+ };
+
+ union {
+ uint32_t dword2;
+ struct {
+ uint32_t wq_pfn_hi : 20;
+ uint32_t dw2_resvd0 : 8;
+ /* DPDK PMD always set to 2,
+ * represent 16 bytes workq entry
+ */
+ uint32_t wqe_type : 2;
+ uint32_t dw2_resvd1 : 1;
+ /* DPDK PMD always set to 1 */
+ uint32_t wq_owner : 1;
+ };
+ };
+
+ union {
+ uint32_t dword3;
+ uint32_t wq_pfn_lo;
+ };
+
+ uint32_t dword4;
+ uint32_t dword5;
+ uint32_t dword6;
+
+ union {
+ uint32_t dword7;
+ struct {
+ uint32_t dw7_resvd0 : 28;
+ /* PMD always set to 1, represent 32 bytes CQE*/
+ uint32_t rxd_len : 2;
+ uint32_t dw7_resvd1 : 2;
+ };
+ };
+
+ union {
+ uint32_t dword8;
+ struct {
+ uint32_t pre_cache_thd : 14;
+ uint32_t pre_cache_max : 11;
+ uint32_t pre_cache_min : 7;
+ };
+ };
+
+ union {
+ uint32_t dword9;
+ struct {
+ uint32_t pre_ci_hi : 4;
+ uint32_t pre_owner : 1;
+ uint32_t dw9_resvd0 : 27;
+ };
+ };
+
+ union {
+ uint32_t dword10;
+ struct {
+ uint32_t pre_wq_pfn_hi : 20;
+ uint32_t pre_ci_lo : 12;
+ };
+ };
+
+ union {
+ uint32_t dword11;
+ uint32_t pre_wq_pfn_lo;
+ };
+
+ union {
+ uint32_t dword12;
+ /* high 32it of PI DMA address */
+ uint32_t pi_addr_hi;
+ };
+
+ union {
+ uint32_t dword13;
+ /* low 32it of PI DMA address */
+ uint32_t pi_addr_lo;
+ };
+
+ union {
+ uint32_t dword14;
+ struct {
+ uint32_t wq_blk_pfn_hi : 23;
+ uint32_t dw14_resvd0 : 9;
+ };
+ };
+
+ union {
+ uint32_t dword15;
+ uint32_t wq_blk_pfn_lo;
+ };
+};
+
+struct sssnic_txq_ctx {
+ union {
+ uint32_t dword0;
+ struct {
+ uint32_t pi : 16;
+ uint32_t ci : 16;
+ };
+ };
+
+ union {
+ uint32_t dword1;
+ struct {
+ uint32_t sp : 1;
+ uint32_t drop : 1;
+ uint32_t dw_resvd0 : 30;
+ };
+ };
+
+ union {
+ uint32_t dword2;
+ struct {
+ uint32_t wq_pfn_hi : 20;
+ uint32_t dw2_resvd0 : 3;
+ uint32_t wq_owner : 1;
+ uint32_t dw2_resvd1 : 8;
+ };
+ };
+
+ union {
+ uint32_t dword3;
+ uint32_t wq_pfn_lo;
+ };
+
+ uint32_t dword4;
+
+ union {
+ uint32_t dword5;
+ struct {
+ uint32_t drop_on_thd : 16;
+ uint32_t drop_off_thd : 16;
+ };
+ };
+ union {
+ uint32_t dword6;
+ struct {
+ uint32_t qid : 13;
+ uint32_t dw6_resvd0 : 19;
+ };
+ };
+
+ union {
+ uint32_t dword7;
+ struct {
+ uint32_t vlan_tag : 16;
+ uint32_t vlan_type : 3;
+ uint32_t insert_mode : 2;
+ uint32_t dw7_resvd0 : 2;
+ uint32_t ceq_en : 1;
+ uint32_t dw7_resvd1 : 8;
+ };
+ };
+
+ union {
+ uint32_t dword8;
+ struct {
+ uint32_t pre_cache_thd : 14;
+ uint32_t pre_cache_max : 11;
+ uint32_t pre_cache_min : 7;
+ };
+ };
+
+ union {
+ uint32_t dword9;
+ struct {
+ uint32_t pre_ci_hi : 4;
+ uint32_t pre_owner : 1;
+ uint32_t dw9_resvd0 : 27;
+ };
+ };
+
+ union {
+ uint32_t dword10;
+ struct {
+ uint32_t pre_wq_pfn_hi : 20;
+ uint32_t pre_ci_lo : 12;
+ };
+ };
+
+ union {
+ uint32_t dword11;
+ uint32_t pre_wq_pfn_lo;
+ };
+
+ uint32_t dword12;
+ uint32_t dword13;
+
+ union {
+ uint32_t dword14;
+ struct {
+ uint32_t wq_blk_pfn_hi : 23;
+ uint32_t dw14_resvd0 : 9;
+ };
+ };
+
+ union {
+ uint32_t dword15;
+ uint32_t wq_blk_pfn_lo;
+ };
+};
+
+enum sssnic_rxtxq_ctx_type {
+ SSSNIC_TXQ_CTX,
+ SSSNIC_RXQ_CTX,
+};
+
+struct sssnic_rxtxq_ctx {
+ union {
+ struct sssnic_rxq_ctx rxq;
+ struct sssnic_txq_ctx txq;
+ };
+};
+
+#define SSSNIC_RXTXQ_CTX_SIZE (sizeof(struct sssnic_rxtxq_ctx))
+
int sssnic_msix_attr_get(struct sssnic_hw *hw, uint16_t msix_idx,
struct sssnic_msix_attr *attr);
int sssnic_msix_attr_set(struct sssnic_hw *hw, uint16_t msix_idx,
@@ -47,5 +282,27 @@ int sssnic_netif_link_info_get(struct sssnic_hw *hw,
int sssnic_netif_enable_set(struct sssnic_hw *hw, uint8_t state);
int sssnic_port_enable_set(struct sssnic_hw *hw, bool state);
int sssnic_rxq_flush(struct sssnic_hw *hw, uint16_t qid);
+int sssnic_rxtx_max_size_init(struct sssnic_hw *hw, uint16_t rx_size,
+ uint16_t tx_size);
+int sssnic_tx_max_size_set(struct sssnic_hw *hw, uint16_t tx_size);
+int sssnic_port_features_get(struct sssnic_hw *hw, uint64_t *features);
+int sssnic_port_features_set(struct sssnic_hw *hw, uint64_t features);
+int sssnic_txq_ctx_set(struct sssnic_hw *hw, struct sssnic_txq_ctx *ctx,
+ uint16_t qstart, uint16_t count);
+int sssnic_rxq_ctx_set(struct sssnic_hw *hw, struct sssnic_rxq_ctx *ctx,
+ uint16_t qstart, uint16_t count);
+int sssnic_rx_offload_ctx_reset(struct sssnic_hw *hw);
+int sssnic_tx_offload_ctx_reset(struct sssnic_hw *hw);
+int sssnic_rxtx_ctx_set(struct sssnic_hw *hw, bool lro_en, uint16_t rxq_depth,
+ uint16_t rx_buf, uint16_t txq_depth);
+int sssnic_port_tx_ci_attr_set(struct sssnic_hw *hw, uint16_t tx_qid,
+ uint8_t pending_limit, uint8_t coalescing_time, uint64_t dma_addr);
+int sssnic_port_rx_mode_set(struct sssnic_hw *hw, uint32_t mode);
+int sssnic_lro_enable_set(struct sssnic_hw *hw, bool ipv4_en, bool ipv6_en,
+ uint8_t nb_lro_bufs);
+int sssnic_lro_timer_set(struct sssnic_hw *hw, uint32_t timer);
+int sssnic_vlan_filter_enable_set(struct sssnic_hw *hw, bool state);
+int sssnic_vlan_strip_enable_set(struct sssnic_hw *hw, bool state);
+int sssnic_port_resource_clean(struct sssnic_hw *hw);
#endif /* _SSSNIC_API_H_ */
@@ -236,4 +236,104 @@ struct sssnic_rxq_flush_cmd {
};
};
+#define SSSNIC_CMD_INIT_RXTX_SIZE_FLAG (RTE_BIT32(0))
+#define SSSNIC_CMD_SET_RX_SIZE_FLAG (RTE_BIT32(1))
+#define SSSNIC_CMD_SET_TX_SIZE_FLAG (RTE_BIT32(2))
+
+struct sssnic_rxtx_size_set_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint16_t resvd0;
+ uint32_t flags;
+ uint16_t rx_size;
+ uint16_t tx_size;
+ uint32_t resvd1[9];
+};
+
+struct sssnic_port_feature_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint8_t opcode;
+ uint8_t resvd0;
+ uint64_t features;
+ uint64_t resvd1[3];
+};
+
+struct sssnic_rxtxq_ctx_cmd_info {
+ uint16_t q_count;
+ uint16_t q_type;
+ uint16_t q_start;
+ uint16_t resvd0;
+};
+
+#define SSSNIC_RXTXQ_CTX_CMD_INFO_LEN (sizeof(struct sssnic_rxtxq_ctx_cmd_info))
+
+struct sssnic_rxtxq_ctx_cmd {
+ struct sssnic_rxtxq_ctx_cmd_info info;
+ uint32_t ctx[0];
+};
+
+struct sssnic_offload_ctx_reset_cmd {
+ struct sssnic_rxtxq_ctx_cmd_info info;
+ uint32_t resvd;
+};
+
+struct sssnic_port_tx_ci_attr_set_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint8_t resvd0;
+ uint8_t pending_limit;
+ uint8_t coalescing_time;
+ uint8_t resvd1;
+ uint16_t resvd2;
+ uint16_t qid;
+ /* ci DMA address right shift 2 */
+ uint64_t dma_addr;
+};
+
+struct sssnic_port_rx_mode_set_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint16_t resvd;
+ uint32_t mode;
+};
+
+struct sssnic_lro_cfg_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint8_t opcode;
+ uint8_t resvd0;
+ uint8_t ipv4_en;
+ uint8_t ipv6_en;
+ uint8_t nb_bufs;
+ uint8_t resvd1[13];
+};
+
+struct sssnic_lro_timer_cmd {
+ struct sssnic_cmd_common common;
+ uint8_t opcode;
+ uint8_t resvd[3];
+ uint32_t timer;
+};
+
+struct sssnic_vlan_filter_enable_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint16_t resvd;
+ uint32_t state; /* 0: disabled 1: enabled */
+};
+
+struct sssnic_vlan_strip_enable_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint8_t state; /* 0: disabled 1: enabled */
+ uint8_t resvd[5];
+};
+
+struct sssnic_port_resource_clean_cmd {
+ struct sssnic_cmd_common common;
+ uint16_t function;
+ uint16_t resvd;
+};
+
#endif /* _SSSNIC_CMD_H_ */
@@ -8,4 +8,38 @@
#define SSSNIC_LOWER_32_BITS(x) ((uint32_t)(x))
#define SSSNIC_UPPER_32_BITS(x) ((uint32_t)(((x) >> 16) >> 16))
+static inline void
+sssnic_mem_cpu_to_be_32(void *in, void *out, int size)
+{
+ uint32_t i;
+ uint32_t num;
+ uint32_t *data_in = (uint32_t *)in;
+ uint32_t *data_out = (uint32_t *)out;
+
+ num = size / sizeof(uint32_t);
+
+ for (i = 0; i < num; i++) {
+ *data_out = rte_cpu_to_be_32(*data_in);
+ data_in++;
+ data_out++;
+ }
+}
+
+static inline void
+sssnic_mem_be_to_cpu_32(void *in, void *out, int size)
+{
+ uint32_t i;
+ uint32_t num;
+ uint32_t *data_in = (uint32_t *)in;
+ uint32_t *data_out = (uint32_t *)out;
+
+ num = size / sizeof(uint32_t);
+
+ for (i = 0; i < num; i++) {
+ *data_out = rte_be_to_cpu_32(*data_in);
+ data_in++;
+ data_out++;
+ }
+}
+
#endif /* _SSSNIC_MISC_H_ */
@@ -344,7 +344,287 @@ sssnic_ethdev_release(struct rte_eth_dev *ethdev)
rte_free(hw);
}
+static int
+sssnic_ethdev_rxtx_max_size_init(struct rte_eth_dev *ethdev)
+{
+ int ret;
+ struct sssnic_netdev *netdev = SSSNIC_ETHDEV_PRIVATE(ethdev);
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+
+ netdev->max_rx_size = sssnic_ethdev_rx_max_size_determine(ethdev);
+
+ ret = sssnic_rxtx_max_size_init(hw, netdev->max_rx_size, 0x3fff);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to initialize max rx and tx size");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int
+sssnic_ethdev_features_setup(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ uint64_t features;
+ int ret;
+
+ ret = sssnic_port_features_get(hw, &features);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to get features");
+ return ret;
+ }
+
+ features &= SSSNIC_ETHDEV_DEFAULT_FEATURES;
+
+ ret = sssnic_port_features_set(hw, features);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to set features to %" PRIx64,
+ features);
+ return ret;
+ }
+
+ PMD_DRV_LOG(DEBUG, "Set features to %" PRIx64, features);
+
+ return 0;
+}
+
+static int
+sssnic_ethdev_queues_ctx_setup(struct rte_eth_dev *ethdev)
+{
+ int ret;
+
+ ret = sssnic_ethdev_tx_queues_ctx_init(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to initialize tx queues context");
+ return ret;
+ }
+
+ ret = sssnic_ethdev_rx_queues_ctx_init(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to initialize rx queues context");
+ return ret;
+ }
+
+ ret = sssnic_ethdev_rx_offload_ctx_reset(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to initialize rx offload context");
+ return ret;
+ }
+
+ ret = sssnic_ethdev_tx_offload_ctx_reset(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to initialize tx offload context");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int
+sssnic_ethdev_rxtx_ctx_setup(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_netdev *netdev = SSSNIC_ETHDEV_PRIVATE(ethdev);
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ uint16_t rxq_depth;
+ uint16_t txq_depth;
+ uint16_t rx_buf_idx;
+ int ret;
+
+ /* queue 0 as default depth */
+ rxq_depth = sssnic_ethdev_rx_queue_depth_get(ethdev, 0);
+ rxq_depth = rxq_depth << 1;
+ txq_depth = sssnic_ethdev_tx_queue_depth_get(ethdev, 0);
+
+ rx_buf_idx = sssnic_ethdev_rx_buf_size_index_get(netdev->max_rx_size);
+
+ ret = sssnic_rxtx_ctx_set(hw, true, rxq_depth, rx_buf_idx, txq_depth);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to set rxtx context");
+ return ret;
+ }
+
+ PMD_DRV_LOG(INFO,
+ "Setup rxq_depth: %u, max_rx_size: %u, rx_buf_idx: %u, txq_depth: %u",
+ rxq_depth >> 1, netdev->max_rx_size, rx_buf_idx, txq_depth);
+
+ return 0;
+}
+
+static void
+sssnic_ethdev_rxtx_ctx_clean(struct rte_eth_dev *ethdev)
+{
+ sssnic_rxtx_ctx_set(SSSNIC_ETHDEV_TO_HW(ethdev), 0, 0, 0, 0);
+}
+
+static int
+sssnic_ethdev_resource_clean(struct rte_eth_dev *ethdev)
+{
+ return sssnic_port_resource_clean(SSSNIC_ETHDEV_TO_HW(ethdev));
+}
+
+static int
+sssnic_ethdev_start(struct rte_eth_dev *ethdev)
+{
+ int ret;
+
+ /* disable link event */
+ sssnic_ethdev_link_intr_disable(ethdev);
+
+ /* Allocate rx intr vec */
+ ret = sssnic_ethdev_rx_intr_init(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to initialize rx initr of port %u",
+ ethdev->data->port_id);
+ goto link_intr_enable;
+ }
+
+ /* Initialize rx and tx max size */
+ ret = sssnic_ethdev_rxtx_max_size_init(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR,
+ "Failed to initialize rxtx max size of port %u",
+ ethdev->data->port_id);
+ goto rx_intr_shutdown;
+ }
+
+ /* Setup default features for port */
+ ret = sssnic_ethdev_features_setup(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to setup features");
+ goto rx_intr_shutdown;
+ }
+
+ /* Setup txqs and rxqs context */
+ ret = sssnic_ethdev_queues_ctx_setup(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to setup queues context");
+ goto rx_intr_shutdown;
+ }
+
+ /* Setup tx and rx root context */
+ ret = sssnic_ethdev_rxtx_ctx_setup(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to setup rxtx context");
+ goto rx_intr_shutdown;
+ }
+
+ /* Initialize tx ci attributes */
+ ret = sssnic_ethdev_tx_ci_attr_init(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to initialize tx ci attributes");
+ goto rxtx_ctx_clean;
+ }
+
+ /* Set MTU */
+ ret = sssnic_ethdev_tx_max_size_set(ethdev, ethdev->data->mtu);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to set tx max size to %u",
+ ethdev->data->mtu);
+ goto rxtx_ctx_clean;
+ }
+
+ /* init rx mode */
+ ret = sssnic_ethdev_rx_mode_set(ethdev, SSSNIC_ETHDEV_DEF_RX_MODE);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to set rx mode to %x",
+ SSSNIC_ETHDEV_DEF_RX_MODE);
+ goto rxtx_ctx_clean;
+ }
+
+ /* setup rx offload */
+ ret = sssnic_ethdev_rx_offload_setup(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to setup rx offload");
+ goto rx_mode_reset;
+ }
+
+ /* start all rx queues */
+ ret = sssnic_ethdev_rx_queue_all_start(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to start all rx queues");
+ goto clean_port_res;
+ }
+
+ /* start all tx queues */
+ sssnic_ethdev_tx_queue_all_start(ethdev);
+
+ /* enable link event */
+ sssnic_ethdev_link_intr_enable(ethdev);
+
+ /* set port link up */
+ ret = sssnic_ethdev_set_link_up(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to set port link up");
+ goto stop_queues;
+ }
+
+ PMD_DRV_LOG(INFO, "Port %u is started", ethdev->data->port_id);
+
+ return 0;
+
+stop_queues:
+ sssnic_ethdev_tx_queue_all_stop(ethdev);
+ sssnic_ethdev_rx_queue_all_stop(ethdev);
+clean_port_res:
+ sssnic_ethdev_resource_clean(ethdev);
+rx_mode_reset:
+ sssnic_ethdev_rx_mode_set(ethdev, SSSNIC_ETHDEV_RX_MODE_NONE);
+rxtx_ctx_clean:
+ sssnic_ethdev_rxtx_ctx_clean(ethdev);
+rx_intr_shutdown:
+ sssnic_ethdev_rx_intr_shutdown(ethdev);
+link_intr_enable:
+ sssnic_ethdev_link_intr_enable(ethdev);
+ return ret;
+}
+
+static int
+sssnic_ethdev_stop(struct rte_eth_dev *ethdev)
+{
+ struct rte_eth_link linkstatus = { 0 };
+ int ret;
+
+ /* disable link event */
+ sssnic_ethdev_link_intr_disable(ethdev);
+
+ /* set link down */
+ ret = sssnic_ethdev_set_link_down(ethdev);
+ if (ret != 0)
+ PMD_DRV_LOG(WARNING, "Failed to set port %u link down",
+ ethdev->data->port_id);
+
+ rte_eth_linkstatus_set(ethdev, &linkstatus);
+
+ /* wait for hw to stop rx and tx packet */
+ rte_delay_ms(100);
+
+ /* stop all tx queues */
+ sssnic_ethdev_tx_queue_all_stop(ethdev);
+
+ /* stop all rx queues */
+ sssnic_ethdev_rx_queue_all_stop(ethdev);
+
+ /* clean hardware resource */
+ sssnic_ethdev_resource_clean(ethdev);
+
+ /* shut down rx queue interrupt */
+ sssnic_ethdev_rx_intr_shutdown(ethdev);
+
+ /* clean rxtx context */
+ sssnic_ethdev_rxtx_ctx_clean(ethdev);
+
+ /* enable link event */
+ sssnic_ethdev_link_intr_enable(ethdev);
+
+ PMD_DRV_LOG(INFO, "Port %u is stopped", ethdev->data->port_id);
+
+ return 0;
+}
+
static const struct eth_dev_ops sssnic_ethdev_ops = {
+ .dev_start = sssnic_ethdev_start,
+ .dev_stop = sssnic_ethdev_stop,
.dev_set_link_up = sssnic_ethdev_set_link_up,
.dev_set_link_down = sssnic_ethdev_set_link_down,
.link_update = sssnic_ethdev_link_update,
@@ -428,6 +708,10 @@ sssnic_ethdev_uninit(struct rte_eth_dev *ethdev)
if (ethdev->state == RTE_ETH_DEV_UNUSED)
return 0;
+ /* stop ethdev first */
+ if (ethdev->data->dev_started)
+ sssnic_ethdev_stop(ethdev);
+
sssnic_ethdev_release(ethdev);
return 0;
@@ -59,6 +59,25 @@
#define SSSNIC_ETHDEV_DEF_RX_FREE_THRESH 32
#define SSSNIC_ETHDEV_DEF_TX_FREE_THRESH 32
+#define SSSNIC_ETHDEV_DEFAULT_FEATURES 0x3fff
+
+enum sssnic_ethdev_rx_mode {
+ SSSNIC_ETHDEV_RX_MODE_NONE = 0,
+ SSSNIC_ETHDEV_RX_UCAST = RTE_BIT32(0),
+ SSSNIC_ETHDEV_RX_MCAST = RTE_BIT32(1),
+ SSSNIC_ETHDEV_RX_BCAST = RTE_BIT32(2),
+ SSSNIC_ETHDEV_RX_ALL_MCAST = RTE_BIT32(3),
+ SSSNIC_ETHDEV_RX_PROMISC = RTE_BIT32(4),
+ SSSNIC_ETHDEV_RX_MODE_INVAL = RTE_BIT32(5),
+};
+
+#define SSSNIC_ETHDEV_DEF_RX_MODE \
+ (SSSNIC_ETHDEV_RX_UCAST | SSSNIC_ETHDEV_RX_MCAST | \
+ SSSNIC_ETHDEV_RX_BCAST)
+
+#define SSSNIC_ETHDEV_LRO_BUF_SIZE 1024
+#define SSSNIC_ETHDEV_LRO_TIMER 16
+
struct sssnic_netdev {
void *hw;
struct rte_ether_addr *mcast_addrs;
@@ -67,6 +86,8 @@ struct sssnic_netdev {
uint16_t max_num_rxq;
uint16_t num_started_rxqs;
uint16_t num_started_txqs;
+ uint16_t max_rx_size;
+ uint32_t rx_mode;
};
#define SSSNIC_ETHDEV_PRIVATE(eth_dev) \
@@ -185,7 +185,7 @@ sssnic_ethdev_rxq_doorbell_ring(struct sssnic_ethdev_rxq *rxq, uint16_t pi)
db.qid = rxq->qid;
db.pi_hi = (hw_pi >> 8) & 0xff;
- db_addr = (uint64_t *)(rxq->doorbell + (hw_pi & 0xff));
+ db_addr = ((uint64_t *)rxq->doorbell) + (hw_pi & 0xff);
rte_write64(db.u64, db_addr);
}
@@ -885,3 +885,271 @@ sssnic_ethdev_rx_intr_shutdown(struct rte_eth_dev *ethdev)
rte_intr_efd_disable(intr_handle);
rte_intr_vec_list_free(intr_handle);
}
+
+uint16_t
+sssnic_ethdev_rx_max_size_determine(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_ethdev_rxq *rxq;
+ uint16_t max_size = 0;
+ uint16_t i;
+
+ for (i = 0; i < ethdev->data->nb_rx_queues; i++) {
+ rxq = ethdev->data->rx_queues[i];
+ if (rxq->rx_buf_size > max_size)
+ max_size = rxq->rx_buf_size;
+ }
+
+ return max_size;
+}
+
+static void
+sssnic_ethdev_rxq_ctx_build(struct sssnic_ethdev_rxq *rxq,
+ struct sssnic_rxq_ctx *rxq_ctx)
+{
+ uint16_t hw_ci, hw_pi;
+ uint64_t pfn;
+
+ hw_ci = sssnic_ethdev_rxq_ci_get(rxq) << 1;
+ hw_pi = sssnic_ethdev_rxq_pi_get(rxq) << 1;
+
+ /* dw0 */
+ rxq_ctx->pi = hw_pi;
+ rxq_ctx->ci = hw_ci;
+
+ /* dw1 */
+ rxq_ctx->msix_id = rxq->intr.msix_id;
+ rxq_ctx->intr_dis = !rxq->intr.enable;
+
+ /* workq buf phyaddress PFN, size = 4K */
+ pfn = SSSNIC_WORKQ_BUF_PHYADDR(rxq->workq) >> 12;
+
+ /* dw2 */
+ rxq_ctx->wq_pfn_hi = SSSNIC_UPPER_32_BITS(pfn);
+ rxq_ctx->wqe_type = 2;
+ rxq_ctx->wq_owner = 1;
+
+ /* dw3 */
+ rxq_ctx->wq_pfn_lo = SSSNIC_LOWER_32_BITS(pfn);
+
+ /* dw4, dw5, dw6 are reserved */
+
+ /* dw7 */
+ rxq_ctx->rxd_len = 1;
+
+ /* dw8 */
+ rxq_ctx->pre_cache_thd = 256;
+ rxq_ctx->pre_cache_max = 6;
+ rxq_ctx->pre_cache_min = 1;
+
+ /* dw9 */
+ rxq_ctx->pre_ci_hi = (hw_ci >> 12) & 0xf;
+ rxq_ctx->pre_owner = 1;
+
+ /* dw10 */
+ rxq_ctx->pre_wq_pfn_hi = SSSNIC_UPPER_32_BITS(pfn);
+ rxq_ctx->pre_ci_lo = hw_ci & 0xfff;
+
+ /* dw11 */
+ rxq_ctx->pre_wq_pfn_lo = SSSNIC_LOWER_32_BITS(pfn);
+
+ /* dw12 */
+ rxq_ctx->pi_addr_hi = SSSNIC_UPPER_32_BITS(rxq->pi_mz->iova);
+
+ /* dw13 */
+ rxq_ctx->pi_addr_lo = SSSNIC_LOWER_32_BITS(rxq->pi_mz->iova);
+
+ /* workq buf block PFN, size = 512B */
+ pfn = SSSNIC_WORKQ_BUF_PHYADDR(rxq->workq) >> 9;
+
+ /* dw14 */
+ rxq_ctx->wq_blk_pfn_hi = SSSNIC_UPPER_32_BITS(pfn);
+
+ /* dw15 */
+ rxq_ctx->wq_blk_pfn_lo = SSSNIC_LOWER_32_BITS(pfn);
+}
+
+int
+sssnic_ethdev_rx_queues_ctx_init(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ struct sssnic_ethdev_rxq *rxq;
+ struct sssnic_rxq_ctx *qctx;
+ uint16_t qid, numq;
+ int ret;
+
+ numq = ethdev->data->nb_rx_queues;
+
+ qctx = rte_zmalloc(NULL, numq * sizeof(struct sssnic_rxq_ctx), 0);
+ if (qctx == NULL) {
+ PMD_DRV_LOG(ERR, "Failed to alloc memory for rxq ctx");
+ return -EINVAL;
+ }
+
+ for (qid = 0; qid < numq; qid++) {
+ rxq = ethdev->data->rx_queues[qid];
+
+ /* reset ci and pi */
+ sssnic_workq_reset(rxq->workq);
+
+ sssnic_ethdev_rxq_ctx_build(rxq, &qctx[qid]);
+ }
+
+ ret = sssnic_rxq_ctx_set(hw, qctx, 0, numq);
+ rte_free(qctx);
+
+ return ret;
+}
+
+int
+sssnic_ethdev_rx_offload_ctx_reset(struct rte_eth_dev *ethdev)
+{
+ return sssnic_rx_offload_ctx_reset(SSSNIC_ETHDEV_TO_HW(ethdev));
+}
+
+uint16_t
+sssnic_ethdev_rx_queue_depth_get(struct rte_eth_dev *ethdev, uint16_t qid)
+{
+ struct sssnic_ethdev_rxq *rxq;
+
+ if (qid >= ethdev->data->nb_rx_queues)
+ return 0;
+
+ rxq = ethdev->data->rx_queues[qid];
+
+ return rxq->depth;
+};
+
+uint32_t
+sssnic_ethdev_rx_buf_size_index_get(uint16_t rx_buf_size)
+{
+ uint32_t i;
+
+ for (i = 0; i < SSSNIC_ETHDEV_RX_BUF_SIZE_COUNT; i++) {
+ if (rx_buf_size == sssnic_ethdev_rx_buf_size_tbl[i])
+ return i;
+ }
+
+ return SSSNIC_ETHDEV_DEF_RX_BUF_SIZE_IDX;
+}
+
+int
+sssnic_ethdev_rx_mode_set(struct rte_eth_dev *ethdev, uint32_t mode)
+{
+ struct sssnic_netdev *netdev = SSSNIC_ETHDEV_PRIVATE(ethdev);
+ int ret;
+
+ ret = sssnic_port_rx_mode_set(SSSNIC_ETHDEV_TO_HW(ethdev), mode);
+ if (ret != 0)
+ return ret;
+
+ netdev->rx_mode = mode;
+
+ PMD_DRV_LOG(DEBUG, "Set rx_mode to %x", mode);
+
+ return 0;
+}
+
+static int
+sssnic_ethdev_lro_setup(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ struct rte_eth_conf *dev_conf = ðdev->data->dev_conf;
+ bool enable;
+ uint8_t num_lro_bufs;
+ uint32_t max_lro_pkt_size;
+ uint32_t timer = SSSNIC_ETHDEV_LRO_TIMER;
+ int ret;
+
+ if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO)
+ enable = true;
+ else
+ enable = false;
+
+ max_lro_pkt_size = dev_conf->rxmode.max_lro_pkt_size;
+ num_lro_bufs = max_lro_pkt_size / SSSNIC_ETHDEV_LRO_BUF_SIZE;
+
+ if (num_lro_bufs == 0)
+ num_lro_bufs = 1;
+
+ ret = sssnic_lro_enable_set(hw, enable, enable, num_lro_bufs);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to %s LRO",
+ enable ? "enable" : "disable");
+ return ret;
+ }
+
+ ret = sssnic_lro_timer_set(hw, timer);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to set lro timer to %u", timer);
+ return ret;
+ }
+
+ PMD_DRV_LOG(INFO,
+ "%s LRO, max_lro_pkt_size: %u, num_lro_bufs: %u, lro_timer: %u",
+ enable ? "Enabled" : "Disabled", max_lro_pkt_size, num_lro_bufs,
+ timer);
+
+ return 0;
+}
+
+static int
+sssnic_ethdev_rx_vlan_offload_setup(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ struct rte_eth_conf *dev_conf = ðdev->data->dev_conf;
+ bool vlan_strip_en;
+ uint32_t vlan_filter_en;
+ int ret;
+
+ if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
+ vlan_strip_en = true;
+ else
+ vlan_strip_en = false;
+
+ ret = sssnic_vlan_strip_enable_set(hw, vlan_strip_en);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to %s VLAN strip",
+ vlan_strip_en ? "enable" : "disable");
+ return ret;
+ }
+
+ PMD_DRV_LOG(INFO, "%s VLAN strip",
+ vlan_strip_en ? "Enabled" : "Disabled");
+
+ if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER)
+ vlan_filter_en = true;
+ else
+ vlan_filter_en = false;
+
+ ret = sssnic_vlan_filter_enable_set(hw, vlan_filter_en);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to %s VLAN filter",
+ vlan_filter_en ? "enable" : "disable");
+ return ret;
+ }
+
+ PMD_DRV_LOG(ERR, "%s VLAN filter",
+ vlan_filter_en ? "Enabled" : "Disabled");
+
+ return 0;
+}
+
+int
+sssnic_ethdev_rx_offload_setup(struct rte_eth_dev *ethdev)
+{
+ int ret;
+
+ ret = sssnic_ethdev_lro_setup(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to setup LRO");
+ return ret;
+ }
+
+ ret = sssnic_ethdev_rx_vlan_offload_setup(ethdev);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to setup rx vlan offload");
+ return ret;
+ }
+
+ return 0;
+}
@@ -30,5 +30,13 @@ int sssnic_ethdev_rx_queue_intr_disable(struct rte_eth_dev *ethdev,
uint16_t qid);
int sssnic_ethdev_rx_intr_init(struct rte_eth_dev *ethdev);
void sssnic_ethdev_rx_intr_shutdown(struct rte_eth_dev *ethdev);
+uint16_t sssnic_ethdev_rx_max_size_determine(struct rte_eth_dev *ethdev);
+int sssnic_ethdev_rx_queues_ctx_init(struct rte_eth_dev *ethdev);
+int sssnic_ethdev_rx_offload_ctx_reset(struct rte_eth_dev *ethdev);
+uint16_t sssnic_ethdev_rx_queue_depth_get(struct rte_eth_dev *ethdev,
+ uint16_t qid);
+uint32_t sssnic_ethdev_rx_buf_size_index_get(uint16_t rx_buf_size);
+int sssnic_ethdev_rx_mode_set(struct rte_eth_dev *ethdev, uint32_t mode);
+int sssnic_ethdev_rx_offload_setup(struct rte_eth_dev *ethdev);
#endif
@@ -179,6 +179,9 @@ enum sssnic_ethdev_txq_entry_type {
/* Doorbell offset 4096 */
#define SSSNIC_ETHDEV_TXQ_DB_OFFSET 0x1000
+#define SSSNIC_ETHDEV_TX_CI_DEF_COALESCING_TIME 16
+#define SSSNIC_ETHDEV_TX_CI_DEF_PENDING_TIME 4
+
static inline uint16_t
sssnic_ethdev_txq_num_used_entries(struct sssnic_ethdev_txq *txq)
{
@@ -507,3 +510,163 @@ sssnic_ethdev_tx_queue_all_stop(struct rte_eth_dev *ethdev)
for (qid = 0; qid < numq; qid++)
sssnic_ethdev_tx_queue_stop(ethdev, qid);
}
+
+static void
+sssnic_ethdev_txq_ctx_build(struct sssnic_ethdev_txq *txq,
+ struct sssnic_txq_ctx *qctx)
+{
+ uint64_t pfn;
+
+ /* dw0 */
+ qctx->pi = sssnic_ethdev_txq_pi_get(txq);
+ qctx->ci = sssnic_ethdev_txq_ci_get(txq);
+
+ /* dw1 */
+ qctx->sp = 0;
+ qctx->drop = 0;
+
+ /* workq buf phyaddress PFN */
+ pfn = SSSNIC_WORKQ_BUF_PHYADDR(txq->workq) >> 12;
+
+ /* dw2 */
+ qctx->wq_pfn_hi = SSSNIC_UPPER_32_BITS(pfn);
+ qctx->wq_owner = 1;
+
+ /* dw3 */
+ qctx->wq_pfn_lo = SSSNIC_LOWER_32_BITS(pfn);
+
+ /* dw4 reserved */
+
+ /* dw5 */
+ qctx->drop_on_thd = 0xffff;
+ qctx->drop_off_thd = 0;
+
+ /* dw6 */
+ qctx->qid = txq->qid;
+
+ /* dw7 */
+ qctx->insert_mode = 1;
+
+ /* dw8 */
+ qctx->pre_cache_thd = 256;
+ qctx->pre_cache_max = 6;
+ qctx->pre_cache_min = 1;
+
+ /* dw9 */
+ qctx->pre_ci_hi = sssnic_ethdev_txq_ci_get(txq) >> 12;
+ qctx->pre_owner = 1;
+
+ /* dw10 */
+ qctx->pre_wq_pfn_hi = SSSNIC_UPPER_32_BITS(pfn);
+ qctx->pre_ci_lo = sssnic_ethdev_txq_ci_get(txq);
+
+ /* dw11 */
+ qctx->pre_wq_pfn_lo = SSSNIC_LOWER_32_BITS(pfn);
+
+ /* dw12,dw13 are reserved */
+
+ /* workq buf block PFN */
+ pfn = SSSNIC_WORKQ_BUF_PHYADDR(txq->workq) >> 9;
+
+ /* dw14 */
+ qctx->wq_blk_pfn_hi = SSSNIC_UPPER_32_BITS(pfn);
+
+ /* dw15 */
+ qctx->wq_blk_pfn_lo = SSSNIC_LOWER_32_BITS(pfn);
+}
+
+int
+sssnic_ethdev_tx_queues_ctx_init(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ struct sssnic_ethdev_txq *txq;
+ struct sssnic_txq_ctx *qctx;
+ uint16_t qid, numq;
+ int ret;
+
+ numq = ethdev->data->nb_tx_queues;
+
+ qctx = rte_zmalloc(NULL, numq * sizeof(struct sssnic_txq_ctx), 0);
+ if (qctx == NULL) {
+ PMD_DRV_LOG(ERR, "Failed to alloc memory for txq ctx");
+ return -EINVAL;
+ }
+
+ for (qid = 0; qid < numq; qid++) {
+ txq = ethdev->data->tx_queues[qid];
+
+ /* reset ci and pi */
+ sssnic_workq_reset(txq->workq);
+
+ *txq->hw_ci_addr = 0;
+ txq->owner = 1;
+
+ sssnic_ethdev_txq_ctx_build(txq, &qctx[qid]);
+ }
+
+ ret = sssnic_txq_ctx_set(hw, qctx, 0, numq);
+ rte_free(qctx);
+
+ return ret;
+}
+
+int
+sssnic_ethdev_tx_offload_ctx_reset(struct rte_eth_dev *ethdev)
+{
+ return sssnic_tx_offload_ctx_reset(SSSNIC_ETHDEV_TO_HW(ethdev));
+}
+
+uint16_t
+sssnic_ethdev_tx_queue_depth_get(struct rte_eth_dev *ethdev, uint16_t qid)
+{
+ struct sssnic_ethdev_txq *txq;
+
+ if (qid >= ethdev->data->nb_tx_queues)
+ return 0;
+
+ txq = ethdev->data->tx_queues[qid];
+
+ return txq->depth;
+}
+
+int
+sssnic_ethdev_tx_ci_attr_init(struct rte_eth_dev *ethdev)
+{
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ struct sssnic_ethdev_txq *txq;
+ uint16_t i;
+ int ret;
+
+ for (i = 0; i < ethdev->data->nb_tx_queues; i++) {
+ txq = ethdev->data->tx_queues[i];
+
+ ret = sssnic_port_tx_ci_attr_set(hw, i,
+ SSSNIC_ETHDEV_TX_CI_DEF_PENDING_TIME,
+ SSSNIC_ETHDEV_TX_CI_DEF_COALESCING_TIME,
+ txq->ci_mz->iova);
+
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR,
+ "Failed to initialize tx ci attributes of queue %u",
+ i);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+int
+sssnic_ethdev_tx_max_size_set(struct rte_eth_dev *ethdev, uint16_t size)
+{
+ struct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);
+ int ret;
+
+ ret = sssnic_tx_max_size_set(hw, size);
+ if (ret != 0)
+ return ret;
+
+ PMD_DRV_LOG(INFO, "Set tx_max_size to %u", size);
+
+ return 0;
+};
@@ -27,5 +27,11 @@ int sssnic_ethdev_tx_queue_start(struct rte_eth_dev *ethdev, uint16_t queue_id);
int sssnic_ethdev_tx_queue_stop(struct rte_eth_dev *ethdev, uint16_t queue_id);
int sssnic_ethdev_tx_queue_all_start(struct rte_eth_dev *ethdev);
void sssnic_ethdev_tx_queue_all_stop(struct rte_eth_dev *ethdev);
+int sssnic_ethdev_tx_queues_ctx_init(struct rte_eth_dev *ethdev);
+int sssnic_ethdev_tx_offload_ctx_reset(struct rte_eth_dev *ethdev);
+uint16_t sssnic_ethdev_tx_queue_depth_get(struct rte_eth_dev *ethdev,
+ uint16_t qid);
+int sssnic_ethdev_tx_ci_attr_init(struct rte_eth_dev *ethdev);
+int sssnic_ethdev_tx_max_size_set(struct rte_eth_dev *ethdev, uint16_t size);
#endif /* _SSSNIC_ETHDEV_TX_H_ */