diff mbox series

[v2,04/17] common/idpf/base: remove mailbox registers

Message ID 20230825101344.1828774-5-simei.su@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Qi Zhang
Headers
Series update idpf base code |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Simei Su Aug. 25, 2023, 10:13 a.m. UTC 
  Removing mailbox register offsets as the mapping to device register
offsets are different between CVL and MEV (they are swapped out)
individual drivers will define the offsets based on how registers
are hardware addressed. However the it will begin with VDEV_MBX_START
offset.

Signed-off-by: Madhu Chittim <madhu.chittim@intel.com>
Signed-off-by: Simei Su <simei.su@intel.com>
---
 .mailmap                             |  1 +
 drivers/common/idpf/base/siov_regs.h | 13 ++-----------
 2 files changed, 3 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/.mailmap b/.mailmap
index af452d54c6..f23f8fecfa 100644
--- a/.mailmap
+++ b/.mailmap
@@ -1641,3 +1641,4 @@  Zyta Szpak <zyta@marvell.com> <zr@semihalf.com> <zyta.szpak@semihalf.com>
 Jayaprakash Shanmugam <jayaprakash.shanmugam@intel.com>
 Zhenning Xiao <zhenning.xiao@intel.com>
 Josh Hay <joshua.a.hay@intel.com>
+Madhu Chittim <madhu.chittim@intel.com>
diff --git a/drivers/common/idpf/base/siov_regs.h b/drivers/common/idpf/base/siov_regs.h
index fad329601a..7e1ae2e300 100644
--- a/drivers/common/idpf/base/siov_regs.h
+++ b/drivers/common/idpf/base/siov_regs.h
@@ -4,16 +4,6 @@ 
 #ifndef _SIOV_REGS_H_
 #define _SIOV_REGS_H_
 #define VDEV_MBX_START			0x20000 /* Begin at 128KB */
-#define VDEV_MBX_ATQBAL			(VDEV_MBX_START + 0x0000)
-#define VDEV_MBX_ATQBAH			(VDEV_MBX_START + 0x0004)
-#define VDEV_MBX_ATQLEN			(VDEV_MBX_START + 0x0008)
-#define VDEV_MBX_ATQH			(VDEV_MBX_START + 0x000C)
-#define VDEV_MBX_ATQT			(VDEV_MBX_START + 0x0010)
-#define VDEV_MBX_ARQBAL			(VDEV_MBX_START + 0x0014)
-#define VDEV_MBX_ARQBAH			(VDEV_MBX_START + 0x0018)
-#define VDEV_MBX_ARQLEN			(VDEV_MBX_START + 0x001C)
-#define VDEV_MBX_ARQH			(VDEV_MBX_START + 0x0020)
-#define VDEV_MBX_ARQT			(VDEV_MBX_START + 0x0024)
 #define VDEV_GET_RSTAT			0x21000 /* 132KB for RSTAT */
 
 /* Begin at offset after 1MB (after 256 4k pages) */
@@ -43,5 +33,6 @@ 
 #define VDEV_INT_ITR_1(_i)		(VDEV_INT_DYN_START + ((_i) * 0x1000) + 0x08)
 #define VDEV_INT_ITR_2(_i)		(VDEV_INT_DYN_START + ((_i) * 0x1000) + 0x0C)
 
-/* Next offset to begin at 42MB (0x2A00000) */
+#define SIOV_REG_BAR_SIZE               0x2A00000
+/* Next offset to begin at 42MB + 4K (0x2A00000 + 0x1000) */
 #endif /* _SIOV_REGS_H_ */