diff mbox series

crypto/qat: fix stack buffer overflow in SGL loop

Message ID 20230414123131.575412-1-ciara.power@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series crypto/qat: fix stack buffer overflow in SGL loop |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/Intel-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/intel-Functional success Functional PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS

Commit Message

Power, Ciara April 14, 2023, 12:31 p.m. UTC 
  The cvec pointer was incremented incorrectly in the case where the
length of remaining_off equals cvec len, and there is no next cvec.
This led to cvec->iova being invalid memory to access.

Instead, only increment the cvec pointer when we know there is a next
cvec to point to, by checking the i value, which represents the number
of cvecs available.
If i is 0, then no need to increment as the current cvec is the last one.

Fixes: a815a04cea05 ("crypto/qat: support symmetric build op request")
Cc: kai.ji@intel.com
Cc: stable@dpdk.org

Signed-off-by: Ciara Power <ciara.power@intel.com>
---
 drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Ji, Kai April 14, 2023, 1:22 p.m. UTC | #1 
Acked-by: Kai Ji <kai.ji@intel.com>

> -----Original Message-----
> From: Power, Ciara <ciara.power@intel.com>
> Sent: Friday, April 14, 2023 1:32 PM
> To: Ji, Kai <kai.ji@intel.com>
> Cc: dev@dpdk.org; Power, Ciara <ciara.power@intel.com>; stable@dpdk.org
> Subject: [PATCH] crypto/qat: fix stack buffer overflow in SGL loop
> 
> The cvec pointer was incremented incorrectly in the case where the length
> of remaining_off equals cvec len, and there is no next cvec.
> This led to cvec->iova being invalid memory to access.
> 
> Instead, only increment the cvec pointer when we know there is a next cvec
> to point to, by checking the i value, which represents the number of cvecs
> available.
> If i is 0, then no need to increment as the current cvec is the last one.
> 
> Fixes: a815a04cea05 ("crypto/qat: support symmetric build op request")
> Cc: kai.ji@intel.com
> Cc: stable@dpdk.org
> 
> Signed-off-by: Ciara Power <ciara.power@intel.com>
> ---
>  drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> index 524c291340..092265631b 100644
> --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> @@ -682,7 +682,8 @@ enqueue_one_chain_job_gen1(struct qat_sym_session *ctx,
>  		while (remaining_off >= cvec->len && i >= 1) {
>  			i--;
>  			remaining_off -= cvec->len;
> -			cvec++;
> +			if (i)
> +				cvec++;
>  		}
> 
>  		auth_iova_end = cvec->iova + remaining_off;
> --
> 2.25.1
Brian Dooley April 14, 2023, 1:28 p.m. UTC | #2 
Hi Ciara,

> -----Original Message-----
> From: Ciara Power <ciara.power@intel.com>
> Sent: Friday 14 April 2023 13:32
> To: Ji, Kai <kai.ji@intel.com>
> Cc: dev@dpdk.org; Power, Ciara <ciara.power@intel.com>; stable@dpdk.org
> Subject: [PATCH] crypto/qat: fix stack buffer overflow in SGL loop
> 
> The cvec pointer was incremented incorrectly in the case where the length of
> remaining_off equals cvec len, and there is no next cvec.
> This led to cvec->iova being invalid memory to access.
> 
> Instead, only increment the cvec pointer when we know there is a next cvec
> to point to, by checking the i value, which represents the number of cvecs
> available.
> If i is 0, then no need to increment as the current cvec is the last one.
> 
> Fixes: a815a04cea05 ("crypto/qat: support symmetric build op request")
> Cc: kai.ji@intel.com
> Cc: stable@dpdk.org
> 
> Signed-off-by: Ciara Power <ciara.power@intel.com>
> ---
>  drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> index 524c291340..092265631b 100644
> --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
> @@ -682,7 +682,8 @@ enqueue_one_chain_job_gen1(struct
> qat_sym_session *ctx,
>  		while (remaining_off >= cvec->len && i >= 1) {
>  			i--;
>  			remaining_off -= cvec->len;
> -			cvec++;
> +			if (i)
> +				cvec++;
>  		}
> 
>  		auth_iova_end = cvec->iova + remaining_off;
> --
> 2.25.1

Acked-by: Brian Dooley <brian.dooley@intel.com>
Akhil Goyal May 3, 2023, 7:30 a.m. UTC | #3 
> Acked-by: Kai Ji <kai.ji@intel.com>
Applied to dpdk-next-crypto
Thanks.
diff mbox series

Patch

diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
index 524c291340..092265631b 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
@@ -682,7 +682,8 @@  enqueue_one_chain_job_gen1(struct qat_sym_session *ctx,
 		while (remaining_off >= cvec->len && i >= 1) {
 			i--;
 			remaining_off -= cvec->len;
-			cvec++;
+			if (i)
+				cvec++;
 		}
 
 		auth_iova_end = cvec->iova + remaining_off;