[v2,1/3] eal: add x86 cpuid support for monitorx
Checks
Commit Message
Add a new CPUID flag to indicate support for monitorx instruction
on AMD Epyc processors.
Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
---
lib/eal/include/generic/rte_cpuflags.h | 2 ++
lib/eal/x86/include/rte_cpuflags.h | 1 +
lib/eal/x86/rte_cpuflags.c | 3 +++
3 files changed, 6 insertions(+)
Comments
On Thu, Apr 13, 2023 at 1:54 PM Sivaprasad Tummala
<sivaprasad.tummala@amd.com> wrote:
>
> Add a new CPUID flag to indicate support for monitorx instruction
> on AMD Epyc processors.
>
> Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
> ---
> lib/eal/include/generic/rte_cpuflags.h | 2 ++
> lib/eal/x86/include/rte_cpuflags.h | 1 +
> lib/eal/x86/rte_cpuflags.c | 3 +++
> 3 files changed, 6 insertions(+)
>
> diff --git a/lib/eal/include/generic/rte_cpuflags.h b/lib/eal/include/generic/rte_cpuflags.h
> index d35551e931..db653a8dd7 100644
> --- a/lib/eal/include/generic/rte_cpuflags.h
> +++ b/lib/eal/include/generic/rte_cpuflags.h
> @@ -26,6 +26,8 @@ struct rte_cpu_intrinsics {
> /**< indicates support for rte_power_pause function */
> uint32_t power_monitor_multi : 1;
> /**< indicates support for rte_power_monitor_multi function */
> + uint32_t amd_power_monitorx : 1;
> + /**< indicates amd support for rte_power_monitor function */
I did not look at the patch detail, I just stopped at this part.
What makes the AMD monitorx stuff special that it needs to be exposed
in the generic API?
[AMD Official Use Only - General]
Hi David,
> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, April 13, 2023 5:30 PM
> To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>
> Cc: david.hunt@intel.com; dev@dpdk.org; Thomas Monjalon
> <thomas@monjalon.net>; Burakov, Anatoly <anatoly.burakov@intel.com>
> Subject: Re: [PATCH v2 1/3] eal: add x86 cpuid support for monitorx
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On Thu, Apr 13, 2023 at 1:54 PM Sivaprasad Tummala
> <sivaprasad.tummala@amd.com> wrote:
> >
> > Add a new CPUID flag to indicate support for monitorx instruction on
> > AMD Epyc processors.
> >
> > Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
> > ---
> > lib/eal/include/generic/rte_cpuflags.h | 2 ++
> > lib/eal/x86/include/rte_cpuflags.h | 1 +
> > lib/eal/x86/rte_cpuflags.c | 3 +++
> > 3 files changed, 6 insertions(+)
> >
> > diff --git a/lib/eal/include/generic/rte_cpuflags.h
> > b/lib/eal/include/generic/rte_cpuflags.h
> > index d35551e931..db653a8dd7 100644
> > --- a/lib/eal/include/generic/rte_cpuflags.h
> > +++ b/lib/eal/include/generic/rte_cpuflags.h
> > @@ -26,6 +26,8 @@ struct rte_cpu_intrinsics {
> > /**< indicates support for rte_power_pause function */
> > uint32_t power_monitor_multi : 1;
> > /**< indicates support for rte_power_monitor_multi function */
> > + uint32_t amd_power_monitorx : 1;
> > + /**< indicates amd support for rte_power_monitor function */
>
> I did not look at the patch detail, I just stopped at this part.
> What makes the AMD monitorx stuff special that it needs to be exposed in the
> generic API?
Monitorx is different ISA /opcode (0F 01 FA) as compared to UMonitor (0F 01 C8). This need to be distinguished
on specific x86 platforms. Hence in the current power intrinsics, for x86 we require a new flag to
distinguish MonitorX and UMonitor and invoke the appropriate x86 ISA in the datapath.
Thanks & Regards,
Sivaprasad
On Thu, Apr 13, 2023 at 7:51 PM Tummala, Sivaprasad
<Sivaprasad.Tummala@amd.com> wrote:
>
> [AMD Official Use Only - General]
>
> Hi David,
>
> > -----Original Message-----
> > From: David Marchand <david.marchand@redhat.com>
> > Sent: Thursday, April 13, 2023 5:30 PM
> > To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>
> > Cc: david.hunt@intel.com; dev@dpdk.org; Thomas Monjalon
> > <thomas@monjalon.net>; Burakov, Anatoly <anatoly.burakov@intel.com>
> > Subject: Re: [PATCH v2 1/3] eal: add x86 cpuid support for monitorx
> >
> > Caution: This message originated from an External Source. Use proper caution
> > when opening attachments, clicking links, or responding.
> >
> >
> > On Thu, Apr 13, 2023 at 1:54 PM Sivaprasad Tummala
> > <sivaprasad.tummala@amd.com> wrote:
> > >
> > > Add a new CPUID flag to indicate support for monitorx instruction on
> > > AMD Epyc processors.
> > >
> > > Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
> > > ---
> > > lib/eal/include/generic/rte_cpuflags.h | 2 ++
> > > lib/eal/x86/include/rte_cpuflags.h | 1 +
> > > lib/eal/x86/rte_cpuflags.c | 3 +++
> > > 3 files changed, 6 insertions(+)
> > >
> > > diff --git a/lib/eal/include/generic/rte_cpuflags.h
> > > b/lib/eal/include/generic/rte_cpuflags.h
> > > index d35551e931..db653a8dd7 100644
> > > --- a/lib/eal/include/generic/rte_cpuflags.h
> > > +++ b/lib/eal/include/generic/rte_cpuflags.h
> > > @@ -26,6 +26,8 @@ struct rte_cpu_intrinsics {
> > > /**< indicates support for rte_power_pause function */
> > > uint32_t power_monitor_multi : 1;
> > > /**< indicates support for rte_power_monitor_multi function */
> > > + uint32_t amd_power_monitorx : 1;
> > > + /**< indicates amd support for rte_power_monitor function */
> >
> > I did not look at the patch detail, I just stopped at this part.
> > What makes the AMD monitorx stuff special that it needs to be exposed in the
> > generic API?
>
> Monitorx is different ISA /opcode (0F 01 FA) as compared to UMonitor (0F 01 C8). This need to be distinguished
> on specific x86 platforms. Hence in the current power intrinsics, for x86 we require a new flag to
> distinguish MonitorX and UMonitor and invoke the appropriate x86 ISA in the datapath.
Requiring a new x86 cpuflag to identify this ISA presence is ok.
But here, I am talking about the generic power instrinsic API.
Let me phrase my comment differently...
As described in the API:
uint32_t power_monitor : 1;
/**< indicates support for rte_power_monitor function */
Does AMD thing behave completely different from the x86?
Looking at patch 3, I understand this is not the case.
So we don't need a "amd" flag in the generic flags.
The indirection for calling the right ISA should be hidden in
rte_power_* helpers implemented for x86.
[AMD Official Use Only - General]
> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Friday, April 14, 2023 12:36 PM
> To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>
> Cc: david.hunt@intel.com; dev@dpdk.org; Thomas Monjalon
> <thomas@monjalon.net>; Burakov, Anatoly <anatoly.burakov@intel.com>
> Subject: Re: [PATCH v2 1/3] eal: add x86 cpuid support for monitorx
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On Thu, Apr 13, 2023 at 7:51 PM Tummala, Sivaprasad
> <Sivaprasad.Tummala@amd.com> wrote:
> >
> > [AMD Official Use Only - General]
> >
> > Hi David,
> >
> > > -----Original Message-----
> > > From: David Marchand <david.marchand@redhat.com>
> > > Sent: Thursday, April 13, 2023 5:30 PM
> > > To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>
> > > Cc: david.hunt@intel.com; dev@dpdk.org; Thomas Monjalon
> > > <thomas@monjalon.net>; Burakov, Anatoly <anatoly.burakov@intel.com>
> > > Subject: Re: [PATCH v2 1/3] eal: add x86 cpuid support for monitorx
> > >
> > > Caution: This message originated from an External Source. Use proper
> > > caution when opening attachments, clicking links, or responding.
> > >
> > >
> > > On Thu, Apr 13, 2023 at 1:54 PM Sivaprasad Tummala
> > > <sivaprasad.tummala@amd.com> wrote:
> > > >
> > > > Add a new CPUID flag to indicate support for monitorx instruction
> > > > on AMD Epyc processors.
> > > >
> > > > Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
> > > > ---
> > > > lib/eal/include/generic/rte_cpuflags.h | 2 ++
> > > > lib/eal/x86/include/rte_cpuflags.h | 1 +
> > > > lib/eal/x86/rte_cpuflags.c | 3 +++
> > > > 3 files changed, 6 insertions(+)
> > > >
> > > > diff --git a/lib/eal/include/generic/rte_cpuflags.h
> > > > b/lib/eal/include/generic/rte_cpuflags.h
> > > > index d35551e931..db653a8dd7 100644
> > > > --- a/lib/eal/include/generic/rte_cpuflags.h
> > > > +++ b/lib/eal/include/generic/rte_cpuflags.h
> > > > @@ -26,6 +26,8 @@ struct rte_cpu_intrinsics {
> > > > /**< indicates support for rte_power_pause function */
> > > > uint32_t power_monitor_multi : 1;
> > > > /**< indicates support for rte_power_monitor_multi
> > > > function */
> > > > + uint32_t amd_power_monitorx : 1;
> > > > + /**< indicates amd support for rte_power_monitor function
> > > > + */
> > >
> > > I did not look at the patch detail, I just stopped at this part.
> > > What makes the AMD monitorx stuff special that it needs to be
> > > exposed in the generic API?
> >
> > Monitorx is different ISA /opcode (0F 01 FA) as compared to UMonitor
> > (0F 01 C8). This need to be distinguished on specific x86 platforms.
> > Hence in the current power intrinsics, for x86 we require a new flag to distinguish
> MonitorX and UMonitor and invoke the appropriate x86 ISA in the datapath.
>
> Requiring a new x86 cpuflag to identify this ISA presence is ok.
>
>
> But here, I am talking about the generic power instrinsic API.
> Let me phrase my comment differently...
>
> As described in the API:
> uint32_t power_monitor : 1;
> /**< indicates support for rte_power_monitor function */
>
> Does AMD thing behave completely different from the x86?
> Looking at patch 3, I understand this is not the case.
>
> So we don't need a "amd" flag in the generic flags.
> The indirection for calling the right ISA should be hidden in
> rte_power_* helpers implemented for x86.
>
Thanks for your feedback. I will fix this and send an updated patch.
On 4/14/2023 8:05 AM, David Marchand wrote:
> On Thu, Apr 13, 2023 at 7:51 PM Tummala, Sivaprasad
> <Sivaprasad.Tummala@amd.com> wrote:
>>
>> [AMD Official Use Only - General]
>>
>> Hi David,
>>
>>> -----Original Message-----
>>> From: David Marchand <david.marchand@redhat.com>
>>> Sent: Thursday, April 13, 2023 5:30 PM
>>> To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>
>>> Cc: david.hunt@intel.com; dev@dpdk.org; Thomas Monjalon
>>> <thomas@monjalon.net>; Burakov, Anatoly <anatoly.burakov@intel.com>
>>> Subject: Re: [PATCH v2 1/3] eal: add x86 cpuid support for monitorx
>>>
>>> Caution: This message originated from an External Source. Use proper caution
>>> when opening attachments, clicking links, or responding.
>>>
>>>
>>> On Thu, Apr 13, 2023 at 1:54 PM Sivaprasad Tummala
>>> <sivaprasad.tummala@amd.com> wrote:
>>>>
>>>> Add a new CPUID flag to indicate support for monitorx instruction on
>>>> AMD Epyc processors.
>>>>
>>>> Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
>>>> ---
>>>> lib/eal/include/generic/rte_cpuflags.h | 2 ++
>>>> lib/eal/x86/include/rte_cpuflags.h | 1 +
>>>> lib/eal/x86/rte_cpuflags.c | 3 +++
>>>> 3 files changed, 6 insertions(+)
>>>>
>>>> diff --git a/lib/eal/include/generic/rte_cpuflags.h
>>>> b/lib/eal/include/generic/rte_cpuflags.h
>>>> index d35551e931..db653a8dd7 100644
>>>> --- a/lib/eal/include/generic/rte_cpuflags.h
>>>> +++ b/lib/eal/include/generic/rte_cpuflags.h
>>>> @@ -26,6 +26,8 @@ struct rte_cpu_intrinsics {
>>>> /**< indicates support for rte_power_pause function */
>>>> uint32_t power_monitor_multi : 1;
>>>> /**< indicates support for rte_power_monitor_multi function */
>>>> + uint32_t amd_power_monitorx : 1;
>>>> + /**< indicates amd support for rte_power_monitor function */
>>>
>>> I did not look at the patch detail, I just stopped at this part.
>>> What makes the AMD monitorx stuff special that it needs to be exposed in the
>>> generic API?
>>
>> Monitorx is different ISA /opcode (0F 01 FA) as compared to UMonitor (0F 01 C8). This need to be distinguished
>> on specific x86 platforms. Hence in the current power intrinsics, for x86 we require a new flag to
>> distinguish MonitorX and UMonitor and invoke the appropriate x86 ISA in the datapath.
>
> Requiring a new x86 cpuflag to identify this ISA presence is ok.
>
>
> But here, I am talking about the generic power instrinsic API.
> Let me phrase my comment differently...
>
> As described in the API:
> uint32_t power_monitor : 1;
> /**< indicates support for rte_power_monitor function */
>
> Does AMD thing behave completely different from the x86?
> Looking at patch 3, I understand this is not the case.
>
> So we don't need a "amd" flag in the generic flags.
> The indirection for calling the right ISA should be hidden in
> rte_power_* helpers implemented for x86.
>
>
The 'rte_cpu_get_intrinsics_support()' API and "struct
rte_cpu_intrinsics" struct seems intended to get power features in
generic way, agree to keep it generic.
But also there is a need to run architecture specific instructions, so
need to know the architecture within power library, for this what do you
think to check 'MONITORX' support again in 'rte_power_intrinsics_init()'
function?
And most of the 'amd_power_monitorx()' function is duplicate of the
'rte_power_monitor()' API, only difference is the asm calls, what do you
think to extract these calls to function pointers for AMD and Intel, so
that 'rte_power_monitor()' can become a x86 generic function?
As architecture will be known in the 'rte_power_intrinsics_init()', we
can set the function pointers properly for architecture in this init stage.
Only concern is possible performance impact of pointer dereference
instead of direct call, I hope @David Hunt can help us to test the
performance impact of it in Intel platforms if this approach is reasonable.
@@ -26,6 +26,8 @@ struct rte_cpu_intrinsics {
/**< indicates support for rte_power_pause function */
uint32_t power_monitor_multi : 1;
/**< indicates support for rte_power_monitor_multi function */
+ uint32_t amd_power_monitorx : 1;
+ /**< indicates amd support for rte_power_monitor function */
};
/**
@@ -133,6 +133,7 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_AVX512VP2INTERSECT, /**< AVX512 Two Register Intersection */
RTE_CPUFLAG_WAITPKG, /**< UMONITOR/UMWAIT/TPAUSE */
+ RTE_CPUFLAG_MONITORX, /**< MONITORX */
/* The last item */
RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */
@@ -133,6 +133,7 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0)
FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4)
+ FEAT_DEF(MONITORX, 0x80000001, 0, RTE_REG_ECX, 29)
FEAT_DEF(SYSCALL, 0x80000001, 0, RTE_REG_EDX, 11)
FEAT_DEF(XD, 0x80000001, 0, RTE_REG_EDX, 20)
@@ -191,5 +192,7 @@ rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)
intrinsics->power_pause = 1;
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_RTM))
intrinsics->power_monitor_multi = 1;
+ } else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_MONITORX)) {
+ intrinsics->amd_power_monitorx = 1;
}
}