@@ -619,7 +619,7 @@ qat_enqueue_op_burst(void *qp,
#ifdef BUILD_QAT_ASYM
ret = qat_asym_build_request(*ops, base_addr + tail,
tmp_qp->op_cookies[tail >> queue->trailz],
- tmp_qp->qat_dev_gen);
+ NULL, tmp_qp->qat_dev_gen);
#endif
}
if (ret != 0) {
@@ -847,7 +847,8 @@ qat_dequeue_op_burst(void *qp, void **ops,
#ifdef BUILD_QAT_ASYM
else if (tmp_qp->service_type == QAT_SERVICE_ASYMMETRIC)
qat_asym_process_response(ops, resp_msg,
- tmp_qp->op_cookies[head >> rx_queue->trailz]);
+ tmp_qp->op_cookies[head >> rx_queue->trailz],
+ NULL);
#endif
head = adf_modulo(head + rx_queue->msg_size,
@@ -1,68 +1,36 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2019 Intel Corporation
+ * Copyright(c) 2019 - 2022 Intel Corporation
*/
#include <stdarg.h>
-#include "qat_asym.h"
+#include <cryptodev_pmd.h>
+
#include "icp_qat_fw_pke.h"
#include "icp_qat_fw.h"
#include "qat_pke_functionality_arrays.h"
-#define qat_asym_sz_2param(arg) (arg, sizeof(arg)/sizeof(*arg))
-
-static int qat_asym_get_sz_and_func_id(const uint32_t arr[][2],
- size_t arr_sz, size_t *size, uint32_t *func_id)
-{
- size_t i;
-
- for (i = 0; i < arr_sz; i++) {
- if (*size <= arr[i][0]) {
- *size = arr[i][0];
- *func_id = arr[i][1];
- return 0;
- }
- }
- return -1;
-}
-
-static inline void qat_fill_req_tmpl(struct icp_qat_fw_pke_request *qat_req)
-{
- memset(qat_req, 0, sizeof(*qat_req));
- qat_req->pke_hdr.service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_PKE;
-
- qat_req->pke_hdr.hdr_flags =
- ICP_QAT_FW_COMN_HDR_FLAGS_BUILD
- (ICP_QAT_FW_COMN_REQ_FLAG_SET);
-}
-
-static inline void qat_asym_build_req_tmpl(void *sess_private_data)
-{
- struct icp_qat_fw_pke_request *qat_req;
- struct qat_asym_session *session = sess_private_data;
+#include "qat_device.h"
- qat_req = &session->req_tmpl;
- qat_fill_req_tmpl(qat_req);
-}
+#include "qat_logs.h"
+#include "qat_asym.h"
-static size_t max_of(int n, ...)
-{
- va_list args;
- size_t len = 0, num;
- int i;
+uint8_t qat_asym_driver_id;
- va_start(args, n);
- len = va_arg(args, size_t);
+struct qat_crypto_gen_dev_ops qat_asym_gen_dev_ops[QAT_N_GENS];
- for (i = 0; i < n - 1; i++) {
- num = va_arg(args, size_t);
- if (num > len)
- len = num;
- }
- va_end(args);
+/* An rte_driver is needed in the registration of both the device and the driver
+ * with cryptodev.
+ * The actual qat pci's rte_driver can't be used as its name represents
+ * the whole pci device with all services. Think of this as a holder for a name
+ * for the crypto part of the pci device.
+ */
+static const char qat_asym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_ASYM_PMD);
+static const struct rte_driver cryptodev_qat_asym_driver = {
+ .name = qat_asym_drv_name,
+ .alias = qat_asym_drv_name
+};
- return len;
-}
static void qat_clear_arrays(struct qat_asym_op_cookie *cookie,
int in_count, int out_count, int alg_size)
@@ -106,7 +74,46 @@ static void qat_clear_arrays_by_alg(struct qat_asym_op_cookie *cookie,
}
}
-static int qat_asym_check_nonzero(rte_crypto_param n)
+#define qat_asym_sz_2param(arg) (arg, sizeof(arg)/sizeof(*arg))
+
+static int
+qat_asym_get_sz_and_func_id(const uint32_t arr[][2],
+ size_t arr_sz, size_t *size, uint32_t *func_id)
+{
+ size_t i;
+
+ for (i = 0; i < arr_sz; i++) {
+ if (*size <= arr[i][0]) {
+ *size = arr[i][0];
+ *func_id = arr[i][1];
+ return 0;
+ }
+ }
+ return -1;
+}
+
+static size_t
+max_of(int n, ...)
+{
+ va_list args;
+ size_t len = 0, num;
+ int i;
+
+ va_start(args, n);
+ len = va_arg(args, size_t);
+
+ for (i = 0; i < n - 1; i++) {
+ num = va_arg(args, size_t);
+ if (num > len)
+ len = num;
+ }
+ va_end(args);
+
+ return len;
+}
+
+static int
+qat_asym_check_nonzero(rte_crypto_param n)
{
if (n.length < 8) {
/* Not a case for any cryptographic function except for DH
@@ -475,10 +482,9 @@ qat_asym_fill_arrays(struct rte_crypto_asym_op *asym_op,
}
int
-qat_asym_build_request(void *in_op,
- uint8_t *out_msg,
- void *op_cookie,
- __rte_unused enum qat_device_gen qat_dev_gen)
+qat_asym_build_request(void *in_op, uint8_t *out_msg, void *op_cookie,
+ __rte_unused uint64_t *opaque,
+ __rte_unused enum qat_device_gen dev_gen)
{
struct qat_asym_session *ctx;
struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
@@ -677,9 +683,9 @@ static void qat_asym_collect_response(struct rte_crypto_op *rx_op,
qat_clear_arrays_by_alg(cookie, xform, alg_size_in_bytes);
}
-void
+int
qat_asym_process_response(void **op, uint8_t *resp,
- void *op_cookie)
+ void *op_cookie, __rte_unused uint64_t *dequeue_err_count)
{
struct qat_asym_session *ctx;
struct icp_qat_fw_pke_resp *resp_msg =
@@ -722,6 +728,8 @@ qat_asym_process_response(void **op, uint8_t *resp,
QAT_DP_HEXDUMP_LOG(DEBUG, "resp_msg:", resp_msg,
sizeof(struct icp_qat_fw_pke_resp));
#endif
+
+ return 1;
}
int
@@ -779,3 +787,8 @@ qat_asym_session_clear(struct rte_cryptodev *dev,
if (sess_priv)
memset(s, 0, qat_asym_session_get_private_size(dev));
}
+
+static struct cryptodev_driver qat_crypto_drv;
+RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv,
+ cryptodev_qat_asym_driver,
+ qat_asym_driver_id);
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2019 Intel Corporation
+ * Copyright(c) 2022 Intel Corporation
*/
#ifndef _QAT_ASYM_H_
@@ -8,10 +8,13 @@
#include <cryptodev_pmd.h>
#include <rte_crypto_asym.h>
#include "icp_qat_fw_pke.h"
-#include "qat_common.h"
-#include "qat_asym_pmd.h"
+#include "qat_device.h"
+#include "qat_crypto.h"
#include "icp_qat_fw.h"
+/** Intel(R) QAT Asymmetric Crypto PMD driver name */
+#define CRYPTODEV_NAME_QAT_ASYM_PMD crypto_qat_asym
+
typedef uint64_t large_int_ptr;
#define MAX_PKE_PARAMS 8
#define QAT_PKE_MAX_LN_SIZE 512
@@ -26,6 +29,28 @@ typedef uint64_t large_int_ptr;
#define QAT_ASYM_RSA_NUM_OUT_PARAMS 1
#define QAT_ASYM_RSA_QT_NUM_IN_PARAMS 6
+/**
+ * helper function to add an asym capability
+ * <name> <op type> <modlen (min, max, increment)>
+ **/
+#define QAT_ASYM_CAP(n, o, l, r, i) \
+ { \
+ .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, \
+ {.asym = { \
+ .xform_capa = { \
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_##n,\
+ .op_types = o, \
+ { \
+ .modlen = { \
+ .min = l, \
+ .max = r, \
+ .increment = i \
+ }, } \
+ } \
+ }, \
+ } \
+ }
+
struct qat_asym_op_cookie {
size_t alg_size;
uint64_t error;
@@ -45,6 +70,27 @@ struct qat_asym_session {
struct rte_crypto_asym_xform *xform;
};
+static inline void
+qat_fill_req_tmpl(struct icp_qat_fw_pke_request *qat_req)
+{
+ memset(qat_req, 0, sizeof(*qat_req));
+ qat_req->pke_hdr.service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_PKE;
+
+ qat_req->pke_hdr.hdr_flags =
+ ICP_QAT_FW_COMN_HDR_FLAGS_BUILD
+ (ICP_QAT_FW_COMN_REQ_FLAG_SET);
+}
+
+static inline void
+qat_asym_build_req_tmpl(void *sess_private_data)
+{
+ struct icp_qat_fw_pke_request *qat_req;
+ struct qat_asym_session *session = sess_private_data;
+
+ qat_req = &session->req_tmpl;
+ qat_fill_req_tmpl(qat_req);
+}
+
int
qat_asym_session_configure(struct rte_cryptodev *dev __rte_unused,
struct rte_crypto_asym_xform *xform,
@@ -75,7 +121,9 @@ qat_asym_session_clear(struct rte_cryptodev *dev,
*/
int
qat_asym_build_request(void *in_op, uint8_t *out_msg,
- void *op_cookie, enum qat_device_gen qat_dev_gen);
+ void *op_cookie,
+ __rte_unused uint64_t *opaque,
+ enum qat_device_gen qat_dev_gen);
/*
* Process PKE response received from outgoing queue of QAT
@@ -87,8 +135,11 @@ qat_asym_build_request(void *in_op, uint8_t *out_msg,
* @param op_cookie Cookie pointer that holds private metadata
*
*/
+int
+qat_asym_process_response(void **op, uint8_t *resp,
+ void *op_cookie, __rte_unused uint64_t *dequeue_err_count);
+
void
-qat_asym_process_response(void __rte_unused **op, uint8_t *resp,
- void *op_cookie);
+qat_asym_init_op_cookie(void *cookie);
#endif /* _QAT_ASYM_H_ */