[3/6] crypto/cnxk: add cn9k ESN and anti-replay support

Message ID 20211028165228.14603-4-marchana@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series add cnxk lookaside IPsec additional features |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Archana Muniganti Oct. 28, 2021, 4:52 p.m. UTC
  Adds ESN and anti-replay support for lookaside IPsec.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 doc/guides/cryptodevs/cnxk.rst          |  2 +
 doc/guides/rel_notes/release_21_11.rst  |  1 +
 drivers/common/cnxk/cnxk_security_ar.h  | 21 +++++++++
 drivers/crypto/cnxk/cn9k_ipsec.c        | 17 ++++++++
 drivers/crypto/cnxk/cn9k_ipsec.h        |  5 +++
 drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 58 +++++++++++++++++++++++++
 6 files changed, 104 insertions(+)
  

Patch

diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst
index 709da56ca8..faad6a499d 100644
--- a/doc/guides/cryptodevs/cnxk.rst
+++ b/doc/guides/cryptodevs/cnxk.rst
@@ -248,6 +248,8 @@  CN9XX Features supported
 * Tunnel mode
 * UDP Encapsulation
 * AES-128/192/256-GCM
+* ESN
+* Anti-replay
 
 CN10XX Features supported
 ~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst
index 6cc7b2579e..82cdff641a 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -213,6 +213,7 @@  New Features
   * Added support for CN98xx dual block.
   * Added inner checksum support in lookaside protocol (IPsec) for CN10K.
   * Added AES-CBC NULL auth support in lookaside protocol (IPsec) for CN10K.
+  * Added ESN and anti-replay support in lookaside protocol (IPsec) for CN9K.
 
 * **Added support for event crypto adapter on Marvell CN10K and CN9K.**
 
diff --git a/drivers/common/cnxk/cnxk_security_ar.h b/drivers/common/cnxk/cnxk_security_ar.h
index 6bc517c875..3ec4c296c2 100644
--- a/drivers/common/cnxk/cnxk_security_ar.h
+++ b/drivers/common/cnxk/cnxk_security_ar.h
@@ -30,6 +30,27 @@  struct cnxk_on_ipsec_ar {
 	uint64_t window[AR_WIN_ARR_SZ]; /**< anti-replay window */
 };
 
+static inline uint32_t
+cnxk_on_anti_replay_get_seqh(uint32_t winsz, uint32_t seql, uint32_t esn_hi,
+			     uint32_t esn_low)
+{
+	uint32_t win_low = esn_low - winsz + 1;
+
+	if (esn_low > winsz - 1) {
+		/* Window is in one sequence number subspace */
+		if (seql > win_low)
+			return esn_hi;
+		else
+			return esn_hi + 1;
+	} else {
+		/* Window is split across two sequence number subspaces */
+		if (seql > win_low)
+			return esn_hi - 1;
+		else
+			return esn_hi;
+	}
+}
+
 static inline int
 cnxk_on_anti_replay_check(uint64_t seq, struct cnxk_on_ipsec_ar *ar,
 			  uint32_t winsz)
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index a43864df0d..ca26d9289c 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -445,6 +445,7 @@  cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
 	memset(sa, 0, sizeof(struct cn9k_ipsec_sa));
 
 	sa->dir = RTE_SECURITY_IPSEC_SA_DIR_INGRESS;
+	sa->replay_win_sz = ipsec->replay_win_sz;
 
 	ret = fill_ipsec_common_sa(ipsec, crypto_xform, &in_sa->common_sa);
 	if (ret)
@@ -483,6 +484,22 @@  cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
 	w7.s.cptr = rte_mempool_virt2iova(in_sa);
 	inst_tmpl->w7 = w7.u64;
 
+	if (sa->replay_win_sz) {
+		if (sa->replay_win_sz > CNXK_ON_AR_WIN_SIZE_MAX) {
+			plt_err("Replay window size:%u is not supported",
+				sa->replay_win_sz);
+			return -ENOTSUP;
+		}
+
+		/* Set window bottom to 1, base and top to size of window */
+		sa->ar.winb = 1;
+		sa->ar.wint = sa->replay_win_sz;
+		sa->ar.base = sa->replay_win_sz;
+
+		in_sa->common_sa.esn_low = 0;
+		in_sa->common_sa.esn_hi = 0;
+	}
+
 	return cn9k_cpt_enq_sa_write(
 		sa, qp, ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_INBOUND, ctx_len);
 }
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.h b/drivers/crypto/cnxk/cn9k_ipsec.h
index 13d522ec6f..fc440d54ba 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec.h
@@ -7,6 +7,7 @@ 
 
 #include "cnxk_ipsec.h"
 #include "cnxk_security.h"
+#include "cnxk_security_ar.h"
 
 struct cn9k_ipsec_sa {
 	union {
@@ -35,6 +36,10 @@  struct cn9k_ipsec_sa {
 			uint32_t seq_hi;
 		};
 	};
+	/** Anti replay */
+	struct cnxk_on_ipsec_ar ar;
+	/** Anti replay window size */
+	uint32_t replay_win_sz;
 };
 
 struct cn9k_sec_session {
diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
index b7a88e1b35..2dc8913feb 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
@@ -6,9 +6,11 @@ 
 #define __CN9K_IPSEC_LA_OPS_H__
 
 #include <rte_crypto_sym.h>
+#include <rte_esp.h>
 #include <rte_security.h>
 
 #include "cn9k_ipsec.h"
+#include "cnxk_security_ar.h"
 
 static __rte_always_inline int32_t
 ipsec_po_out_rlen_get(struct cn9k_ipsec_sa *sa, uint32_t plen)
@@ -21,6 +23,53 @@  ipsec_po_out_rlen_get(struct cn9k_ipsec_sa *sa, uint32_t plen)
 	return sa->rlens.partial_len + enc_payload_len;
 }
 
+static __rte_always_inline int
+ipsec_antireplay_check(struct cn9k_ipsec_sa *sa, uint32_t win_sz,
+		       struct rte_mbuf *m)
+{
+	uint32_t esn_low = 0, esn_hi = 0, seql = 0, seqh = 0;
+	struct roc_ie_on_common_sa *common_sa;
+	struct roc_ie_on_inb_sa *in_sa;
+	struct roc_ie_on_sa_ctl *ctl;
+	uint64_t seq_in_sa, seq = 0;
+	struct rte_esp_hdr *esp;
+	uint8_t esn;
+	int ret;
+
+	in_sa = &sa->in_sa;
+	common_sa = &in_sa->common_sa;
+	ctl = &common_sa->ctl;
+
+	esn = ctl->esn_en;
+	esn_low = rte_be_to_cpu_32(common_sa->esn_low);
+	esn_hi = rte_be_to_cpu_32(common_sa->esn_hi);
+
+	esp = rte_pktmbuf_mtod_offset(m, void *, sizeof(struct rte_ipv4_hdr));
+	seql = rte_be_to_cpu_32(esp->seq);
+
+	if (!esn) {
+		seq = (uint64_t)seql;
+	} else {
+		seqh = cnxk_on_anti_replay_get_seqh(win_sz, seql, esn_hi,
+						    esn_low);
+		seq = ((uint64_t)seqh << 32) | seql;
+	}
+
+	if (unlikely(seq == 0))
+		return IPSEC_ANTI_REPLAY_FAILED;
+
+	ret = cnxk_on_anti_replay_check(seq, &sa->ar, win_sz);
+	if (esn && !ret) {
+		seq_in_sa = ((uint64_t)esn_hi << 32) | esn_low;
+		if (seq > seq_in_sa) {
+			common_sa->esn_low = rte_cpu_to_be_32(seql);
+			common_sa->esn_hi = rte_cpu_to_be_32(seqh);
+		}
+	}
+
+	return ret;
+}
+
 static __rte_always_inline int
 process_outb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,
 		struct cpt_inst_s *inst)
@@ -78,6 +127,15 @@  process_inb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,
 {
 	struct rte_crypto_sym_op *sym_op = cop->sym;
 	struct rte_mbuf *m_src = sym_op->m_src;
+	int ret;
+
+	if (sa->replay_win_sz) {
+		ret = ipsec_antireplay_check(sa, sa->replay_win_sz, m_src);
+		if (unlikely(ret)) {
+			plt_dp_err("Anti replay check failed");
+			return ret;
+		}
+	}
 
 	/* Prepare CPT instruction */
 	inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src);