diff mbox series

[3/6] net/mlx5: enable meter bucket overflow for yellow color

Message ID 20210705155756.21443-4-bingz@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series support yellow color policy in mlx5 |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Bing Zhao July 5, 2021, 3:57 p.m. UTC 
  To support the meter policy for yellow action, the prerequisite is
that the hardware needs to support the EBS and then the yellow color
of packets can be marked for the further steering.

In the current implementation EBS and overflow were ignored when
creating a meter profile. With this commit, if EBS is set by the
application, the generation of yellow color will be enabled in the
hardware for flow rules steering of packets.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_aso.c   |  3 +++
 drivers/net/mlx5/mlx5_flow_meter.c | 10 +++++-----
 2 files changed, 8 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c
index 64631ffc29..a8cb590b57 100644
--- a/drivers/net/mlx5/mlx5_flow_aso.c
+++ b/drivers/net/mlx5/mlx5_flow_aso.c
@@ -747,6 +747,9 @@  mlx5_aso_mtr_sq_enqueue_single(struct mlx5_aso_sq *sq,
 		wqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm =
 				RTE_BE32((1 << ASO_DSEG_VALID_OFFSET) |
 				(MLX5_FLOW_COLOR_GREEN << ASO_DSEG_SC_OFFSET));
+	if (fm->profile->srtcm_prm.ebs_eir)
+		wqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm |=
+				RTE_BE32(1 << ASO_DSEG_BO_OFFSET);
 	sq->head++;
 	sq->pi += 2;/* Each WQE contains 2 WQEBB's. */
 	rte_io_wmb();
diff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c
index d313786eb3..68351db1ce 100644
--- a/drivers/net/mlx5/mlx5_flow_meter.c
+++ b/drivers/net/mlx5/mlx5_flow_meter.c
@@ -312,9 +312,9 @@  mlx5_flow_meter_param_fill(struct mlx5_flow_meter_profile *fmp,
 	cbs_man = man;
 	cbs_exp = exp;
 	srtcm->cbs_cir = rte_cpu_to_be_32(cbs_exp << ASO_DSEG_CBS_EXP_OFFSET |
-				cbs_man << ASO_DSEG_CBS_MAN_OFFSET |
-				cir_exp << ASO_DSEG_CIR_EXP_OFFSET |
-				cir_man);
+					  cbs_man << ASO_DSEG_CBS_MAN_OFFSET |
+					  cir_exp << ASO_DSEG_CIR_EXP_OFFSET |
+					  cir_man);
 	mlx5_flow_meter_xbs_man_exp_calc(ebs, &man, &exp);
 	/* Check if ebs mantissa is too large. */
 	if (exp > ASO_DSEG_EXP_MASK)
@@ -325,7 +325,7 @@  mlx5_flow_meter_param_fill(struct mlx5_flow_meter_profile *fmp,
 	ebs_man = man;
 	ebs_exp = exp;
 	srtcm->ebs_eir = rte_cpu_to_be_32(ebs_exp << ASO_DSEG_EBS_EXP_OFFSET |
-					ebs_man << ASO_DSEG_EBS_MAN_OFFSET);
+					  ebs_man << ASO_DSEG_EBS_MAN_OFFSET);
 	return 0;
 }
 
@@ -414,7 +414,7 @@  mlx5_flow_meter_profile_add(struct rte_eth_dev *dev,
 		return ret;
 	/* Meter profile memory allocation. */
 	fmp = mlx5_malloc(MLX5_MEM_ZERO, sizeof(struct mlx5_flow_meter_profile),
-			 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
+			  RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 	if (fmp == NULL)
 		return -rte_mtr_error_set(error, ENOMEM,
 					  RTE_MTR_ERROR_TYPE_UNSPECIFIED,