diff mbox series

[v3,1/1] build: add Graviton2(arm64) meson configuration

Message ID 20201103180645.34467-2-vcchunga@amazon.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers show
Series build: add Graviton2(arm64) meson configuration | expand

Checks

Context Check Description
ci/travis-robot success Travis build: passed
ci/Intel-compilation success Compilation OK
ci/iol-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/checkpatch success coding style OK

Commit Message

Vimal Chungath Nov. 3, 2020, 6:06 p.m. UTC
Add meson build configuration for Graviton2 platform
with 64-bit Arm Neoverse N1 cores. This patch makes the
following changes to generic Neoverse N1 config:

1. increase lcore limit to 64
2. increase memory support to 1TB
3. remove +crc from -march as that is default when setting armv8.2

For more information about Graviton2 platform, refer to:
https://aws.amazon.com/ec2/graviton/

Signed-off-by: Vimal Chungath <vcchunga@amazon.com>
---
 config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build               | 18 +++++++++++-------
 2 files changed, 28 insertions(+), 7 deletions(-)
 create mode 100644 config/arm/arm64_graviton2_linux_gcc

Comments

Thomas Monjalon Nov. 3, 2020, 6:32 p.m. UTC | #1
03/11/2020 19:06, Vimal Chungath:
> Add meson build configuration for Graviton2 platform
> with 64-bit Arm Neoverse N1 cores. This patch makes the
> following changes to generic Neoverse N1 config:
> 
> 1. increase lcore limit to 64
> 2. increase memory support to 1TB
> 3. remove +crc from -march as that is default when setting armv8.2
> 
> For more information about Graviton2 platform, refer to:
> https://aws.amazon.com/ec2/graviton/
> 
> Signed-off-by: Vimal Chungath <vcchunga@amazon.com>
> ---
>  config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
>  config/arm/meson.build               | 18 +++++++++++-------
>  2 files changed, 28 insertions(+), 7 deletions(-)

Can this patch be merged without the rework from Juraj?
Jerin Jacob Kollanukkaran Nov. 3, 2020, 6:38 p.m. UTC | #2
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Wednesday, November 4, 2020 12:02 AM
> To: Vimal Chungath <vcchunga@amazon.com>;
> honnappa.nagarahalli@arm.com; Dharmik.Thakkar@arm.com; Jerin Jacob
> Kollanukkaran <jerinj@marvell.com>; juraj.linkes@pantheon.tech
> Cc: dev@dpdk.org; alisaidi@amazon.com; bruce.richardson@intel.com;
> hemant.agrawal@nxp.com; jerinjacobk@gmail.com; nd@arm.com
> Subject: [EXT] Re: [PATCH v3 1/1] build: add Graviton2(arm64) meson
> configuration
> 
> External Email
> 
> ----------------------------------------------------------------------
> 03/11/2020 19:06, Vimal Chungath:
> > Add meson build configuration for Graviton2 platform with 64-bit Arm
> > Neoverse N1 cores. This patch makes the following changes to generic
> > Neoverse N1 config:
> >
> > 1. increase lcore limit to 64
> > 2. increase memory support to 1TB
> > 3. remove +crc from -march as that is default when setting armv8.2
> >
> > For more information about Graviton2 platform, refer to:
> > https://urldefense.proofpoint.com/v2/url?u=https-3A__aws.amazon.com_ec
> >
> 2_graviton_&d=DwICAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=1DGob4H4rxz6H8uI
> TozGOC
> > a0s5f4wCNtTa4UUKvcsvI&m=VIL7guv5hWfA3ZiECZxC4FEeNOo_69gC-
> HJTjyaKbrU&s=
> > z3abjQkX_xJl1gOHkfowNmcVS0an6I2Dbzf8NTtoUQ0&e=
> >
> > Signed-off-by: Vimal Chungath <vcchunga@amazon.com>
> > ---
> >  config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
> >  config/arm/meson.build               | 18 +++++++++++-------
> >  2 files changed, 28 insertions(+), 7 deletions(-)
> 
> Can this patch be merged without the rework from Juraj?

Yes. +1 

@Vimal Chungath, Could you review and test Juraj changes on Graviton2 so that
Juraj changes can be targeted for 21.02.


> 
>
Vimal Chungath Nov. 3, 2020, 6:51 p.m. UTC | #3
On 11/3/20 10:38 AM, Jerin Jacob Kollanukkaran wrote:
>
>
>> -----Original Message-----
>> From: Thomas Monjalon <thomas@monjalon.net>
>> Sent: Wednesday, November 4, 2020 12:02 AM
>> To: Vimal Chungath <vcchunga@amazon.com>;
>> honnappa.nagarahalli@arm.com; Dharmik.Thakkar@arm.com; Jerin Jacob
>> Kollanukkaran <jerinj@marvell.com>; juraj.linkes@pantheon.tech
>> Cc: dev@dpdk.org; alisaidi@amazon.com; bruce.richardson@intel.com;
>> hemant.agrawal@nxp.com; jerinjacobk@gmail.com; nd@arm.com
>> Subject: [EXT] Re: [PATCH v3 1/1] build: add Graviton2(arm64) meson
>> configuration
>>
>> External Email
>>
>> ----------------------------------------------------------------------
>> 03/11/2020 19:06, Vimal Chungath:
>>> Add meson build configuration for Graviton2 platform with 64-bit Arm
>>> Neoverse N1 cores. This patch makes the following changes to generic
>>> Neoverse N1 config:
>>>
>>> 1. increase lcore limit to 64
>>> 2. increase memory support to 1TB
>>> 3. remove +crc from -march as that is default when setting armv8.2
>>>
>>> Signed-off-by: Vimal Chungath <vcchunga@amazon.com>
>>> ---
>>>  config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
>>>  config/arm/meson.build               | 18 +++++++++++-------
>>>  2 files changed, 28 insertions(+), 7 deletions(-)
>>
>> Can this patch be merged without the rework from Juraj?
>
> Yes. +1
>
> @Vimal Chungath, Could you review and test Juraj changes on Graviton2 so that
> Juraj changes can be targeted for 21.02.
>
Yes, will do that.
Honnappa Nagarahalli Nov. 3, 2020, 7:39 p.m. UTC | #4
<snip>

> >> ---------------------------------------------------------------------
> >> -
> >> 03/11/2020 19:06, Vimal Chungath:
> >>> Add meson build configuration for Graviton2 platform with 64-bit Arm
> >>> Neoverse N1 cores. This patch makes the following changes to generic
> >>> Neoverse N1 config:
> >>>
> >>> 1. increase lcore limit to 64
> >>> 2. increase memory support to 1TB
> >>> 3. remove +crc from -march as that is default when setting armv8.2
> >>>
> >>> Signed-off-by: Vimal Chungath <vcchunga@amazon.com>
> >>> ---
> >>>  config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
> >>>  config/arm/meson.build               | 18 +++++++++++-------
> >>>  2 files changed, 28 insertions(+), 7 deletions(-)
> >>
> >> Can this patch be merged without the rework from Juraj?
+1 for merge into 20.11

> >
> > Yes. +1
> >
> > @Vimal Chungath, Could you review and test Juraj changes on Graviton2
> > so that Juraj changes can be targeted for 21.02.
> >
> Yes, will do that.
Please wait for my Reviewed-by on Juraj's patch.
Honnappa Nagarahalli Nov. 3, 2020, 7:45 p.m. UTC | #5
> -----Original Message-----
> From: Vimal Chungath <vcchunga@amazon.com>
> Sent: Tuesday, November 3, 2020 12:07 PM
> To: dev@dpdk.org
> Cc: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>; Dharmik
> Thakkar <Dharmik.Thakkar@arm.com>; alisaidi@amazon.com;
> bruce.richardson@intel.com; hemant.agrawal@nxp.com;
> jerinj@marvell.com; jerinjacobk@gmail.com; juraj.linkes@pantheon.tech;
> nd <nd@arm.com>; thomas@monjalon.net
> Subject: [PATCH v3 1/1] build: add Graviton2(arm64) meson configuration
> 
> Add meson build configuration for Graviton2 platform with 64-bit Arm
> Neoverse N1 cores. This patch makes the following changes to generic
> Neoverse N1 config:
> 
> 1. increase lcore limit to 64
> 2. increase memory support to 1TB
> 3. remove +crc from -march as that is default when setting armv8.2
> 
> For more information about Graviton2 platform, refer to:
> https://aws.amazon.com/ec2/graviton/
> 
> Signed-off-by: Vimal Chungath <vcchunga@amazon.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>

> ---
>  config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
>  config/arm/meson.build               | 18 +++++++++++-------
>  2 files changed, 28 insertions(+), 7 deletions(-)  create mode 100644
> config/arm/arm64_graviton2_linux_gcc
> 
> diff --git a/config/arm/arm64_graviton2_linux_gcc
> b/config/arm/arm64_graviton2_linux_gcc
> new file mode 100644
> index 000000000..022e06303
> --- /dev/null
> +++ b/config/arm/arm64_graviton2_linux_gcc
> @@ -0,0 +1,17 @@
> +[binaries]
> +c = 'aarch64-linux-gnu-gcc'
> +cpp = 'aarch64-linux-gnu-cpp'
> +ar = 'aarch64-linux-gnu-gcc-ar'
> +strip = 'aarch64-linux-gnu-strip'
> +pkgconfig = 'aarch64-linux-gnu-pkg-config'
> +pcap-config = ''
> +
> +[host_machine]
> +system = 'linux'
> +cpu_family = 'aarch64'
> +cpu = 'armv8-a'
> +endian = 'little'
> +
> +[properties]
> +implementor_id = '0x41'
> +implementor_pn = '0xd0c'
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> b49203fa8..073b4afc0 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -63,12 +63,6 @@ flags_armada = [
>  	['RTE_MAX_LCORE', 16]]
> 
>  flags_default_extra = []
> -flags_n1sdp_extra = [
> -	['RTE_MACHINE', '"n1sdp"'],
> -	['RTE_MAX_NUMA_NODES', 1],
> -	['RTE_MAX_LCORE', 4],
> -	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> -	['RTE_LIBRTE_VHOST_NUMA', false]]
>  flags_thunderx_extra = [
>  	['RTE_MACHINE', '"thunderx"'],
>  	['RTE_USE_C11_MEM_MODEL', false]]
> @@ -86,6 +80,16 @@ flags_octeontx2_extra = [
>  	['RTE_ARM_FEATURE_ATOMICS', true],
>  	['RTE_EAL_IGB_UIO', false],
>  	['RTE_USE_C11_MEM_MODEL', true]]
> +flags_n1generic_extra = [
> +	['RTE_MACHINE', '"neoverse-n1"'],
> +	['RTE_MAX_LCORE', 64],
> +	['RTE_CACHE_LINE_SIZE', 64],
> +	['RTE_ARM_FEATURE_ATOMICS', true],
> +	['RTE_USE_C11_MEM_MODEL', true],
> +	['RTE_MAX_MEM_MB', 1048576],
> +	['RTE_MAX_NUMA_NODES', 1],
> +	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> +	['RTE_LIBRTE_VHOST_NUMA', false]]
> 
>  machine_args_generic = [
>  	['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@ -97,7
> +101,7 @@ machine_args_generic = [
>  	['0xd09', ['-mcpu=cortex-a73']],
>  	['0xd0a', ['-mcpu=cortex-a75']],
>  	['0xd0b', ['-mcpu=cortex-a76']],
> -	['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],
> flags_n1sdp_extra]]
> +	['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
> +flags_n1generic_extra]]
> 
>  machine_args_cavium = [
>  	['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> --
> 2.16.6
Thomas Monjalon Nov. 3, 2020, 8:04 p.m. UTC | #6
> > Add meson build configuration for Graviton2 platform with 64-bit Arm
> > Neoverse N1 cores. This patch makes the following changes to generic
> > Neoverse N1 config:
> > 
> > 1. increase lcore limit to 64
> > 2. increase memory support to 1TB
> > 3. remove +crc from -march as that is default when setting armv8.2
> > 
> > For more information about Graviton2 platform, refer to:
> > https://aws.amazon.com/ec2/graviton/
> > 
> > Signed-off-by: Vimal Chungath <vcchunga@amazon.com>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>

Applied, thanks
diff mbox series

Patch

diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc
new file mode 100644
index 000000000..022e06303
--- /dev/null
+++ b/config/arm/arm64_graviton2_linux_gcc
@@ -0,0 +1,17 @@ 
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x41'
+implementor_pn = '0xd0c'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index b49203fa8..073b4afc0 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -63,12 +63,6 @@  flags_armada = [
 	['RTE_MAX_LCORE', 16]]
 
 flags_default_extra = []
-flags_n1sdp_extra = [
-	['RTE_MACHINE', '"n1sdp"'],
-	['RTE_MAX_NUMA_NODES', 1],
-	['RTE_MAX_LCORE', 4],
-	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
-	['RTE_LIBRTE_VHOST_NUMA', false]]
 flags_thunderx_extra = [
 	['RTE_MACHINE', '"thunderx"'],
 	['RTE_USE_C11_MEM_MODEL', false]]
@@ -86,6 +80,16 @@  flags_octeontx2_extra = [
 	['RTE_ARM_FEATURE_ATOMICS', true],
 	['RTE_EAL_IGB_UIO', false],
 	['RTE_USE_C11_MEM_MODEL', true]]
+flags_n1generic_extra = [
+	['RTE_MACHINE', '"neoverse-n1"'],
+	['RTE_MAX_LCORE', 64],
+	['RTE_CACHE_LINE_SIZE', 64],
+	['RTE_ARM_FEATURE_ATOMICS', true],
+	['RTE_USE_C11_MEM_MODEL', true],
+	['RTE_MAX_MEM_MB', 1048576],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+	['RTE_LIBRTE_VHOST_NUMA', false]]
 
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc', '-moutline-atomics']],
@@ -97,7 +101,7 @@  machine_args_generic = [
 	['0xd09', ['-mcpu=cortex-a73']],
 	['0xd0a', ['-mcpu=cortex-a75']],
 	['0xd0b', ['-mcpu=cortex-a76']],
-	['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], flags_n1sdp_extra]]
+	['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_n1generic_extra]]
 
 machine_args_cavium = [
 	['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],