| Message ID | 20200806142410.3795851-1-ferruh.yigit@intel.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Thomas Monjalon |
| Headers | show |
| Series | devtools: add acronyms in dictionary for commit checks | expand |
| Context | Check | Description |
|---|---|---|
| ci/iol-testing | success | Testing PASS |
| ci/iol-mellanox-Performance | success | Performance Testing PASS |
| ci/travis-robot | success | Travis build: passed |
| ci/iol-intel-Performance | success | Performance Testing PASS |
| ci/Intel-compilation | success | Compilation OK |
| ci/checkpatch | success | coding style OK |
06/08/2020 16:24, Ferruh Yigit: > GTPU -> GPRS Tunnelling Protocol User Plane > MSI -> Message Signalled Interrupts > MSI-X -> Message Signalled Interrupts (Extended) > TCAM -> Ternary Content Addressable Memory > ULP -> Upper Layer Protocol > XOR -> Exclusive OR > > Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Applied, thanks
diff --git a/devtools/words-case.txt b/devtools/words-case.txt index 0fc937843e..f3eb4bb60d 100644 --- a/devtools/words-case.txt +++ b/devtools/words-case.txt @@ -15,6 +15,7 @@ FDIR FreeBSD FW GENEVE +GTPU HW IO IOTLB @@ -29,6 +30,8 @@ LRO LSC MAC MPLS +MSI +MSI-X MSS MTU NEON @@ -50,12 +53,14 @@ Rx SCTP SW TC +TCAM TOS TPID TSO TTL Tx UDP +ULP vDPA Verbs VF @@ -65,3 +70,4 @@ VMDq VSI VXLAN XDP +XOR
GTPU -> GPRS Tunnelling Protocol User Plane MSI -> Message Signalled Interrupts MSI-X -> Message Signalled Interrupts (Extended) TCAM -> Ternary Content Addressable Memory ULP -> Upper Layer Protocol XOR -> Exclusive OR Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> --- devtools/words-case.txt | 6 ++++++ 1 file changed, 6 insertions(+)