[v1] net/ice: fix gtpu teid hash
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Commit Message
Refine gtpu teid hash rule mapping for GTPU_IP/GTPU_EH/GTPU_DWN/GTPU_UP.
Fixes: 37e444b77814 ("net/ice: support hash for GTPU protocols")
Signed-off-by: Jeff Guo <jia.guo@intel.com>
---
drivers/net/ice/ice_hash.c | 24 +++++++++++++++---------
1 file changed, 15 insertions(+), 9 deletions(-)
Comments
> -----Original Message-----
> From: Guo, Jia <jia.guo@intel.com>
> Sent: Tuesday, July 28, 2020 5:21 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Su, Simei <simei.su@intel.com>; Guo, Jia
> <jia.guo@intel.com>
> Subject: [dpdk-dev v1] net/ice: fix gtpu teid hash
>
> Refine gtpu teid hash rule mapping for
> GTPU_IP/GTPU_EH/GTPU_DWN/GTPU_UP.
>
> Fixes: 37e444b77814 ("net/ice: support hash for GTPU protocols")
>
> Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Applied to dpdk-next-net-intel.
Thanks
Qi
@@ -479,6 +479,8 @@ struct ice_hash_match_type ice_hash_type_list[] = {
BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID)},
{ETH_RSS_PFCP,
BIT_ULL(ICE_FLOW_FIELD_IDX_PFCP_SEID)},
+ {ETH_RSS_GTPU,
+ BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID)},
/* IPV4 */
{ETH_RSS_IPV4 | ETH_RSS_L3_SRC_ONLY,
BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA)},
@@ -1148,21 +1150,25 @@ ice_hash_parse_action(struct ice_pattern_match_item *pattern_match_item,
BIT_ULL(ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI);
}
- /* update hash field for gtpu-ip and gtpu-eh. */
- if (rss_type != ETH_RSS_GTPU)
- break;
- else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_IP)
- hash_meta->hash_flds |=
- BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID);
- else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_EH)
+ /* update hash field for gtpu eh/gtpu dwn/gtpu up. */
+ if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
+ hash_meta->hash_flds &=
+ ~(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID));
hash_meta->hash_flds |=
BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID);
- else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_DWN)
+ } else if (hash_meta->pkt_hdr &
+ ICE_FLOW_SEG_HDR_GTPU_DWN) {
+ hash_meta->hash_flds &=
+ ~(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID));
hash_meta->hash_flds |=
BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID);
- else if (hash_meta->pkt_hdr & ICE_FLOW_SEG_HDR_GTPU_UP)
+ } else if (hash_meta->pkt_hdr &
+ ICE_FLOW_SEG_HDR_GTPU_UP) {
+ hash_meta->hash_flds &=
+ ~(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID));
hash_meta->hash_flds |=
BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_UP_TEID);
+ }
break;