diff mbox series

[12/15] net/softnic: add subport config flexibility to TM function

Message ID 20190823144602.58213-13-jasvinder.singh@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Cristian Dumitrescu
Headers show
Series sched: subport level configuration of pipe nodes | expand

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Singh, Jasvinder Aug. 23, 2019, 2:45 p.m. UTC
Modify softnic traffic management function to allow different
subports of the same port to have different configuration in
terms of number of pipes, pipe queue sizes, etc.

Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Signed-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>
---
 drivers/net/softnic/rte_eth_softnic_tm.c | 51 ++++++++++++------------
 1 file changed, 26 insertions(+), 25 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/softnic/rte_eth_softnic_tm.c b/drivers/net/softnic/rte_eth_softnic_tm.c
index 61c3adc82..8fb728d7d 100644
--- a/drivers/net/softnic/rte_eth_softnic_tm.c
+++ b/drivers/net/softnic/rte_eth_softnic_tm.c
@@ -85,7 +85,8 @@  softnic_tmgr_port_create(struct pmd_internals *p,
 	/* Subport */
 	n_subports = t->port_params.n_subports_per_port;
 	for (subport_id = 0; subport_id < n_subports; subport_id++) {
-		uint32_t n_pipes_per_subport = t->port_params.n_pipes_per_subport;
+		uint32_t n_pipes_per_subport =
+			t->subport_params[subport_id].n_pipes_per_subport;
 		uint32_t pipe_id;
 		int status;
 
@@ -2211,10 +2212,11 @@  tm_tc_wred_profile_get(struct rte_eth_dev *dev, uint32_t tc_id)
 #ifdef RTE_SCHED_RED
 
 static void
-wred_profiles_set(struct rte_eth_dev *dev)
+wred_profiles_set(struct rte_eth_dev *dev, uint32_t subport_id)
 {
 	struct pmd_internals *p = dev->data->dev_private;
-	struct rte_sched_port_params *pp = &p->soft.tm.params.port_params;
+	struct rte_sched_subport_params *pp =
+		&p->soft.tm.params.subport_params[subport_id];
 
 	uint32_t tc_id;
 	enum rte_color color;
@@ -2234,7 +2236,7 @@  wred_profiles_set(struct rte_eth_dev *dev)
 
 #else
 
-#define wred_profiles_set(dev)
+#define wred_profiles_set(dev, subport_id)
 
 #endif
 
@@ -2526,29 +2528,10 @@  hierarchy_blueprints_create(struct rte_eth_dev *dev)
 		.frame_overhead =
 			root->shaper_profile->params.pkt_length_adjust,
 		.n_subports_per_port = root->n_children,
-		.n_pipes_per_subport = h->n_tm_nodes[TM_NODE_LEVEL_PIPE] /
-			h->n_tm_nodes[TM_NODE_LEVEL_SUBPORT],
-		.qsize = {p->params.tm.qsize[0],
-			p->params.tm.qsize[1],
-			p->params.tm.qsize[2],
-			p->params.tm.qsize[3],
-			p->params.tm.qsize[4],
-			p->params.tm.qsize[5],
-			p->params.tm.qsize[6],
-			p->params.tm.qsize[7],
-			p->params.tm.qsize[8],
-			p->params.tm.qsize[9],
-			p->params.tm.qsize[10],
-			p->params.tm.qsize[11],
-			p->params.tm.qsize[12],
-		},
-		.pipe_profiles = t->pipe_profiles,
-		.n_pipe_profiles = t->n_pipe_profiles,
+		.n_max_pipes_per_subport = TM_MAX_PIPES_PER_SUBPORT,
 		.n_max_pipe_profiles = TM_MAX_PIPE_PROFILE,
 	};
 
-	wred_profiles_set(dev);
-
 	subport_id = 0;
 	TAILQ_FOREACH(n, nl, node) {
 		uint64_t tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
@@ -2588,8 +2571,26 @@  hierarchy_blueprints_create(struct rte_eth_dev *dev)
 					tc_rate[12],
 				},
 				.tc_period = SUBPORT_TC_PERIOD,
+				.n_pipes_per_subport = h->n_tm_nodes[TM_NODE_LEVEL_PIPE] /
+					h->n_tm_nodes[TM_NODE_LEVEL_SUBPORT],
+				.qsize = {p->params.tm.qsize[0],
+					p->params.tm.qsize[1],
+					p->params.tm.qsize[2],
+					p->params.tm.qsize[3],
+					p->params.tm.qsize[4],
+					p->params.tm.qsize[5],
+					p->params.tm.qsize[6],
+					p->params.tm.qsize[7],
+					p->params.tm.qsize[8],
+					p->params.tm.qsize[9],
+					p->params.tm.qsize[10],
+					p->params.tm.qsize[11],
+					p->params.tm.qsize[12],
+				},
+				.pipe_profiles = t->pipe_profiles,
+				.n_pipe_profiles = t->n_pipe_profiles,
 		};
-
+		wred_profiles_set(dev, subport_id);
 		subport_id++;
 	}
 }