@@ -22,6 +22,7 @@ RSS key update = Y
RSS reta update = Y
Inner RSS = Y
Flow control = Y
+Flow API = Y
Packet type parsing = Y
Timesync = Y
Timestamp offload = Y
@@ -22,6 +22,7 @@ RSS key update = Y
RSS reta update = Y
Inner RSS = Y
Flow control = Y
+Flow API = Y
Packet type parsing = Y
Rx descriptor status = Y
Basic stats = Y
@@ -17,6 +17,7 @@ RSS hash = Y
RSS key update = Y
RSS reta update = Y
Inner RSS = Y
+Flow API = Y
Packet type parsing = Y
Rx descriptor status = Y
Basic stats = Y
@@ -23,6 +23,7 @@ Features of the OCTEON TX2 Ethdev PMD are:
- Multiple queues for TX and RX
- Receiver Side Scaling (RSS)
- MAC filtering
+- Generic flow API
- Port hardware statistics
- Link state information
- Link flow control
@@ -109,3 +110,95 @@ Runtime Config Options
Above devarg parameters are configurable per device, user needs to pass the
parameters to all the PCIe devices if application requires to configure on
all the ethdev ports.
+
+RTE Flow Support
+----------------
+
+The OCTEON TX2 SoC family NIC has support for the following patterns and
+actions.
+
+Patterns:
+
+.. _table_octeontx2_supported_flow_item_types:
+
+.. table:: Item types
+
+ +----+--------------------------------+
+ | # | Pattern Type |
+ +====+================================+
+ | 1 | RTE_FLOW_ITEM_TYPE_ETH |
+ +----+--------------------------------+
+ | 2 | RTE_FLOW_ITEM_TYPE_VLAN |
+ +----+--------------------------------+
+ | 3 | RTE_FLOW_ITEM_TYPE_E_TAG |
+ +----+--------------------------------+
+ | 4 | RTE_FLOW_ITEM_TYPE_IPV4 |
+ +----+--------------------------------+
+ | 5 | RTE_FLOW_ITEM_TYPE_IPV6 |
+ +----+--------------------------------+
+ | 6 | RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4|
+ +----+--------------------------------+
+ | 7 | RTE_FLOW_ITEM_TYPE_MPLS |
+ +----+--------------------------------+
+ | 8 | RTE_FLOW_ITEM_TYPE_ICMP |
+ +----+--------------------------------+
+ | 9 | RTE_FLOW_ITEM_TYPE_UDP |
+ +----+--------------------------------+
+ | 10 | RTE_FLOW_ITEM_TYPE_TCP |
+ +----+--------------------------------+
+ | 11 | RTE_FLOW_ITEM_TYPE_SCTP |
+ +----+--------------------------------+
+ | 12 | RTE_FLOW_ITEM_TYPE_ESP |
+ +----+--------------------------------+
+ | 13 | RTE_FLOW_ITEM_TYPE_GRE |
+ +----+--------------------------------+
+ | 14 | RTE_FLOW_ITEM_TYPE_NVGRE |
+ +----+--------------------------------+
+ | 15 | RTE_FLOW_ITEM_TYPE_VXLAN |
+ +----+--------------------------------+
+ | 16 | RTE_FLOW_ITEM_TYPE_GTPC |
+ +----+--------------------------------+
+ | 17 | RTE_FLOW_ITEM_TYPE_GTPU |
+ +----+--------------------------------+
+ | 18 | RTE_FLOW_ITEM_TYPE_VOID |
+ +----+--------------------------------+
+ | 19 | RTE_FLOW_ITEM_TYPE_ANY |
+ +----+--------------------------------+
+
+Actions:
+
+.. _table_octeontx2_supported_ingress_action_types:
+
+.. table:: Ingress action types
+
+ +----+--------------------------------+
+ | # | Action Type |
+ +====+================================+
+ | 1 | RTE_FLOW_ACTION_TYPE_VOID |
+ +----+--------------------------------+
+ | 2 | RTE_FLOW_ACTION_TYPE_MARK |
+ +----+--------------------------------+
+ | 3 | RTE_FLOW_ACTION_TYPE_FLAG |
+ +----+--------------------------------+
+ | 4 | RTE_FLOW_ACTION_TYPE_COUNT |
+ +----+--------------------------------+
+ | 5 | RTE_FLOW_ACTION_TYPE_DROP |
+ +----+--------------------------------+
+ | 6 | RTE_FLOW_ACTION_TYPE_QUEUE |
+ +----+--------------------------------+
+ | 7 | RTE_FLOW_ACTION_TYPE_RSS |
+ +----+--------------------------------+
+ | 8 | RTE_FLOW_ACTION_TYPE_SECURITY |
+ +----+--------------------------------+
+
+.. _table_octeontx2_supported_egress_action_types:
+
+.. table:: Egress action types
+
+ +----+--------------------------------+
+ | # | Action Type |
+ +====+================================+
+ | 1 | RTE_FLOW_ACTION_TYPE_COUNT |
+ +----+--------------------------------+
+ | 2 | RTE_FLOW_ACTION_TYPE_DROP |
+ +----+--------------------------------+
@@ -1326,6 +1326,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
.tx_done_cleanup = otx2_nix_tx_done_cleanup,
.pool_ops_supported = otx2_nix_pool_ops_supported,
+ .filter_ctrl = otx2_nix_dev_filter_ctrl,
.get_module_info = otx2_nix_get_module_info,
.get_module_eeprom = otx2_nix_get_module_eeprom,
.flow_ctrl_get = otx2_nix_flow_ctrl_get,
@@ -1505,6 +1506,11 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
dev->hwcap |= OTX2_FIXUP_F_LIMIT_CQ_FULL;
}
+ /* Initialize rte-flow */
+ rc = otx2_flow_init(dev);
+ if (rc)
+ goto free_mac_addrs;
+
otx2_nix_dbg("Port=%d pf=%d vf=%d ver=%s msix_off=%d hwcap=0x%" PRIx64
" rxoffload_capa=0x%" PRIx64 " txoffload_capa=0x%" PRIx64,
eth_dev->data->port_id, dev->pf, dev->vf,
@@ -1541,6 +1547,9 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)
/* Disable nix bpid config */
otx2_nix_rxchan_bpid_cfg(eth_dev, false);
+ /* Disable other rte_flow entries */
+ otx2_flow_fini(dev);
+
/* Disable PTP if already enabled */
if (otx2_ethdev_is_ptp_en(dev))
otx2_nix_timesync_disable(eth_dev);
@@ -294,6 +294,9 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
/* Ops */
void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
struct rte_eth_dev_info *dev_info);
+int otx2_nix_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
+ enum rte_filter_type filter_type,
+ enum rte_filter_op filter_op, void *arg);
int otx2_nix_get_module_info(struct rte_eth_dev *eth_dev,
struct rte_eth_dev_module_info *modinfo);
int otx2_nix_get_module_eeprom(struct rte_eth_dev *eth_dev,
@@ -220,6 +220,27 @@ otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool)
return -ENOTSUP;
}
+int
+otx2_nix_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
+ enum rte_filter_type filter_type,
+ enum rte_filter_op filter_op, void *arg)
+{
+ RTE_SET_USED(eth_dev);
+
+ if (filter_type != RTE_ETH_FILTER_GENERIC) {
+ otx2_err("Unsupported filter type %d", filter_type);
+ return -ENOTSUP;
+ }
+
+ if (filter_op == RTE_ETH_FILTER_GET) {
+ *(const void **)arg = &otx2_flow_ops;
+ return 0;
+ }
+
+ otx2_err("Invalid filter_op %d", filter_op);
+ return -EINVAL;
+}
+
static struct cgx_fw_data *
nix_get_fwdata(struct otx2_eth_dev *dev)
{