diff mbox

[dpdk-dev,1/2] net/mlx5: fix alignment of Memory Region

Message ID 20180417183914.10175-1-yskoh@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Shahaf Shuler
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Yongseok Koh April 17, 2018, 6:39 p.m. UTC 
  The memory region is [start, end), so if the memseg of 'end' isn't
allocated yet, the returned memseg will have zero entries and this will
make 'end' zero (nil).

Fixes: 718e35999c96 ("net/mlx5: use virt2memseg instead of iteration")
Cc: Anatoly Burakov <anatoly.burakov@intel.com>

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
---
 drivers/net/mlx5/mlx5_mr.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

Comments

Nélio Laranjeiro April 18, 2018, 6:43 a.m. UTC | #1 
On Tue, Apr 17, 2018 at 11:39:13AM -0700, Yongseok Koh wrote:
> The memory region is [start, end), so if the memseg of 'end' isn't
> allocated yet, the returned memseg will have zero entries and this will
> make 'end' zero (nil).
> 
> Fixes: 718e35999c96 ("net/mlx5: use virt2memseg instead of iteration")
> Cc: Anatoly Burakov <anatoly.burakov@intel.com>
> 
> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>

Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>

> ---
>  drivers/net/mlx5/mlx5_mr.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c
> index fdf7b3e88..39bbe2481 100644
> --- a/drivers/net/mlx5/mlx5_mr.c
> +++ b/drivers/net/mlx5/mlx5_mr.c
> @@ -265,9 +265,7 @@ mlx5_mr_new(struct rte_eth_dev *dev, struct rte_mempool *mp)
>  	ms = rte_mem_virt2memseg((void *)start, NULL);
>  	if (ms != NULL)
>  		start = RTE_ALIGN_FLOOR(start, ms->hugepage_sz);
> -	ms = rte_mem_virt2memseg((void *)end, NULL);
> -	if (ms != NULL)
> -		end = RTE_ALIGN_CEIL(end, ms->hugepage_sz);
> +	end = RTE_ALIGN_CEIL(end, ms->hugepage_sz);
>  
>  	DRV_LOG(DEBUG,
>  		"port %u mempool %p using start=%p end=%p size=%zu for memory"
> -- 
> 2.11.0
>
Shahaf Shuler April 22, 2018, 9:09 a.m. UTC | #2 
Wednesday, April 18, 2018 9:43 AM, Nélio Laranjeiro:
> Subject: Re: [dpdk-dev] [PATCH 1/2] net/mlx5: fix alignment of Memory
> Region
> 
> On Tue, Apr 17, 2018 at 11:39:13AM -0700, Yongseok Koh wrote:
> > The memory region is [start, end), so if the memseg of 'end' isn't
> > allocated yet, the returned memseg will have zero entries and this
> > will make 'end' zero (nil).
> >
> > Fixes: 718e35999c96 ("net/mlx5: use virt2memseg instead of iteration")
> > Cc: Anatoly Burakov <anatoly.burakov@intel.com>
> >
> > Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
> 
> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>

Series applied to next-net-mlx with Adrien's line removal suggestion. Thanks
diff mbox

Patch

diff --git a/drivers/net/mlx5/mlx5_mr.c b/drivers/net/mlx5/mlx5_mr.c
index fdf7b3e88..39bbe2481 100644
--- a/drivers/net/mlx5/mlx5_mr.c
+++ b/drivers/net/mlx5/mlx5_mr.c
@@ -265,9 +265,7 @@  mlx5_mr_new(struct rte_eth_dev *dev, struct rte_mempool *mp)
 	ms = rte_mem_virt2memseg((void *)start, NULL);
 	if (ms != NULL)
 		start = RTE_ALIGN_FLOOR(start, ms->hugepage_sz);
-	ms = rte_mem_virt2memseg((void *)end, NULL);
-	if (ms != NULL)
-		end = RTE_ALIGN_CEIL(end, ms->hugepage_sz);
+	end = RTE_ALIGN_CEIL(end, ms->hugepage_sz);
 
 	DRV_LOG(DEBUG,
 		"port %u mempool %p using start=%p end=%p size=%zu for memory"