[dpdk-dev,v3,08/12] event/octeontx: add burst mode for timer arm
Checks
Commit Message
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
drivers/event/octeontx/timvf_evdev.c | 1 +
drivers/event/octeontx/timvf_evdev.h | 3 ++
drivers/event/octeontx/timvf_worker.c | 38 ++++++++++++++
drivers/event/octeontx/timvf_worker.h | 95 +++++++++++++++++++++++++++++++++++
4 files changed, 137 insertions(+)
Comments
> -----Original Message-----
> From: Pavan Nikhilesh [mailto:pbhagavatula@caviumnetworks.com]
> Sent: Tuesday, April 3, 2018 10:05 AM
> To: jerin.jacob@caviumnetworks.com;
> santosh.shukla@caviumnetworks.com; Carrillo, Erik G
> <erik.g.carrillo@intel.com>
> Cc: dev@dpdk.org; Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v3 08/12] event/octeontx: add burst mode for
> timer arm
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
> drivers/event/octeontx/timvf_evdev.c | 1 +
> drivers/event/octeontx/timvf_evdev.h | 3 ++
> drivers/event/octeontx/timvf_worker.c | 38 ++++++++++++++
> drivers/event/octeontx/timvf_worker.h | 95
> +++++++++++++++++++++++++++++++++++
> 4 files changed, 137 insertions(+)
>
> diff --git a/drivers/event/octeontx/timvf_evdev.c
> b/drivers/event/octeontx/timvf_evdev.c
> index a32892107..b23500e0d 100644
> --- a/drivers/event/octeontx/timvf_evdev.c
> +++ b/drivers/event/octeontx/timvf_evdev.c
> @@ -333,6 +333,7 @@ timvf_timer_adapter_caps_get(const struct
> rte_eventdev *dev, uint64_t flags,
> else
> timvf_ops.arm_burst = timvf_timer_reg_burst_mp;
>
> + timvf_ops.arm_tmo_tick_burst = timvf_timer_reg_brst;
Could there be a single-producer variant of timvf_timer_reg_brst?
Thanks,
Gabriel
> timvf_ops.cancel_burst = timvf_timer_unreg_burst;
>
> *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;
> diff --git a/drivers/event/octeontx/timvf_evdev.h
> b/drivers/event/octeontx/timvf_evdev.h
> index ab2de678f..d8a6d111f 100644
> --- a/drivers/event/octeontx/timvf_evdev.h
-----Original Message-----
> Date: Tue, 3 Apr 2018 20:35:10 +0530
> From: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> To: jerin.jacob@caviumnetworks.com, santosh.shukla@caviumnetworks.com,
> erik.g.carrillo@intel.com
> Cc: dev@dpdk.org, Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v3 08/12] event/octeontx: add burst mode for
> timer arm
> X-Mailer: git-send-email 2.16.3
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
> drivers/event/octeontx/timvf_evdev.c | 1 +
> drivers/event/octeontx/timvf_evdev.h | 3 ++
> drivers/event/octeontx/timvf_worker.c | 38 ++++++++++++++
> drivers/event/octeontx/timvf_worker.h | 95 +++++++++++++++++++++++++++++++++++
> 4 files changed, 137 insertions(+)
>
> diff --git a/drivers/event/octeontx/timvf_evdev.c b/drivers/event/octeontx/timvf_evdev.c
> index a32892107..b23500e0d 100644
> --- a/drivers/event/octeontx/timvf_evdev.c
> +++ b/drivers/event/octeontx/timvf_evdev.c
> @@ -333,6 +333,7 @@ timvf_timer_adapter_caps_get(const struct rte_eventdev *dev, uint64_t flags,
> else
> timvf_ops.arm_burst = timvf_timer_reg_burst_mp;
>
> + timvf_ops.arm_tmo_tick_burst = timvf_timer_reg_brst;
IMO, To inline with spec name, may we could use arm_burst/cancel_burst instead of
reg_brst or unreg_burst.
> timvf_ops.cancel_burst = timvf_timer_unreg_burst;
>
> *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;
> diff --git a/drivers/event/octeontx/timvf_evdev.h b/drivers/event/octeontx/timvf_evdev.h
> index ab2de678f..d8a6d111f 100644
> --- a/drivers/event/octeontx/timvf_evdev.h
> +++ b/drivers/event/octeontx/timvf_evdev.h
> @@ -200,6 +200,9 @@ uint16_t timvf_timer_reg_burst_sp(const struct rte_event_timer_adapter *adptr,
> struct rte_event_timer **tim, const uint16_t nb_timers);
> uint16_t timvf_timer_reg_burst_mp(const struct rte_event_timer_adapter *adptr,
> struct rte_event_timer **tim, const uint16_t nb_timers);
> +uint16_t timvf_timer_reg_brst(const struct rte_event_timer_adapter *adptr,
> + struct rte_event_timer **tim, const uint64_t timeout_tick,
> + const uint16_t nb_timers);
> void timvf_set_chunk_refill(struct timvf_ring * const timr);
>
> #endif /* __TIMVF_EVDEV_H__ */
> diff --git a/drivers/event/octeontx/timvf_worker.c b/drivers/event/octeontx/timvf_worker.c
> index 139dfdc07..f4f40d150 100644
> --- a/drivers/event/octeontx/timvf_worker.c
> +++ b/drivers/event/octeontx/timvf_worker.c
> @@ -113,6 +113,44 @@ timvf_timer_reg_burst_mp(const struct rte_event_timer_adapter *adptr,
> return index;
> }
>
> +/* Burst mode functions */
> +static inline int
> +timvf_add_entry_brst(struct timvf_ring * const timr, const uint16_t rel_bkt,
> + struct rte_event_timer ** const tim,
> + const struct tim_mem_entry *ents,
> + const uint16_t nb_timers)
> +{
> + int16_t rem;
> + int16_t crem = 0;
> + uint8_t lock_cnt;
> + uint16_t index = 0;
> + uint16_t chunk_remainder = 0;
Looks like above all assignments to 'zero' is unnecessary.
@@ -333,6 +333,7 @@ timvf_timer_adapter_caps_get(const struct rte_eventdev *dev, uint64_t flags,
else
timvf_ops.arm_burst = timvf_timer_reg_burst_mp;
+ timvf_ops.arm_tmo_tick_burst = timvf_timer_reg_brst;
timvf_ops.cancel_burst = timvf_timer_unreg_burst;
*caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;
@@ -200,6 +200,9 @@ uint16_t timvf_timer_reg_burst_sp(const struct rte_event_timer_adapter *adptr,
struct rte_event_timer **tim, const uint16_t nb_timers);
uint16_t timvf_timer_reg_burst_mp(const struct rte_event_timer_adapter *adptr,
struct rte_event_timer **tim, const uint16_t nb_timers);
+uint16_t timvf_timer_reg_brst(const struct rte_event_timer_adapter *adptr,
+ struct rte_event_timer **tim, const uint64_t timeout_tick,
+ const uint16_t nb_timers);
void timvf_set_chunk_refill(struct timvf_ring * const timr);
#endif /* __TIMVF_EVDEV_H__ */
@@ -113,6 +113,44 @@ timvf_timer_reg_burst_mp(const struct rte_event_timer_adapter *adptr,
return index;
}
+uint16_t
+timvf_timer_reg_brst(const struct rte_event_timer_adapter *adptr,
+ struct rte_event_timer **tim, const uint64_t timeout_tick,
+ const uint16_t nb_timers)
+{
+ int ret;
+ uint16_t set_timers = 0;
+ uint16_t idx;
+ uint16_t arr_idx = 0;
+ struct timvf_ring *timr = adptr->data->adapter_priv;
+ struct tim_mem_entry entry[TIMVF_MAX_BURST] __rte_cache_aligned;
+
+ if (unlikely(!timeout_tick || timeout_tick >= timr->meta.nb_bkts)) {
+ const enum rte_event_timer_state state = timeout_tick ?
+ RTE_EVENT_TIMER_ERROR_TOOLATE :
+ RTE_EVENT_TIMER_ERROR_TOOEARLY;
+ for (idx = 0; idx < nb_timers; idx++)
+ tim[idx]->state = state;
+ rte_errno = EINVAL;
+ return 0;
+ }
+
+ while (arr_idx < nb_timers) {
+ for (idx = 0; idx < TIMVF_MAX_BURST && (arr_idx < nb_timers);
+ idx++, arr_idx++) {
+ timvf_format_event(tim[arr_idx], &entry[idx]);
+ }
+ ret = timvf_add_entry_brst(timr, timeout_tick, &tim[set_timers],
+ entry, idx);
+ set_timers += ret;
+ if (ret != idx)
+ break;
+ }
+ timr->meta.tim_arm_cnt += set_timers;
+
+ return set_timers;
+}
+
void
timvf_set_chunk_refill(struct timvf_ring * const timr)
{
@@ -325,3 +325,98 @@ timvf_add_entry_mp(struct timvf_ring * const timr, const uint32_t rel_bkt,
tim->state = RTE_EVENT_TIMER_ARMED;
return 0;
}
+
+static inline uint16_t
+timvf_cpy_wrk(uint16_t index, uint16_t cpy_lmt,
+ struct tim_mem_entry *chunk,
+ struct rte_event_timer ** const tim,
+ const struct tim_mem_entry * const ents,
+ const struct tim_mem_bucket * const bkt)
+{
+ for (; index < cpy_lmt; index++) {
+ *chunk = *(ents + index);
+ tim[index]->impl_opaque[0] = (uint64_t)chunk++;
+ tim[index]->impl_opaque[1] = (uint64_t)bkt;
+ tim[index]->state = RTE_EVENT_TIMER_ARMED;
+ }
+
+ return index;
+}
+
+/* Burst mode functions */
+static inline int
+timvf_add_entry_brst(struct timvf_ring * const timr, const uint16_t rel_bkt,
+ struct rte_event_timer ** const tim,
+ const struct tim_mem_entry *ents,
+ const uint16_t nb_timers)
+{
+ int16_t rem;
+ int16_t crem = 0;
+ uint8_t lock_cnt;
+ uint16_t index = 0;
+ uint16_t chunk_remainder = 0;
+ uint64_t lock_sema;
+ struct tim_mem_bucket *bkt;
+ struct tim_mem_entry *chunk;
+
+__retry:
+ bkt = timvf_get_target_bucket(timr, rel_bkt);
+
+ /* Only one thread beyond this. */
+ lock_sema = timr_bkt_inc_lock(bkt);
+ lock_cnt = (uint8_t)
+ ((lock_sema >> TIM_BUCKET_W1_S_LOCK) & TIM_BUCKET_W1_M_LOCK);
+
+ if (lock_cnt) {
+ timr_bkt_dec_lock(bkt);
+ goto __retry;
+ }
+
+ /* Bucket related checks. */
+ if (unlikely(timr_bkt_get_hbt(lock_sema))) {
+ timr_bkt_dec_lock(bkt);
+ goto __retry;
+ }
+
+ chunk_remainder = timr_bkt_fetch_rem(lock_sema);
+ rem = chunk_remainder - nb_timers;
+ if (rem < 0) {
+ crem = nb_chunk_slots - chunk_remainder;
+ if (chunk_remainder && crem) {
+ chunk = ((struct tim_mem_entry *)bkt->current_chunk) +
+ crem;
+
+ index = timvf_cpy_wrk(index, chunk_remainder,
+ chunk, tim, ents, bkt);
+ timr_bkt_sub_rem(bkt, chunk_remainder);
+ timr_bkt_add_nent(bkt, chunk_remainder);
+ }
+ rem = nb_timers - chunk_remainder;
+ ents = ents + chunk_remainder;
+
+ chunk = timr->meta.refill_chunk(bkt, timr);
+ if (unlikely(chunk == NULL)) {
+ timr_bkt_dec_lock(bkt);
+ rte_errno = ENOMEM;
+ tim[index]->state = RTE_EVENT_TIMER_ERROR;
+ return crem;
+ }
+ *(uint64_t *)(chunk + nb_chunk_slots) = 0;
+ bkt->current_chunk = (uint64_t) chunk;
+
+ index = timvf_cpy_wrk(index, nb_timers, chunk, tim, ents, bkt);
+ timr_bkt_set_rem(bkt, nb_chunk_slots - rem);
+ timr_bkt_add_nent(bkt, rem);
+ } else {
+ chunk = (struct tim_mem_entry *)bkt->current_chunk;
+ chunk += (nb_chunk_slots - chunk_remainder);
+
+ index = timvf_cpy_wrk(index, nb_timers,
+ chunk, tim, ents, bkt);
+ timr_bkt_sub_rem(bkt, nb_timers);
+ timr_bkt_add_nent(bkt, nb_timers);
+ }
+
+ timr_bkt_dec_lock(bkt);
+ return nb_timers;
+}