diff mbox

[dpdk-dev,v2,2/2] net/mlx5: fix PMD specific parameters defaults

Message ID 20170418102228.145971-2-shahafs@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Shahaf Shuler April 18, 2017, 10:22 a.m. UTC 
  With the Enhanced multi packet send addition, the defaults were made
in order to get the maximum out of the box performance.
Features like tso, don't use the enhanced send, however the defaults
are still valid. This cause Tx queue creation to fail.

Fixes: aea00c008140 ("net/mlx5: add hardware TSO support")

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
---
on v2:
* changed MLX5_UNSET to MLX5_ARG_UNSET.
---
 drivers/net/mlx5/mlx5.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

Comments

Ferruh Yigit April 19, 2017, 10:57 a.m. UTC | #1 
On 4/18/2017 11:22 AM, Shahaf Shuler wrote:
> With the Enhanced multi packet send addition, the defaults were made
> in order to get the maximum out of the box performance.
> Features like tso, don't use the enhanced send, however the defaults
> are still valid. This cause Tx queue creation to fail.
> 
> Fixes: aea00c008140 ("net/mlx5: add hardware TSO support")

Can you please confirm the Fixes line, the code modified below added
with commit [1], and above commit (correct one is: 3f13f8c23a7c) doesn't
touch those lines?

[1]
Fixes: 6ce84bd88919 ("net/mlx5: add enhanced multi-packet send for
ConnectX-5")
Shahaf Shuler April 19, 2017, 11:32 a.m. UTC | #2 
Wednesday, April 19, 2017 1:57 PM, Ferruh Yigit:
> On 4/18/2017 11:22 AM, Shahaf Shuler wrote:

> > With the Enhanced multi packet send addition, the defaults were made

> > in order to get the maximum out of the box performance.

> > Features like tso, don't use the enhanced send, however the defaults

> > are still valid. This cause Tx queue creation to fail.

> >

> > Fixes: aea00c008140 ("net/mlx5: add hardware TSO support")

> 

> Can you please confirm the Fixes line, the code modified below added with

> commit [1], and above commit (correct one is: 3f13f8c23a7c) doesn't touch

> those lines?


Well I guess it can be either. 
The commit Fixes TSO because [1] caused TSO to fail on some cases.
The commit Fixes multi-packet send since it is the one which caused the fault.

Since you pointed that out, I guess other will follow your logic as well. So let's take you suggestion.
Do you need me to post a v3? 

> 

> [1]

> Fixes: 6ce84bd88919 ("net/mlx5: add enhanced multi-packet send for

> ConnectX-5")
Ferruh Yigit April 19, 2017, 12:25 p.m. UTC | #3 
On 4/19/2017 12:32 PM, Shahaf Shuler wrote:
> Wednesday, April 19, 2017 1:57 PM, Ferruh Yigit:
>> On 4/18/2017 11:22 AM, Shahaf Shuler wrote:
>>> With the Enhanced multi packet send addition, the defaults were made
>>> in order to get the maximum out of the box performance.
>>> Features like tso, don't use the enhanced send, however the defaults
>>> are still valid. This cause Tx queue creation to fail.
>>>
>>> Fixes: aea00c008140 ("net/mlx5: add hardware TSO support")
>>
>> Can you please confirm the Fixes line, the code modified below added with
>> commit [1], and above commit (correct one is: 3f13f8c23a7c) doesn't touch
>> those lines?
> 
> Well I guess it can be either. 
> The commit Fixes TSO because [1] caused TSO to fail on some cases.
> The commit Fixes multi-packet send since it is the one which caused the fault.
> 
> Since you pointed that out, I guess other will follow your logic as well. So let's take you suggestion.

Does it make sense to add both?

> Do you need me to post a v3? 

If you confirm, I can update while applying, not a new patch required.

> 
>>
>> [1]
>> Fixes: 6ce84bd88919 ("net/mlx5: add enhanced multi-packet send for
>> ConnectX-5")
Shahaf Shuler April 19, 2017, 12:31 p.m. UTC | #4 
Wednesday, April 19, 2017 3:25 PM, Ferruh Yigit:
 
> On 4/19/2017 12:32 PM, Shahaf Shuler wrote:

> > Wednesday, April 19, 2017 1:57 PM, Ferruh Yigit:

> >> On 4/18/2017 11:22 AM, Shahaf Shuler wrote:

> >>> With the Enhanced multi packet send addition, the defaults were made

> >>> in order to get the maximum out of the box performance.

> >>> Features like tso, don't use the enhanced send, however the defaults

> >>> are still valid. This cause Tx queue creation to fail.

> >>>

> >>> Fixes: aea00c008140 ("net/mlx5: add hardware TSO support")

> >>

> >> Can you please confirm the Fixes line, the code modified below added

> >> with commit [1], and above commit (correct one is: 3f13f8c23a7c)

> >> doesn't touch those lines?

> >

> > Well I guess it can be either.

> > The commit Fixes TSO because [1] caused TSO to fail on some cases.

> > The commit Fixes multi-packet send since it is the one which caused the

> fault.

> >

> > Since you pointed that out, I guess other will follow your logic as well. So

> let's take you suggestion.

> 

> Does it make sense to add both?

> 

> > Do you need me to post a v3?

> 

> If you confirm, I can update while applying, not a new patch required.


Agreed. Let's have both. 

> 

> >

> >>

> >> [1]

> >> Fixes: 6ce84bd88919 ("net/mlx5: add enhanced multi-packet send for

> >> ConnectX-5")
diff mbox

Patch

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 78724a1bb..c48fea82b 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -610,13 +610,6 @@  mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 		priv->pd = pd;
 		priv->mtu = ETHER_MTU;
 		priv->mps = mps; /* Enable MPW by default if supported. */
-		/* Set default values for Enhanced MPW, a.k.a MPWv2. */
-		if (mps == MLX5_MPW_ENHANCED) {
-			priv->mpw_hdr_dseg = 0;
-			priv->txqs_inline = MLX5_EMPW_MIN_TXQS;
-			priv->inline_max_packet_sz = MLX5_EMPW_MAX_INLINE_LEN;
-			priv->txq_inline = MLX5_WQE_SIZE_MAX - MLX5_WQE_SIZE;
-		}
 		priv->cqe_comp = 1; /* Enable compression by default. */
 		priv->tunnel_en = tunnel_en;
 		err = mlx5_args(&args, pci_dev->device.devargs);
@@ -688,6 +681,17 @@  mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 		INFO("%sMPS is %s",
 		     priv->mps == MLX5_MPW_ENHANCED ? "Enhanced " : "",
 		     priv->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
+		/* Set default values for Enhanced MPW, a.k.a MPWv2. */
+		if (priv->mps == MLX5_MPW_ENHANCED) {
+			if (args.txqs_inline == MLX5_ARG_UNSET)
+				priv->txqs_inline = MLX5_EMPW_MIN_TXQS;
+			if (args.inline_max_packet_sz == MLX5_ARG_UNSET)
+				priv->inline_max_packet_sz =
+					MLX5_EMPW_MAX_INLINE_LEN;
+			if (args.txq_inline == MLX5_ARG_UNSET)
+				priv->txq_inline = MLX5_WQE_SIZE_MAX -
+						   MLX5_WQE_SIZE;
+		}
 		/* Allocate and register default RSS hash keys. */
 		priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
 					    sizeof((*priv->rss_conf)[0]), 0);