diff mbox series

[v7,04/39] sched: use C11 alignas

Message ID 1709574764-9041-5-git-send-email-roretzla@linux.microsoft.com (mailing list archive)
State Accepted, archived
Delegated to: David Marchand
Headers
Series use C11 alignas |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tyler Retzlaff March 4, 2024, 5:52 p.m. UTC 
  The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.

For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.

To allow alignment for both compilers do the following:

Replace use of __rte_aligned_16 with C11 alignas(16) and garbage collect
the __rte_aligned_16 macro which was only used once.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 lib/sched/rte_sched.c        | 21 +++++++++++----------
 lib/sched/rte_sched_common.h |  2 --
 2 files changed, 11 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index d90aa53..bbdb5d1 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -2,6 +2,7 @@ 
  * Copyright(c) 2010-2014 Intel Corporation
  */
 
+#include <stdalign.h>
 #include <stdio.h>
 #include <string.h>
 
@@ -57,7 +58,7 @@  struct rte_sched_pipe_profile {
 	uint8_t  wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_pipe {
+struct __rte_cache_aligned rte_sched_pipe {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -75,7 +76,7 @@  struct rte_sched_pipe {
 	/* TC oversubscription */
 	uint64_t tc_ov_credits;
 	uint8_t tc_ov_period_id;
-} __rte_cache_aligned;
+};
 
 struct rte_sched_queue {
 	uint16_t qw;
@@ -145,7 +146,7 @@  struct rte_sched_grinder {
 	uint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];
 };
 
-struct rte_sched_subport {
+struct __rte_cache_aligned rte_sched_subport {
 	/* Token bucket (TB) */
 	uint64_t tb_time; /* time of last update */
 	uint64_t tb_credits;
@@ -164,7 +165,7 @@  struct rte_sched_subport {
 	double tc_ov_rate;
 
 	/* Statistics */
-	struct rte_sched_subport_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport_stats stats;
 
 	/* subport profile */
 	uint32_t profile;
@@ -193,7 +194,7 @@  struct rte_sched_subport {
 
 	/* Bitmap */
 	struct rte_bitmap *bmp;
-	uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
+	alignas(16) uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS];
 
 	/* Grinders */
 	struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
@@ -212,10 +213,10 @@  struct rte_sched_subport {
 	struct rte_sched_pipe_profile *pipe_profiles;
 	uint8_t *bmp_array;
 	struct rte_mbuf **queue_array;
-	uint8_t memory[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
+};
 
-struct rte_sched_port {
+struct __rte_cache_aligned rte_sched_port {
 	/* User parameters */
 	uint32_t n_subports_per_port;
 	uint32_t n_pipes_per_subport;
@@ -244,8 +245,8 @@  struct rte_sched_port {
 
 	/* Large data structures */
 	struct rte_sched_subport_profile *subport_profiles;
-	struct rte_sched_subport *subports[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_sched_subport *subports[0];
+};
 
 enum rte_sched_subport_array {
 	e_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,
diff --git a/lib/sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
index 419700b..573d164 100644
--- a/lib/sched/rte_sched_common.h
+++ b/lib/sched/rte_sched_common.h
@@ -12,8 +12,6 @@ 
 #include <stdint.h>
 #include <sys/types.h>
 
-#define __rte_aligned_16 __rte_aligned(16)
-
 #if 0
 static inline uint32_t
 rte_min_pos_4_u16(uint16_t *x)