[1/2] test/meson: hash test split into shorter subtests

Message ID	1567748973-24192-2-git-send-email-agupta3@marvell.com (mailing list archive)
State	Superseded, archived
Delegated to:	David Marchand
Headers	show Return-Path: <dev-bounces@dpdk.org> From: <agupta3@marvell.com> To: <yipeng1.wang@intel.com>, <sameh.gobriel@intel.com>, <bruce.richardson@intel.com>, <pablo.de.lara.guarch@intel.com> CC: <dev@dpdk.org>, Amit Gupta <agupta3@marvell.com> Date: Fri, 6 Sep 2019 11:19:32 +0530 Message-ID: <1567748973-24192-2-git-send-email-agupta3@marvell.com> In-Reply-To: <1567748973-24192-1-git-send-email-agupta3@marvell.com> References: <1567748973-24192-1-git-send-email-agupta3@marvell.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [dpdk-dev] [PATCH 1/2] test/meson: hash test split into shorter subtests Precedence: list Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org>
Series	test/meson: fix hash readwrite timeout failure \| expand [0/2] test/meson: fix hash readwrite timeout failure [1/2] test/meson: hash test split into shorter subtests [2/2] test/meson: hash lf test moved to dpdk perf testsuite

Context	Check	Description
ci/checkpatch	success	coding style OK
ci/Intel-compilation	success	Compilation OK
ci/iol-dpdk_compile	success	Compile Testing PASS
ci/iol-dpdk_compile_ovs	success	Compile Testing PASS
ci/iol-dpdk_compile_spdk	success	Compile Testing PASS
ci/intel-Performance	success	Performance Testing PASS
ci/mellanox-Performance	success	Performance Testing PASS

diff --git a/app/test/meson.build b/app/test/meson.build index ec40943..94fd9f8 100644 --- a/app/test/meson.build +++ b/app/test/meson.build @@ -219,7 +219,7 @@ fast_test_names = [ 'distributor_autotest', 'eventdev_common_autotest', 'fbarray_autotest', - 'hash_readwrite_autotest', + 'hash_readwrite_func_autotest', 'hash_readwrite_lf_autotest', 'ipsec_autotest', 'kni_autotest', @@ -262,6 +262,7 @@ perf_test_names = [ 'stack_perf_autotest', 'stack_lf_perf_autotest', 'rand_perf_autotest', + 'hash_readwrite_perf_autotest', ] driver_test_names = [ diff --git a/app/test/test_hash_readwrite.c b/app/test/test_hash_readwrite.c index 4376b09..c25e904 100644 --- a/app/test/test_hash_readwrite.c +++ b/app/test/test_hash_readwrite.c @@ -606,6 +606,150 @@ struct { } static int +test_hash_rw_perf_main(void) +{ + /* + * Variables used to choose different tests. + * use_htm indicates if hardware transactional memory should be used. + * reader_faster indicates if the reader threads should finish earlier + * than writer threads. This is to timing either reader threads or + * writer threads for performance numbers. + */ + int use_htm, reader_faster; + unsigned int i = 0, core_id = 0; + + if (rte_lcore_count() < 3) { + printf("Not enough cores for hash_readwrite_autotest, expecting at least 3\n"); + return TEST_SKIPPED; + } + + RTE_LCORE_FOREACH_SLAVE(core_id) { + slave_core_ids[i] = core_id; + i++; + } + + setlocale(LC_NUMERIC, ""); + + if (rte_tm_supported()) { + printf("Hardware transactional memory (lock elision) " + "is supported\n"); + + printf("Test read-write with Hardware transactional memory\n"); + + use_htm = 1; + + reader_faster = 1; + if (test_hash_readwrite_perf(&htm_results, use_htm, + reader_faster) < 0) + return -1; + + reader_faster = 0; + if (test_hash_readwrite_perf(&htm_results, use_htm, + reader_faster) < 0) + return -1; + } else { + printf("Hardware transactional memory (lock elision) " + "is NOT supported\n"); + } + + printf("Test read-write without Hardware transactional memory\n"); + use_htm = 0; + + reader_faster = 1; + if (test_hash_readwrite_perf(&non_htm_results, use_htm, + reader_faster) < 0) + return -1; + reader_faster = 0; + if (test_hash_readwrite_perf(&non_htm_results, use_htm, + reader_faster) < 0) + return -1; + + printf("================\n"); + printf("Results summary:\n"); + printf("================\n"); + + printf("single read: %u\n", htm_results.single_read); + printf("single write: %u\n", htm_results.single_write); + for (i = 0; i < NUM_TEST; i++) { + printf("+++ core_cnt: %u +++\n", core_cnt[i]); + printf("HTM:\n"); + printf(" read only: %u\n", htm_results.read_only[i]); + printf(" write only: %u\n", htm_results.write_only[i]); + printf(" read-write read: %u\n", htm_results.read_write_r[i]); + printf(" read-write write: %u\n", htm_results.read_write_w[i]); + + printf("non HTM:\n"); + printf(" read only: %u\n", non_htm_results.read_only[i]); + printf(" write only: %u\n", non_htm_results.write_only[i]); + printf(" read-write read: %u\n", + non_htm_results.read_write_r[i]); + printf(" read-write write: %u\n", + non_htm_results.read_write_w[i]); + } + + return 0; +} + +static int +test_hash_rw_func_main(void) +{ + /* + * Variables used to choose different tests. + * use_htm indicates if hardware transactional memory should be used. + * reader_faster indicates if the reader threads should finish earlier + * than writer threads. This is to timing either reader threads or + * writer threads for performance numbers. + */ + int use_htm, use_ext; + unsigned int i = 0, core_id = 0; + + if (rte_lcore_count() < 3) { + printf("Not enough cores for hash_readwrite_autotest, expecting at least 3\n"); + return TEST_SKIPPED; + } + + RTE_LCORE_FOREACH_SLAVE(core_id) { + slave_core_ids[i] = core_id; + i++; + } + + setlocale(LC_NUMERIC, ""); + + if (rte_tm_supported()) { + printf("Hardware transactional memory (lock elision) " + "is supported\n"); + + printf("Test read-write with Hardware transactional memory\n"); + + use_htm = 1; + use_ext = 0; + + if (test_hash_readwrite_functional(use_ext, use_htm) < 0) + return -1; + + use_ext = 1; + if (test_hash_readwrite_functional(use_ext, use_htm) < 0) + return -1; + + } else { + printf("Hardware transactional memory (lock elision) " + "is NOT supported\n"); + } + + printf("Test read-write without Hardware transactional memory\n"); + use_htm = 0; + use_ext = 0; + if (test_hash_readwrite_functional(use_ext, use_htm) < 0) + return -1; + + use_ext = 1; + if (test_hash_readwrite_functional(use_ext, use_htm) < 0) + return -1; + + return 0; +} + +static int test_hash_readwrite_main(void) { /* @@ -706,3 +850,5 @@ struct { } REGISTER_TEST_COMMAND(hash_readwrite_autotest, test_hash_readwrite_main); +REGISTER_TEST_COMMAND(hash_readwrite_func_autotest, test_hash_rw_func_main); +REGISTER_TEST_COMMAND(hash_readwrite_perf_autotest, test_hash_rw_perf_main);

[1/2] test/meson: hash test split into shorter subtests

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