| Message ID | 20220827085908.52080-1-zhoumin@loongson.cn (mailing list archive) |
|---|---|
| Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8E237A054A; Sat, 27 Aug 2022 10:59:20 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2693140DF7; Sat, 27 Aug 2022 10:59:20 +0200 (CEST) Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by mails.dpdk.org (Postfix) with ESMTP id 4640040696 for <dev@dpdk.org>; Sat, 27 Aug 2022 10:59:15 +0200 (CEST) Received: from localhost (unknown [114.241.48.130]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxYOLc3AljmMsKAA--.48593S2; Sat, 27 Aug 2022 16:59:09 +0800 (CST) From: Min Zhou <zhoumin@loongson.cn> To: david.marchand@redhat.com, thomas@monjalon.net, bruce.richardson@intel.com, anatoly.burakov@intel.com, qiming.yang@intel.com, Yuying.Zhang@intel.com, jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru, zhoumin@loongson.cn Cc: dev@dpdk.org, maobibo@loongson.cn Subject: [PATCH v6 0/7] Introduce support for LoongArch architecture Date: Sat, 27 Aug 2022 16:59:01 +0800 Message-Id: <20220827085908.52080-1-zhoumin@loongson.cn> X-Mailer: git-send-email 2.32.1 (Apple Git-133) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf8CxYOLc3AljmMsKAA--.48593S2 X-Coremail-Antispam: 1UD129KBjvJXoW3XF48GrWUKr1fWryDWw1kGrg_yoW7CF1fpr WDCF9xKa1xGr4Ivr9Iva4jgFn5A3Z7Gw12gFyagryrCryIqw1DZr4xKr9rZFy7A34Utr10 qr4fWw1UWF1UWaUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvK14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVCY1x0267AKxVW8Jr 0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E 8cxan2IY04v7MxkIecxEwVAFwVW8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbV WUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF 67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42 IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF 0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxh VjvjDU0xZFpf9x0JU4a0PUUUUU= X-CM-SenderInfo: 52kr3ztlq6z05rqj20fqof0/ X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org |
| Series |
Introduce support for LoongArch architecture
|
|
Message
zhoumin
Aug. 27, 2022, 8:59 a.m. UTC
Dear team,
The following patch set is intended to support DPDK running on LoongArch
architecture.
LoongArch is the general processor architecture of Loongson Corporation
and is a new RISC ISA, which is a bit like MIPS or RISC-V.
The online documents of LoongArch architecture are here:
https://loongson.github.io/LoongArch-Documentation/README-EN.html
The latest build tools for LoongArch (binary) can be downloaded from:
https://github.com/loongson/build-tools
v6:
- place some blocks for LoongArch in a pseudo alphabetical order
- remove some macros not used
- update release notes in the correct format
- remove some headers for LoongArch, including msclock, pflock and
ticketlock, which are now non-arch specific
- rename some helpers to make them more readable
- remove some copied comments
- force-set RTE_FORCE_INTRINSICS in config and remove non-arch
specific implementations
- fix format errors in meson file reported by check-meson.py
- rebase the patchset on the main repository
v5:
- merge all patches for supporting LoongArch EAL into one patch
- add LoongArch cross compilation document and update some documents
related to architecture
- remove vector stubs added for LoongArch in net/i40e and net/ixgbe
- add LOONGARCH64 cross compilation job in github ci
v4:
- rebase the patchset on the main repository of version 22.07.0
v3:
- add URL for cross compile tool chain
- remove rte_lpm_lsx.h which was a dummy vector implementation
because there is already a scalar implementation, thanks to
Michal Mazurek
- modify the name of compiler for cross compiling
- remove useless variable in meson.build
v2:
- use standard atomics of toolchain to implement
atomic operations
- implement spinlock based on standard atomics
*** BLURB HERE ***
Min Zhou (7):
eal/loongarch: support LoongArch architecture
net/ixgbe: add vector stubs for LoongArch
net/memif: set memfd syscall ID on LoongArch
net/tap: set BPF syscall ID for LoongArch
examples/l3fwd: enable LoongArch operation
test/cpuflags: add test for LoongArch cpu flag
ci: add LOONGARCH64 cross compilation job
.ci/linux-build.sh | 10 ++
.github/workflows/build.yml | 10 +-
MAINTAINERS | 6 ++
app/test/test_cpuflags.c | 41 ++++++++
app/test/test_xmmt_ops.h | 12 +++
.../loongarch/loongarch_loongarch64_linux_gcc | 16 ++++
config/loongarch/meson.build | 43 +++++++++
doc/guides/contributing/design.rst | 2 +-
.../cross_build_dpdk_for_loongarch.rst | 87 +++++++++++++++++
doc/guides/linux_gsg/index.rst | 1 +
doc/guides/nics/features.rst | 8 ++
doc/guides/nics/features/default.ini | 1 +
doc/guides/nics/features/ixgbe.ini | 1 +
doc/guides/rel_notes/release_22_11.rst | 7 ++
drivers/net/i40e/meson.build | 6 ++
drivers/net/ixgbe/ixgbe_rxtx.c | 7 +-
drivers/net/memif/rte_eth_memif.h | 2 +
drivers/net/tap/tap_bpf.h | 2 +
examples/l3fwd/l3fwd_em.c | 8 ++
lib/eal/linux/eal_memory.c | 4 +
lib/eal/loongarch/include/meson.build | 18 ++++
lib/eal/loongarch/include/rte_atomic.h | 47 ++++++++++
lib/eal/loongarch/include/rte_byteorder.h | 40 ++++++++
lib/eal/loongarch/include/rte_cpuflags.h | 39 ++++++++
lib/eal/loongarch/include/rte_cycles.h | 47 ++++++++++
lib/eal/loongarch/include/rte_io.h | 18 ++++
lib/eal/loongarch/include/rte_memcpy.h | 61 ++++++++++++
lib/eal/loongarch/include/rte_pause.h | 24 +++++
.../loongarch/include/rte_power_intrinsics.h | 20 ++++
lib/eal/loongarch/include/rte_prefetch.h | 47 ++++++++++
lib/eal/loongarch/include/rte_rwlock.h | 42 +++++++++
lib/eal/loongarch/include/rte_spinlock.h | 64 +++++++++++++
lib/eal/loongarch/include/rte_vect.h | 65 +++++++++++++
lib/eal/loongarch/meson.build | 11 +++
lib/eal/loongarch/rte_cpuflags.c | 93 +++++++++++++++++++
lib/eal/loongarch/rte_cycles.c | 45 +++++++++
lib/eal/loongarch/rte_hypervisor.c | 11 +++
lib/eal/loongarch/rte_power_intrinsics.c | 51 ++++++++++
meson.build | 2 +
39 files changed, 1015 insertions(+), 4 deletions(-)
create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc
create mode 100644 config/loongarch/meson.build
create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst
create mode 100644 lib/eal/loongarch/include/meson.build
create mode 100644 lib/eal/loongarch/include/rte_atomic.h
create mode 100644 lib/eal/loongarch/include/rte_byteorder.h
create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h
create mode 100644 lib/eal/loongarch/include/rte_cycles.h
create mode 100644 lib/eal/loongarch/include/rte_io.h
create mode 100644 lib/eal/loongarch/include/rte_memcpy.h
create mode 100644 lib/eal/loongarch/include/rte_pause.h
create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h
create mode 100644 lib/eal/loongarch/include/rte_prefetch.h
create mode 100644 lib/eal/loongarch/include/rte_rwlock.h
create mode 100644 lib/eal/loongarch/include/rte_spinlock.h
create mode 100644 lib/eal/loongarch/include/rte_vect.h
create mode 100644 lib/eal/loongarch/meson.build
create mode 100644 lib/eal/loongarch/rte_cpuflags.c
create mode 100644 lib/eal/loongarch/rte_cycles.c
create mode 100644 lib/eal/loongarch/rte_hypervisor.c
create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c
Comments
Sincerely ping. On Sat, 27 Aug, 2022 at 16:59 +0800, Min Zhou wrote: > Dear team, > > The following patch set is intended to support DPDK running on LoongArch > architecture. > > LoongArch is the general processor architecture of Loongson Corporation > and is a new RISC ISA, which is a bit like MIPS or RISC-V. > > The online documents of LoongArch architecture are here: > https://loongson.github.io/LoongArch-Documentation/README-EN.html > > The latest build tools for LoongArch (binary) can be downloaded from: > https://github.com/loongson/build-tools > > v6: > - place some blocks for LoongArch in a pseudo alphabetical order > - remove some macros not used > - update release notes in the correct format > - remove some headers for LoongArch, including msclock, pflock and > ticketlock, which are now non-arch specific > - rename some helpers to make them more readable > - remove some copied comments > - force-set RTE_FORCE_INTRINSICS in config and remove non-arch > specific implementations > - fix format errors in meson file reported by check-meson.py > - rebase the patchset on the main repository > > v5: > - merge all patches for supporting LoongArch EAL into one patch > - add LoongArch cross compilation document and update some documents > related to architecture > - remove vector stubs added for LoongArch in net/i40e and net/ixgbe > - add LOONGARCH64 cross compilation job in github ci > > v4: > - rebase the patchset on the main repository of version 22.07.0 > > v3: > - add URL for cross compile tool chain > - remove rte_lpm_lsx.h which was a dummy vector implementation > because there is already a scalar implementation, thanks to > Michal Mazurek > - modify the name of compiler for cross compiling > - remove useless variable in meson.build > > v2: > - use standard atomics of toolchain to implement > atomic operations > - implement spinlock based on standard atomics > > *** BLURB HERE *** > > Min Zhou (7): > eal/loongarch: support LoongArch architecture > net/ixgbe: add vector stubs for LoongArch > net/memif: set memfd syscall ID on LoongArch > net/tap: set BPF syscall ID for LoongArch > examples/l3fwd: enable LoongArch operation > test/cpuflags: add test for LoongArch cpu flag > ci: add LOONGARCH64 cross compilation job > > .ci/linux-build.sh | 10 ++ > .github/workflows/build.yml | 10 +- > MAINTAINERS | 6 ++ > app/test/test_cpuflags.c | 41 ++++++++ > app/test/test_xmmt_ops.h | 12 +++ > .../loongarch/loongarch_loongarch64_linux_gcc | 16 ++++ > config/loongarch/meson.build | 43 +++++++++ > doc/guides/contributing/design.rst | 2 +- > .../cross_build_dpdk_for_loongarch.rst | 87 +++++++++++++++++ > doc/guides/linux_gsg/index.rst | 1 + > doc/guides/nics/features.rst | 8 ++ > doc/guides/nics/features/default.ini | 1 + > doc/guides/nics/features/ixgbe.ini | 1 + > doc/guides/rel_notes/release_22_11.rst | 7 ++ > drivers/net/i40e/meson.build | 6 ++ > drivers/net/ixgbe/ixgbe_rxtx.c | 7 +- > drivers/net/memif/rte_eth_memif.h | 2 + > drivers/net/tap/tap_bpf.h | 2 + > examples/l3fwd/l3fwd_em.c | 8 ++ > lib/eal/linux/eal_memory.c | 4 + > lib/eal/loongarch/include/meson.build | 18 ++++ > lib/eal/loongarch/include/rte_atomic.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_byteorder.h | 40 ++++++++ > lib/eal/loongarch/include/rte_cpuflags.h | 39 ++++++++ > lib/eal/loongarch/include/rte_cycles.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_io.h | 18 ++++ > lib/eal/loongarch/include/rte_memcpy.h | 61 ++++++++++++ > lib/eal/loongarch/include/rte_pause.h | 24 +++++ > .../loongarch/include/rte_power_intrinsics.h | 20 ++++ > lib/eal/loongarch/include/rte_prefetch.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_rwlock.h | 42 +++++++++ > lib/eal/loongarch/include/rte_spinlock.h | 64 +++++++++++++ > lib/eal/loongarch/include/rte_vect.h | 65 +++++++++++++ > lib/eal/loongarch/meson.build | 11 +++ > lib/eal/loongarch/rte_cpuflags.c | 93 +++++++++++++++++++ > lib/eal/loongarch/rte_cycles.c | 45 +++++++++ > lib/eal/loongarch/rte_hypervisor.c | 11 +++ > lib/eal/loongarch/rte_power_intrinsics.c | 51 ++++++++++ > meson.build | 2 + > 39 files changed, 1015 insertions(+), 4 deletions(-) > create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc > create mode 100644 config/loongarch/meson.build > create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst > create mode 100644 lib/eal/loongarch/include/meson.build > create mode 100644 lib/eal/loongarch/include/rte_atomic.h > create mode 100644 lib/eal/loongarch/include/rte_byteorder.h > create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h > create mode 100644 lib/eal/loongarch/include/rte_cycles.h > create mode 100644 lib/eal/loongarch/include/rte_io.h > create mode 100644 lib/eal/loongarch/include/rte_memcpy.h > create mode 100644 lib/eal/loongarch/include/rte_pause.h > create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h > create mode 100644 lib/eal/loongarch/include/rte_prefetch.h > create mode 100644 lib/eal/loongarch/include/rte_rwlock.h > create mode 100644 lib/eal/loongarch/include/rte_spinlock.h > create mode 100644 lib/eal/loongarch/include/rte_vect.h > create mode 100644 lib/eal/loongarch/meson.build > create mode 100644 lib/eal/loongarch/rte_cpuflags.c > create mode 100644 lib/eal/loongarch/rte_cycles.c > create mode 100644 lib/eal/loongarch/rte_hypervisor.c > create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c > -- Thanks, Min Zhou
kindly ping, any comments is welcome. Now linux kernel/gcc/binutils mainline branches have add support for Loongarch. only there is no popular OS distribution. regards bibo,mao 在 2022/9/1 08:09, zhoumin 写道: > Sincerely ping. > > > On Sat, 27 Aug, 2022 at 16:59 +0800, Min Zhou wrote: >> Dear team, >> >> The following patch set is intended to support DPDK running on LoongArch >> architecture. >> >> LoongArch is the general processor architecture of Loongson Corporation >> and is a new RISC ISA, which is a bit like MIPS or RISC-V. >> >> The online documents of LoongArch architecture are here: >> https://loongson.github.io/LoongArch-Documentation/README-EN.html >> >> The latest build tools for LoongArch (binary) can be downloaded from: >> https://github.com/loongson/build-tools >> >> v6: >> - place some blocks for LoongArch in a pseudo alphabetical order >> - remove some macros not used >> - update release notes in the correct format >> - remove some headers for LoongArch, including msclock, pflock and >> ticketlock, which are now non-arch specific >> - rename some helpers to make them more readable >> - remove some copied comments >> - force-set RTE_FORCE_INTRINSICS in config and remove non-arch >> specific implementations >> - fix format errors in meson file reported by check-meson.py >> - rebase the patchset on the main repository >> >> v5: >> - merge all patches for supporting LoongArch EAL into one patch >> - add LoongArch cross compilation document and update some documents >> related to architecture >> - remove vector stubs added for LoongArch in net/i40e and net/ixgbe >> - add LOONGARCH64 cross compilation job in github ci >> >> v4: >> - rebase the patchset on the main repository of version 22.07.0 >> >> v3: >> - add URL for cross compile tool chain >> - remove rte_lpm_lsx.h which was a dummy vector implementation >> because there is already a scalar implementation, thanks to >> Michal Mazurek >> - modify the name of compiler for cross compiling >> - remove useless variable in meson.build >> >> v2: >> - use standard atomics of toolchain to implement >> atomic operations >> - implement spinlock based on standard atomics >> >> *** BLURB HERE *** >> >> Min Zhou (7): >> eal/loongarch: support LoongArch architecture >> net/ixgbe: add vector stubs for LoongArch >> net/memif: set memfd syscall ID on LoongArch >> net/tap: set BPF syscall ID for LoongArch >> examples/l3fwd: enable LoongArch operation >> test/cpuflags: add test for LoongArch cpu flag >> ci: add LOONGARCH64 cross compilation job >> >> .ci/linux-build.sh | 10 ++ >> .github/workflows/build.yml | 10 +- >> MAINTAINERS | 6 ++ >> app/test/test_cpuflags.c | 41 ++++++++ >> app/test/test_xmmt_ops.h | 12 +++ >> .../loongarch/loongarch_loongarch64_linux_gcc | 16 ++++ >> config/loongarch/meson.build | 43 +++++++++ >> doc/guides/contributing/design.rst | 2 +- >> .../cross_build_dpdk_for_loongarch.rst | 87 +++++++++++++++++ >> doc/guides/linux_gsg/index.rst | 1 + >> doc/guides/nics/features.rst | 8 ++ >> doc/guides/nics/features/default.ini | 1 + >> doc/guides/nics/features/ixgbe.ini | 1 + >> doc/guides/rel_notes/release_22_11.rst | 7 ++ >> drivers/net/i40e/meson.build | 6 ++ >> drivers/net/ixgbe/ixgbe_rxtx.c | 7 +- >> drivers/net/memif/rte_eth_memif.h | 2 + >> drivers/net/tap/tap_bpf.h | 2 + >> examples/l3fwd/l3fwd_em.c | 8 ++ >> lib/eal/linux/eal_memory.c | 4 + >> lib/eal/loongarch/include/meson.build | 18 ++++ >> lib/eal/loongarch/include/rte_atomic.h | 47 ++++++++++ >> lib/eal/loongarch/include/rte_byteorder.h | 40 ++++++++ >> lib/eal/loongarch/include/rte_cpuflags.h | 39 ++++++++ >> lib/eal/loongarch/include/rte_cycles.h | 47 ++++++++++ >> lib/eal/loongarch/include/rte_io.h | 18 ++++ >> lib/eal/loongarch/include/rte_memcpy.h | 61 ++++++++++++ >> lib/eal/loongarch/include/rte_pause.h | 24 +++++ >> .../loongarch/include/rte_power_intrinsics.h | 20 ++++ >> lib/eal/loongarch/include/rte_prefetch.h | 47 ++++++++++ >> lib/eal/loongarch/include/rte_rwlock.h | 42 +++++++++ >> lib/eal/loongarch/include/rte_spinlock.h | 64 +++++++++++++ >> lib/eal/loongarch/include/rte_vect.h | 65 +++++++++++++ >> lib/eal/loongarch/meson.build | 11 +++ >> lib/eal/loongarch/rte_cpuflags.c | 93 +++++++++++++++++++ >> lib/eal/loongarch/rte_cycles.c | 45 +++++++++ >> lib/eal/loongarch/rte_hypervisor.c | 11 +++ >> lib/eal/loongarch/rte_power_intrinsics.c | 51 ++++++++++ >> meson.build | 2 + >> 39 files changed, 1015 insertions(+), 4 deletions(-) >> create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc >> create mode 100644 config/loongarch/meson.build >> create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst >> create mode 100644 lib/eal/loongarch/include/meson.build >> create mode 100644 lib/eal/loongarch/include/rte_atomic.h >> create mode 100644 lib/eal/loongarch/include/rte_byteorder.h >> create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h >> create mode 100644 lib/eal/loongarch/include/rte_cycles.h >> create mode 100644 lib/eal/loongarch/include/rte_io.h >> create mode 100644 lib/eal/loongarch/include/rte_memcpy.h >> create mode 100644 lib/eal/loongarch/include/rte_pause.h >> create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h >> create mode 100644 lib/eal/loongarch/include/rte_prefetch.h >> create mode 100644 lib/eal/loongarch/include/rte_rwlock.h >> create mode 100644 lib/eal/loongarch/include/rte_spinlock.h >> create mode 100644 lib/eal/loongarch/include/rte_vect.h >> create mode 100644 lib/eal/loongarch/meson.build >> create mode 100644 lib/eal/loongarch/rte_cpuflags.c >> create mode 100644 lib/eal/loongarch/rte_cycles.c >> create mode 100644 lib/eal/loongarch/rte_hypervisor.c >> create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c >> > > -- > Thanks, > Min Zhou
Kindly ping. Any feedback is appreciated. On 2022年08月27日 16:59, Min Zhou wrote: > Dear team, > > The following patch set is intended to support DPDK running on LoongArch > architecture. > > LoongArch is the general processor architecture of Loongson Corporation > and is a new RISC ISA, which is a bit like MIPS or RISC-V. > > The online documents of LoongArch architecture are here: > https://loongson.github.io/LoongArch-Documentation/README-EN.html > > The latest build tools for LoongArch (binary) can be downloaded from: > https://github.com/loongson/build-tools > > v6: > - place some blocks for LoongArch in a pseudo alphabetical order > - remove some macros not used > - update release notes in the correct format > - remove some headers for LoongArch, including msclock, pflock and > ticketlock, which are now non-arch specific > - rename some helpers to make them more readable > - remove some copied comments > - force-set RTE_FORCE_INTRINSICS in config and remove non-arch > specific implementations > - fix format errors in meson file reported by check-meson.py > - rebase the patchset on the main repository > > v5: > - merge all patches for supporting LoongArch EAL into one patch > - add LoongArch cross compilation document and update some documents > related to architecture > - remove vector stubs added for LoongArch in net/i40e and net/ixgbe > - add LOONGARCH64 cross compilation job in github ci > > v4: > - rebase the patchset on the main repository of version 22.07.0 > > v3: > - add URL for cross compile tool chain > - remove rte_lpm_lsx.h which was a dummy vector implementation > because there is already a scalar implementation, thanks to > Michal Mazurek > - modify the name of compiler for cross compiling > - remove useless variable in meson.build > > v2: > - use standard atomics of toolchain to implement > atomic operations > - implement spinlock based on standard atomics > > *** BLURB HERE *** > > Min Zhou (7): > eal/loongarch: support LoongArch architecture > net/ixgbe: add vector stubs for LoongArch > net/memif: set memfd syscall ID on LoongArch > net/tap: set BPF syscall ID for LoongArch > examples/l3fwd: enable LoongArch operation > test/cpuflags: add test for LoongArch cpu flag > ci: add LOONGARCH64 cross compilation job > > .ci/linux-build.sh | 10 ++ > .github/workflows/build.yml | 10 +- > MAINTAINERS | 6 ++ > app/test/test_cpuflags.c | 41 ++++++++ > app/test/test_xmmt_ops.h | 12 +++ > .../loongarch/loongarch_loongarch64_linux_gcc | 16 ++++ > config/loongarch/meson.build | 43 +++++++++ > doc/guides/contributing/design.rst | 2 +- > .../cross_build_dpdk_for_loongarch.rst | 87 +++++++++++++++++ > doc/guides/linux_gsg/index.rst | 1 + > doc/guides/nics/features.rst | 8 ++ > doc/guides/nics/features/default.ini | 1 + > doc/guides/nics/features/ixgbe.ini | 1 + > doc/guides/rel_notes/release_22_11.rst | 7 ++ > drivers/net/i40e/meson.build | 6 ++ > drivers/net/ixgbe/ixgbe_rxtx.c | 7 +- > drivers/net/memif/rte_eth_memif.h | 2 + > drivers/net/tap/tap_bpf.h | 2 + > examples/l3fwd/l3fwd_em.c | 8 ++ > lib/eal/linux/eal_memory.c | 4 + > lib/eal/loongarch/include/meson.build | 18 ++++ > lib/eal/loongarch/include/rte_atomic.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_byteorder.h | 40 ++++++++ > lib/eal/loongarch/include/rte_cpuflags.h | 39 ++++++++ > lib/eal/loongarch/include/rte_cycles.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_io.h | 18 ++++ > lib/eal/loongarch/include/rte_memcpy.h | 61 ++++++++++++ > lib/eal/loongarch/include/rte_pause.h | 24 +++++ > .../loongarch/include/rte_power_intrinsics.h | 20 ++++ > lib/eal/loongarch/include/rte_prefetch.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_rwlock.h | 42 +++++++++ > lib/eal/loongarch/include/rte_spinlock.h | 64 +++++++++++++ > lib/eal/loongarch/include/rte_vect.h | 65 +++++++++++++ > lib/eal/loongarch/meson.build | 11 +++ > lib/eal/loongarch/rte_cpuflags.c | 93 +++++++++++++++++++ > lib/eal/loongarch/rte_cycles.c | 45 +++++++++ > lib/eal/loongarch/rte_hypervisor.c | 11 +++ > lib/eal/loongarch/rte_power_intrinsics.c | 51 ++++++++++ > meson.build | 2 + > 39 files changed, 1015 insertions(+), 4 deletions(-) > create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc > create mode 100644 config/loongarch/meson.build > create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst > create mode 100644 lib/eal/loongarch/include/meson.build > create mode 100644 lib/eal/loongarch/include/rte_atomic.h > create mode 100644 lib/eal/loongarch/include/rte_byteorder.h > create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h > create mode 100644 lib/eal/loongarch/include/rte_cycles.h > create mode 100644 lib/eal/loongarch/include/rte_io.h > create mode 100644 lib/eal/loongarch/include/rte_memcpy.h > create mode 100644 lib/eal/loongarch/include/rte_pause.h > create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h > create mode 100644 lib/eal/loongarch/include/rte_prefetch.h > create mode 100644 lib/eal/loongarch/include/rte_rwlock.h > create mode 100644 lib/eal/loongarch/include/rte_spinlock.h > create mode 100644 lib/eal/loongarch/include/rte_vect.h > create mode 100644 lib/eal/loongarch/meson.build > create mode 100644 lib/eal/loongarch/rte_cpuflags.c > create mode 100644 lib/eal/loongarch/rte_cycles.c > create mode 100644 lib/eal/loongarch/rte_hypervisor.c > create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c >
Kindly ping. Could anyone give some feedback? Thanks. On 2022年08月27日 16:59, Min Zhou wrote: > Dear team, > > The following patch set is intended to support DPDK running on LoongArch > architecture. > > LoongArch is the general processor architecture of Loongson Corporation > and is a new RISC ISA, which is a bit like MIPS or RISC-V. > > The online documents of LoongArch architecture are here: > https://loongson.github.io/LoongArch-Documentation/README-EN.html > > The latest build tools for LoongArch (binary) can be downloaded from: > https://github.com/loongson/build-tools > > v6: > - place some blocks for LoongArch in a pseudo alphabetical order > - remove some macros not used > - update release notes in the correct format > - remove some headers for LoongArch, including msclock, pflock and > ticketlock, which are now non-arch specific > - rename some helpers to make them more readable > - remove some copied comments > - force-set RTE_FORCE_INTRINSICS in config and remove non-arch > specific implementations > - fix format errors in meson file reported by check-meson.py > - rebase the patchset on the main repository > > v5: > - merge all patches for supporting LoongArch EAL into one patch > - add LoongArch cross compilation document and update some documents > related to architecture > - remove vector stubs added for LoongArch in net/i40e and net/ixgbe > - add LOONGARCH64 cross compilation job in github ci > > v4: > - rebase the patchset on the main repository of version 22.07.0 > > v3: > - add URL for cross compile tool chain > - remove rte_lpm_lsx.h which was a dummy vector implementation > because there is already a scalar implementation, thanks to > Michal Mazurek > - modify the name of compiler for cross compiling > - remove useless variable in meson.build > > v2: > - use standard atomics of toolchain to implement > atomic operations > - implement spinlock based on standard atomics > > *** BLURB HERE *** > > Min Zhou (7): > eal/loongarch: support LoongArch architecture > net/ixgbe: add vector stubs for LoongArch > net/memif: set memfd syscall ID on LoongArch > net/tap: set BPF syscall ID for LoongArch > examples/l3fwd: enable LoongArch operation > test/cpuflags: add test for LoongArch cpu flag > ci: add LOONGARCH64 cross compilation job > > .ci/linux-build.sh | 10 ++ > .github/workflows/build.yml | 10 +- > MAINTAINERS | 6 ++ > app/test/test_cpuflags.c | 41 ++++++++ > app/test/test_xmmt_ops.h | 12 +++ > .../loongarch/loongarch_loongarch64_linux_gcc | 16 ++++ > config/loongarch/meson.build | 43 +++++++++ > doc/guides/contributing/design.rst | 2 +- > .../cross_build_dpdk_for_loongarch.rst | 87 +++++++++++++++++ > doc/guides/linux_gsg/index.rst | 1 + > doc/guides/nics/features.rst | 8 ++ > doc/guides/nics/features/default.ini | 1 + > doc/guides/nics/features/ixgbe.ini | 1 + > doc/guides/rel_notes/release_22_11.rst | 7 ++ > drivers/net/i40e/meson.build | 6 ++ > drivers/net/ixgbe/ixgbe_rxtx.c | 7 +- > drivers/net/memif/rte_eth_memif.h | 2 + > drivers/net/tap/tap_bpf.h | 2 + > examples/l3fwd/l3fwd_em.c | 8 ++ > lib/eal/linux/eal_memory.c | 4 + > lib/eal/loongarch/include/meson.build | 18 ++++ > lib/eal/loongarch/include/rte_atomic.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_byteorder.h | 40 ++++++++ > lib/eal/loongarch/include/rte_cpuflags.h | 39 ++++++++ > lib/eal/loongarch/include/rte_cycles.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_io.h | 18 ++++ > lib/eal/loongarch/include/rte_memcpy.h | 61 ++++++++++++ > lib/eal/loongarch/include/rte_pause.h | 24 +++++ > .../loongarch/include/rte_power_intrinsics.h | 20 ++++ > lib/eal/loongarch/include/rte_prefetch.h | 47 ++++++++++ > lib/eal/loongarch/include/rte_rwlock.h | 42 +++++++++ > lib/eal/loongarch/include/rte_spinlock.h | 64 +++++++++++++ > lib/eal/loongarch/include/rte_vect.h | 65 +++++++++++++ > lib/eal/loongarch/meson.build | 11 +++ > lib/eal/loongarch/rte_cpuflags.c | 93 +++++++++++++++++++ > lib/eal/loongarch/rte_cycles.c | 45 +++++++++ > lib/eal/loongarch/rte_hypervisor.c | 11 +++ > lib/eal/loongarch/rte_power_intrinsics.c | 51 ++++++++++ > meson.build | 2 + > 39 files changed, 1015 insertions(+), 4 deletions(-) > create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc > create mode 100644 config/loongarch/meson.build > create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst > create mode 100644 lib/eal/loongarch/include/meson.build > create mode 100644 lib/eal/loongarch/include/rte_atomic.h > create mode 100644 lib/eal/loongarch/include/rte_byteorder.h > create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h > create mode 100644 lib/eal/loongarch/include/rte_cycles.h > create mode 100644 lib/eal/loongarch/include/rte_io.h > create mode 100644 lib/eal/loongarch/include/rte_memcpy.h > create mode 100644 lib/eal/loongarch/include/rte_pause.h > create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h > create mode 100644 lib/eal/loongarch/include/rte_prefetch.h > create mode 100644 lib/eal/loongarch/include/rte_rwlock.h > create mode 100644 lib/eal/loongarch/include/rte_spinlock.h > create mode 100644 lib/eal/loongarch/include/rte_vect.h > create mode 100644 lib/eal/loongarch/meson.build > create mode 100644 lib/eal/loongarch/rte_cpuflags.c > create mode 100644 lib/eal/loongarch/rte_cycles.c > create mode 100644 lib/eal/loongarch/rte_hypervisor.c > create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c > -- Thanks, Min Zhou