Message ID | 20200827161304.32300-1-ciara.power@intel.com (mailing list archive) |
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Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 88C9CA04B1; Thu, 27 Aug 2020 18:13:18 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4D1541BC24; Thu, 27 Aug 2020 18:13:18 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id CC18E1F1C for <dev@dpdk.org>; Thu, 27 Aug 2020 18:13:15 +0200 (CEST) IronPort-SDR: chW8dvhqjO3gWu6Rtv7YJf60zIXVPJrt0oXNQFk0zVQXV1Ug2GIcq33FrU5H/Tu8GuwKB21e7K CgkLHmQOByAQ== X-IronPort-AV: E=McAfee;i="6000,8403,9726"; a="220766973" X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="220766973" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Aug 2020 09:13:14 -0700 IronPort-SDR: fjuN/q2GjsnNwsrAfObVBD9BhPmysjqDCDGvUMS1qVxqhHL8TuyY/i9PHszjeK5+thoHfjUTZT 5kHd3BVeQtPw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,360,1592895600"; d="scan'208";a="280681395" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2020 09:13:13 -0700 From: Ciara Power <ciara.power@intel.com> To: dev@dpdk.org Cc: Ciara Power <ciara.power@intel.com> Date: Thu, 27 Aug 2020 17:12:47 +0100 Message-Id: <20200827161304.32300-1-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200807155859.63888-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v2 00/17] add max SIMD bitwidth to EAL X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
Series |
add max SIMD bitwidth to EAL
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Message
Power, Ciara
Aug. 27, 2020, 4:12 p.m. UTC
v2: - Added some documentation. - Modified default max bitwidth for Arm. - Moved mlx5 condition check into existing check vec support function. - Added max SIMD bitwidth checks to some libraries. A number of components in DPDK have optional AVX-512 or other vector code paths which can be selected at runtime. Rather than having each component provide its own mechanism to select a code path, this patchset adds support for a single setting to control what code paths are used. This can be used to enable some non-default code paths e.g. ones using AVX-512, but also to limit the code paths to certain vector widths, or to scalar code only, which is useful for testing. The max SIMD bitwidth setting can be set by the app itself through use of the available API, or can be overriden by a commandline argument passed by the user. Ciara Power (17): eal: add max SIMD bitwidth eal: add default SIMD bitwidth values doc: add detail on using max SIMD bitwidth net/i40e: add checks for max SIMD bitwidth net/axgbe: add checks for max SIMD bitwidth net/bnxt: add checks for max SIMD bitwidth net/enic: add checks for max SIMD bitwidth net/fm10k: add checks for max SIMD bitwidth net/iavf: add checks for max SIMD bitwidth net/ice: add checks for max SIMD bitwidth net/ixgbe: add checks for max SIMD bitwidth net/mlx5: add checks for max SIMD bitwidth net/virtio: add checks for max SIMD bitwidth distributor: add checks for max SIMD bitwidth member: add checks for max SIMD bitwidth efd: add checks for max SIMD bitwidth net: add checks for max SIMD bitwidth doc/guides/howto/avx512.rst | 36 +++++++++++ doc/guides/linux_gsg/eal_args.include.rst | 12 ++++ .../prog_guide/env_abstraction_layer.rst | 31 +++++++++ drivers/net/axgbe/axgbe_rxtx.c | 3 +- drivers/net/bnxt/bnxt_ethdev.c | 6 +- drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- drivers/net/fm10k/fm10k_ethdev.c | 11 +++- drivers/net/i40e/i40e_rxtx.c | 19 ++++-- drivers/net/iavf/iavf_rxtx.c | 16 +++-- drivers/net/ice/ice_rxtx.c | 20 ++++-- drivers/net/ixgbe/ixgbe_rxtx.c | 7 ++- drivers/net/mlx5/mlx5_rxtx_vec.c | 2 + drivers/net/virtio/virtio_ethdev.c | 12 ++-- lib/librte_distributor/rte_distributor.c | 3 +- lib/librte_eal/arm/include/rte_vect.h | 2 + lib/librte_eal/common/eal_common_options.c | 63 +++++++++++++++++++ lib/librte_eal/common/eal_internal_cfg.h | 8 +++ lib/librte_eal/common/eal_options.h | 2 + lib/librte_eal/include/generic/rte_vect.h | 2 + lib/librte_eal/include/rte_eal.h | 32 ++++++++++ lib/librte_eal/ppc/include/rte_vect.h | 2 + lib/librte_eal/rte_eal_version.map | 4 ++ lib/librte_eal/x86/include/rte_vect.h | 2 + lib/librte_efd/rte_efd.c | 7 ++- lib/librte_member/rte_member_ht.c | 3 +- lib/librte_net/rte_net_crc.c | 8 +++ 26 files changed, 281 insertions(+), 35 deletions(-) create mode 100644 doc/guides/howto/avx512.rst