[v2,04/10] crypto/nitrox: add basic symmetric cryptodev operations

Message ID 20190719123309.24417-5-rnagadheeraj@marvell.com
State New
Delegated to: akhil goyal
Headers show
Series
  • add Nitrox crypto device support
Related show

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Nagadheeraj Rottela July 19, 2019, 12:33 p.m.
Add the following cryptodev operations,
- dev_configure
- dev_start
- dev_stop
- dev_close
- dev_infos_get

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
---
 doc/guides/cryptodevs/features/nitrox.ini       | 38 ++++++++++++
 doc/guides/cryptodevs/nitrox.rst                | 37 +++++++++++
 drivers/crypto/nitrox/Makefile                  |  1 +
 drivers/crypto/nitrox/meson.build               |  1 +
 drivers/crypto/nitrox/nitrox_sym.c              | 81 ++++++++++++++++++++++++-
 drivers/crypto/nitrox/nitrox_sym_capabilities.c | 57 +++++++++++++++++
 drivers/crypto/nitrox/nitrox_sym_capabilities.h | 12 ++++
 7 files changed, 226 insertions(+), 1 deletion(-)
 create mode 100644 doc/guides/cryptodevs/features/nitrox.ini
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.c
 create mode 100644 drivers/crypto/nitrox/nitrox_sym_capabilities.h

Patch

diff --git a/doc/guides/cryptodevs/features/nitrox.ini b/doc/guides/cryptodevs/features/nitrox.ini
new file mode 100644
index 000000000..9f9e2619c
--- /dev/null
+++ b/doc/guides/cryptodevs/features/nitrox.ini
@@ -0,0 +1,38 @@ 
+;
+; Supported features of the 'nitrox' crypto driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Symmetric crypto       = Y
+Sym operation chaining = Y
+HW Accelerated         = Y
+In Place SGL           = Y
+OOP SGL In SGL Out     = Y
+OOP SGL In LB  Out     = Y
+OOP LB  In SGL Out     = Y
+OOP LB  In LB  Out     = Y
+
+;
+; Supported crypto algorithms of the 'nitrox' crypto driver.
+;
+[Cipher]
+AES CBC (128)  = Y
+AES CBC (192)  = Y
+AES CBC (256)  = Y
+
+;
+; Supported authentication algorithms of the 'nitrox' crypto driver.
+;
+[Auth]
+SHA1 HMAC    = Y
+
+;
+; Supported AEAD algorithms of the 'nitrox' crypto driver.
+;
+[AEAD]
+
+;
+; Supported Asymmetric algorithms of the 'nitrox' crypto driver.
+;
+[Asymmetric]
diff --git a/doc/guides/cryptodevs/nitrox.rst b/doc/guides/cryptodevs/nitrox.rst
index b6b86dda5..c16a5e393 100644
--- a/doc/guides/cryptodevs/nitrox.rst
+++ b/doc/guides/cryptodevs/nitrox.rst
@@ -9,3 +9,40 @@  cryptographic operations to the NITROX V security processor. Detailed
 information about the NITROX V security processor can be obtained here:
 
 * https://www.marvell.com/security-solutions/nitrox-security-processors/nitrox-v/
+
+Features
+--------
+
+Nitrox crypto PMD has support for:
+
+Cipher algorithms:
+
+* ``RTE_CRYPTO_CIPHER_AES_CBC``
+
+Hash algorithms:
+
+* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
+
+Limitations
+-----------
+
+* AES_CBC Cipher Only combination is not supported.
+
+Installation
+------------
+
+For compiling the Nitrox crypto PMD, please check if the
+CONFIG_RTE_LIBRTE_PMD_NITROX setting is set to `y` in config/common_base file.
+
+* ``CONFIG_RTE_LIBRTE_PMD_NITROX=y``
+
+Initialization
+--------------
+
+Nitrox crypto PMD depend on Nitrox kernel PF driver being installed on the
+platform. Nitrox PF driver is required to create VF devices which will
+be used by the PMD. Each VF device can enable one cryptodev PMD.
+
+Nitrox kernel PF driver is available as part of CNN55XX-Driver SDK. The SDK
+and it's installation instructions can be obtained from:
+`Marvell Technical Documentation Portal <https://support.cavium.com/>`_.
diff --git a/drivers/crypto/nitrox/Makefile b/drivers/crypto/nitrox/Makefile
index 06c96ccd7..dedb74a34 100644
--- a/drivers/crypto/nitrox/Makefile
+++ b/drivers/crypto/nitrox/Makefile
@@ -27,5 +27,6 @@  SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_device.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_hal.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_logs.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_NITROX) += nitrox_sym_capabilities.c
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/crypto/nitrox/meson.build b/drivers/crypto/nitrox/meson.build
index 1277cf58e..7c565c5a4 100644
--- a/drivers/crypto/nitrox/meson.build
+++ b/drivers/crypto/nitrox/meson.build
@@ -13,4 +13,5 @@  sources = files(
 		'nitrox_hal.c',
 		'nitrox_logs.c',
 		'nitrox_sym.c',
+		'nitrox_sym_capabilities.c',
 		)
diff --git a/drivers/crypto/nitrox/nitrox_sym.c b/drivers/crypto/nitrox/nitrox_sym.c
index c72016dd0..c05042e54 100644
--- a/drivers/crypto/nitrox/nitrox_sym.c
+++ b/drivers/crypto/nitrox/nitrox_sym.c
@@ -9,6 +9,7 @@ 
 
 #include "nitrox_sym.h"
 #include "nitrox_device.h"
+#include "nitrox_sym_capabilities.h"
 #include "nitrox_logs.h"
 
 #define CRYPTODEV_NAME_NITROX_PMD crypto_nitrox
@@ -25,6 +26,84 @@  static const struct rte_driver nitrox_rte_sym_drv = {
 	.alias = nitrox_sym_drv_name
 };
 
+static int nitrox_sym_dev_qp_release(struct rte_cryptodev *cdev,
+				     uint16_t qp_id);
+
+static int
+nitrox_sym_dev_config(__rte_unused struct rte_cryptodev *cdev,
+		      __rte_unused struct rte_cryptodev_config *config)
+{
+	return 0;
+}
+
+static int
+nitrox_sym_dev_start(__rte_unused struct rte_cryptodev *cdev)
+{
+	return 0;
+}
+
+static void
+nitrox_sym_dev_stop(__rte_unused struct rte_cryptodev *cdev)
+{
+}
+
+static int
+nitrox_sym_dev_close(struct rte_cryptodev *cdev)
+{
+	int i, ret;
+
+	for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
+		ret = nitrox_sym_dev_qp_release(cdev, i);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static void
+nitrox_sym_dev_info_get(struct rte_cryptodev *cdev,
+			struct rte_cryptodev_info *info)
+{
+	struct nitrox_sym_device *sym_dev = cdev->data->dev_private;
+	struct nitrox_device *ndev = sym_dev->ndev;
+
+	if (!info)
+		return;
+
+	info->max_nb_queue_pairs = ndev->nr_queues;
+	info->feature_flags = cdev->feature_flags;
+	info->capabilities = nitrox_get_sym_capabilities();
+	info->driver_id = nitrox_sym_drv_id;
+	info->sym.max_nb_sessions = 0;
+}
+
+static int
+nitrox_sym_dev_qp_release(struct rte_cryptodev *cdev, uint16_t qp_id)
+{
+	RTE_SET_USED(cdev);
+	RTE_SET_USED(qp_id);
+	return 0;
+}
+
+static struct rte_cryptodev_ops nitrox_cryptodev_ops = {
+	.dev_configure		= nitrox_sym_dev_config,
+	.dev_start		= nitrox_sym_dev_start,
+	.dev_stop		= nitrox_sym_dev_stop,
+	.dev_close		= nitrox_sym_dev_close,
+	.dev_infos_get		= nitrox_sym_dev_info_get,
+
+	.stats_get		= NULL,
+	.stats_reset		= NULL,
+
+	.queue_pair_setup	= NULL,
+	.queue_pair_release     = NULL,
+
+	.sym_session_get_size   = NULL,
+	.sym_session_configure  = NULL,
+	.sym_session_clear      = NULL
+};
+
 int
 nitrox_sym_pmd_create(struct nitrox_device *ndev)
 {
@@ -50,7 +129,7 @@  nitrox_sym_pmd_create(struct nitrox_device *ndev)
 
 	ndev->rte_sym_dev.name = cdev->data->name;
 	cdev->driver_id = nitrox_sym_drv_id;
-	cdev->dev_ops = NULL;
+	cdev->dev_ops = &nitrox_cryptodev_ops;
 	cdev->enqueue_burst = NULL;
 	cdev->dequeue_burst = NULL;
 	cdev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
diff --git a/drivers/crypto/nitrox/nitrox_sym_capabilities.c b/drivers/crypto/nitrox/nitrox_sym_capabilities.c
new file mode 100644
index 000000000..aa1ff2638
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_sym_capabilities.c
@@ -0,0 +1,57 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "nitrox_sym_capabilities.h"
+
+static const struct rte_cryptodev_capabilities nitrox_capabilities[] = {
+	{	/* SHA1 HMAC */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
+				.block_size = 64,
+				.key_size = {
+					.min = 1,
+					.max = 64,
+					.increment = 1
+				},
+				.digest_size = {
+					.min = 1,
+					.max = 20,
+					.increment = 1
+				},
+				.iv_size = { 0 }
+			}, }
+		}, }
+	},
+	{	/* AES CBC */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_AES_CBC,
+				.block_size = 16,
+				.key_size = {
+					.min = 16,
+					.max = 32,
+					.increment = 8
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
+
+	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
+};
+
+const struct rte_cryptodev_capabilities *
+nitrox_get_sym_capabilities(void)
+{
+	return nitrox_capabilities;
+}
diff --git a/drivers/crypto/nitrox/nitrox_sym_capabilities.h b/drivers/crypto/nitrox/nitrox_sym_capabilities.h
new file mode 100644
index 000000000..cb2d97572
--- /dev/null
+++ b/drivers/crypto/nitrox/nitrox_sym_capabilities.h
@@ -0,0 +1,12 @@ 
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef _NITROX_SYM_CAPABILITIES_H_
+#define _NITROX_SYM_CAPABILITIES_H_
+
+#include <rte_cryptodev.h>
+
+const struct rte_cryptodev_capabilities *nitrox_get_sym_capabilities(void);
+
+#endif /* _NITROX_SYM_CAPABILITIES_H_ */