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Update a patch.

GET /api/patches/99362/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 99362,
    "url": "http://patches.dpdk.org/api/patches/99362/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210921132009.3461020-11-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210921132009.3461020-11-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210921132009.3461020-11-qi.z.zhang@intel.com",
    "date": "2021-09-21T13:19:59",
    "name": "[v3,10/20] net/ice/base: init XLT key builder for parser",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "a99b1ccd1f74c111bf256ab7b73d279644c6026d",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210921132009.3461020-11-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 19057,
            "url": "http://patches.dpdk.org/api/series/19057/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19057",
            "date": "2021-09-21T13:19:49",
            "name": "ice/base: add parser module",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/19057/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/99362/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/99362/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BD9F1A0C4C;\n\tTue, 21 Sep 2021 15:18:27 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A280141172;\n\tTue, 21 Sep 2021 15:17:25 +0200 (CEST)",
            "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id 746B341150\n for <dev@dpdk.org>; Tue, 21 Sep 2021 15:17:21 +0200 (CEST)",
            "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Sep 2021 06:17:20 -0700",
            "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga008.jf.intel.com with ESMTP; 21 Sep 2021 06:17:19 -0700"
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10113\"; a=\"202847469\"",
            "E=Sophos;i=\"5.85,311,1624345200\"; d=\"scan'208\";a=\"202847469\"",
            "E=Sophos;i=\"5.85,311,1624345200\"; d=\"scan'208\";a=\"484173882\""
        ],
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "qiming.yang@intel.com",
        "Cc": "junfeng.guo@intel.com,\n\tdev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>",
        "Date": "Tue, 21 Sep 2021 21:19:59 +0800",
        "Message-Id": "<20210921132009.3461020-11-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20210921132009.3461020-1-qi.z.zhang@intel.com>",
        "References": "<20210921132009.3461020-1-qi.z.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v3 10/20] net/ice/base: init XLT key builder for\n parser",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Parse below DDP section into struct ice_xlt_kb:\nICE_SID_XLT_KEY_BUILDER_SW\nICE_SID_XLT_KEY_BUILDER_FD\nICE_SID_XLT_KEY_BUILDER_RSS\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n drivers/net/ice/base/ice_flex_pipe.c |   2 +-\n drivers/net/ice/base/ice_flex_pipe.h |   3 +\n drivers/net/ice/base/ice_parser.c    |  28 ++++\n drivers/net/ice/base/ice_parser.h    |   9 ++\n drivers/net/ice/base/ice_xlt_kb.c    | 189 +++++++++++++++++++++++++++\n drivers/net/ice/base/ice_xlt_kb.h    |  33 +++++\n drivers/net/ice/base/meson.build     |   1 +\n 7 files changed, 264 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/ice/base/ice_xlt_kb.c\n create mode 100644 drivers/net/ice/base/ice_xlt_kb.h",
    "diff": "diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex 703c3e0416..f35d59f4f5 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -218,7 +218,7 @@ ice_pkg_advance_sect(struct ice_seg *ice_seg, struct ice_pkg_enum *state)\n  * When the function returns a NULL pointer, then the end of the matching\n  * sections has been reached.\n  */\n-static void *\n+void *\n ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state,\n \t\t     u32 sect_type)\n {\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h\nindex 045a77c607..9733c4b214 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.h\n+++ b/drivers/net/ice/base/ice_flex_pipe.h\n@@ -99,4 +99,7 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state,\n \t\t   u32 sect_type, u32 *offset,\n \t\t   void *(*handler)(u32 sect_type, void *section,\n \t\t\t\t    u32 index, u32 *offset));\n+void *\n+ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state,\n+\t\t     u32 sect_type);\n #endif /* _ICE_FLEX_PIPE_H_ */\ndiff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c\nindex 02a299aa04..1bce75a05c 100644\n--- a/drivers/net/ice/base/ice_parser.c\n+++ b/drivers/net/ice/base/ice_parser.c\n@@ -245,6 +245,30 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)\n \t\tgoto err;\n \t}\n \n+\tp->xlt_kb_sw = ice_xlt_kb_get_sw(hw);\n+\tif (!p->xlt_kb_sw) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n+\tp->xlt_kb_acl = ice_xlt_kb_get_acl(hw);\n+\tif (!p->xlt_kb_acl) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n+\tp->xlt_kb_fd = ice_xlt_kb_get_fd(hw);\n+\tif (!p->xlt_kb_fd) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n+\tp->xlt_kb_rss = ice_xlt_kb_get_rss(hw);\n+\tif (!p->xlt_kb_rss) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n \t*psr = p;\n \treturn ICE_SUCCESS;\n err:\n@@ -270,6 +294,10 @@ void ice_parser_destroy(struct ice_parser *psr)\n \tice_free(psr->hw, psr->mk_grp_table);\n \tice_free(psr->hw, psr->proto_grp_table);\n \tice_free(psr->hw, psr->flg_rd_table);\n+\tice_free(psr->hw, psr->xlt_kb_sw);\n+\tice_free(psr->hw, psr->xlt_kb_acl);\n+\tice_free(psr->hw, psr->xlt_kb_fd);\n+\tice_free(psr->hw, psr->xlt_kb_rss);\n \n \tice_free(psr->hw, psr);\n }\ndiff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h\nindex 272eb28d5b..ba3175e60f 100644\n--- a/drivers/net/ice/base/ice_parser.h\n+++ b/drivers/net/ice/base/ice_parser.h\n@@ -13,6 +13,7 @@\n #include \"ice_mk_grp.h\"\n #include \"ice_proto_grp.h\"\n #include \"ice_flg_rd.h\"\n+#include \"ice_xlt_kb.h\"\n \n struct ice_parser {\n \tstruct ice_hw *hw; /* pointer to the hardware structure */\n@@ -41,6 +42,14 @@ struct ice_parser {\n \tstruct ice_proto_grp_item *proto_grp_table;\n \t/* load data from section ICE_SID_RXPARSER_FLAG_REDIR */\n \tstruct ice_flg_rd_item *flg_rd_table;\n+\t/* load data from section ICE_SID_XLT_KEY_BUILDER_SW */\n+\tstruct ice_xlt_kb *xlt_kb_sw;\n+\t/* load data from section ICE_SID_XLT_KEY_BUILDER_ACL */\n+\tstruct ice_xlt_kb *xlt_kb_acl;\n+\t/* load data from section ICE_SID_XLT_KEY_BUILDER_FD */\n+\tstruct ice_xlt_kb *xlt_kb_fd;\n+\t/* load data from section ICE_SID_XLT_KEY_BUILDER_RSS */\n+\tstruct ice_xlt_kb *xlt_kb_rss;\n };\n \n enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);\ndiff --git a/drivers/net/ice/base/ice_xlt_kb.c b/drivers/net/ice/base/ice_xlt_kb.c\nnew file mode 100644\nindex 0000000000..8b4043a836\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_xlt_kb.c\n@@ -0,0 +1,189 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2021 Intel Corporation\n+ */\n+\n+#include \"ice_common.h\"\n+\n+#define ICE_XLT_KB_TBL_OFF 12\n+#define ICE_XLT_KB_TBL_ENTRY_SIZE 24\n+\n+static void _xlt_kb_entry_dump(struct ice_hw *hw,\n+\t\t\t       struct ice_xlt_kb_entry *entry, int idx)\n+{\n+\tint i;\n+\n+\tice_info(hw, \"key builder entry %d\\n\", idx);\n+\tice_info(hw, \"\\txlt1_ad_sel = %d\\n\", entry->xlt1_ad_sel);\n+\tice_info(hw, \"\\txlt2_ad_sel = %d\\n\", entry->xlt2_ad_sel);\n+\n+\tfor (i = 0; i < ICE_XLT_KB_FLAG0_14_CNT; i++)\n+\t\tice_info(hw, \"\\tflg%d_sel = %d\\n\", i, entry->flg0_14_sel[i]);\n+\n+\tice_info(hw, \"\\txlt1_md_sel = %d\\n\", entry->xlt1_md_sel);\n+\tice_info(hw, \"\\txlt2_md_sel = %d\\n\", entry->xlt2_md_sel);\n+}\n+\n+/**\n+ * ice_imem_dump - dump a xlt key build info\n+ * @ice_hw: pointer to the hardware structure\n+ * @kb: key build to dump\n+ */\n+void ice_xlt_kb_dump(struct ice_hw *hw, struct ice_xlt_kb *kb)\n+{\n+\tint i;\n+\n+\tice_info(hw, \"xlt1_pm = %d\\n\", kb->xlt1_pm);\n+\tice_info(hw, \"xlt2_pm = %d\\n\", kb->xlt2_pm);\n+\tice_info(hw, \"prof_id_pm = %d\\n\", kb->prof_id_pm);\n+\tice_info(hw, \"flag15 low  = 0x%08x\\n\", (u32)kb->flag15);\n+\tice_info(hw, \"flag15 high = 0x%08x\\n\", (u32)(kb->flag15 >> 32));\n+\n+\tfor (i = 0; i < ICE_XLT_KB_TBL_CNT; i++)\n+\t\t_xlt_kb_entry_dump(hw, &kb->entries[i], i);\n+}\n+\n+/** The function parses a 192 bits XLT Key Build entry with below format:\n+ *  BIT 0-31:\treserved\n+ *  BIT 32-34:\tXLT1 AdSel (entry->xlt1_ad_sel)\n+ *  BIT 35-37:\tXLT2 AdSel (entry->xlt2_ad_sel)\n+ *  BIT 38-46:\tFlag 0 Select (entry->flg0_14_sel[0])\n+ *  BIT 47-55:\tFlag 1 Select (entry->flg0_14_sel[1])\n+ *  BIT 56-64:\tFlag 2 Select (entry->flg0_14_sel[2])\n+ *  BIT 65-73:\tFlag 3 Select (entry->flg0_14_sel[3])\n+ *  BIT 74-82:\tFlag 4 Select (entry->flg0_14_sel[4])\n+ *  BIT 83-91:\tFlag 5 Select (entry->flg0_14_sel[5])\n+ *  BIT 92-100:\tFlag 6 Select (entry->flg0_14_sel[6])\n+ *  BIT 101-109:Flag 7 Select (entry->flg0_14_sel[7])\n+ *  BIT 110-118:Flag 8 Select (entry->flg0_14_sel[8])\n+ *  BIT 119-127:Flag 9 Select (entry->flg0_14_sel[9])\n+ *  BIT 128-136:Flag 10 Select (entry->flg0_14_sel[10])\n+ *  BIT 137-145:Flag 11 Select (entry->flg0_14_sel[11])\n+ *  BIT 146-154:Flag 12 Select (entry->flg0_14_sel[12])\n+ *  BIT 155-163:Flag 13 Select (entry->flg0_14_sel[13])\n+ *  BIT 164-172:Flag 14 Select (entry->flg0_14_sel[14])\n+ *  BIT 173-181:reserved\n+ *  BIT 182-186:XLT1 MdSel (entry->xlt1_md_sel)\n+ *  BIT 187-191:XLT2 MdSel (entry->xlt2_md_sel)\n+ */\n+static void _kb_entry_init(struct ice_xlt_kb_entry *entry, u8 *data)\n+{\n+\tu64 d64 = *(u64 *)&data[4];\n+\n+\tentry->xlt1_ad_sel = (u8)(d64 & 0x7);\n+\tentry->xlt2_ad_sel = (u8)((d64 >> 3) & 0x7);\n+\tentry->flg0_14_sel[0] = (u16)((d64 >> 6) & 0x1ff);\n+\tentry->flg0_14_sel[1] = (u16)((d64 >> 15) & 0x1ff);\n+\tentry->flg0_14_sel[2] = (u16)((d64 >> 24) & 0x1ff);\n+\tentry->flg0_14_sel[3] = (u16)((d64 >> 33) & 0x1ff);\n+\tentry->flg0_14_sel[4] = (u16)((d64 >> 42) & 0x1ff);\n+\tentry->flg0_14_sel[5] = (u16)((d64 >> 51) & 0x1ff);\n+\n+\td64 = (*(u64 *)&data[11] >> 4);\n+\tentry->flg0_14_sel[6] = (u16)(d64 & 0x1ff);\n+\tentry->flg0_14_sel[7] = (u16)((d64 >> 9) & 0x1ff);\n+\tentry->flg0_14_sel[8] = (u16)((d64 >> 18) & 0x1ff);\n+\tentry->flg0_14_sel[9] = (u16)((d64 >> 27) & 0x1ff);\n+\tentry->flg0_14_sel[10] = (u16)((d64 >> 36) & 0x1ff);\n+\tentry->flg0_14_sel[11] = (u16)((d64 >> 45) & 0x1ff);\n+\n+\td64 = (*(u64 *)&data[18] >> 2);\n+\tentry->flg0_14_sel[12] = (u16)(d64 & 0x1ff);\n+\tentry->flg0_14_sel[13] = (u16)((d64 >> 9) & 0x1ff);\n+\tentry->flg0_14_sel[14] = (u16)((d64 >> 18) & 0x1ff);\n+\n+\tentry->xlt1_md_sel = (u8)((d64 >> 36) & 0x1f);\n+\tentry->xlt2_md_sel = (u8)((d64 >> 41) & 0x1f);\n+}\n+\n+/** The function parses a 204 bytes XLT Key Build Table with below format:\n+ *  byte 0:\tXLT1 Partition Mode (kb->xlt1_pm)\n+ *  byte 1:\tXLT2 Partition Mode (kb->xlt2_pm)\n+ *  byte 2:\tProfile ID Partition Mode (kb->prof_id_pm)\n+ *  byte 3:\treserved\n+ *  byte 4-11:\tFlag15 Mask (kb->flag15)\n+ *  byte 12-203:8 Key Build entries (kb->entries)\n+ */\n+static void _parse_kb_data(struct ice_hw *hw, struct ice_xlt_kb *kb, void *data)\n+{\n+\tu8 *buf = (u8 *)data;\n+\tint i;\n+\n+\tkb->xlt1_pm = buf[0];\n+\tkb->xlt2_pm = buf[1];\n+\tkb->prof_id_pm = buf[2];\n+\n+\tkb->flag15 = *(u64 *)&buf[4];\n+\tfor (i = 0; i < ICE_XLT_KB_TBL_CNT; i++)\n+\t\t_kb_entry_init(&kb->entries[i],\n+\t\t\t       &buf[ICE_XLT_KB_TBL_OFF +\n+\t\t\t\t    i * ICE_XLT_KB_TBL_ENTRY_SIZE]);\n+\n+\tif (hw->debug_mask & ICE_DBG_PARSER)\n+\t\tice_xlt_kb_dump(hw, kb);\n+}\n+\n+static struct ice_xlt_kb *_xlt_kb_get(struct ice_hw *hw, u32 sect_type)\n+{\n+\tstruct ice_seg *seg = hw->seg;\n+\tstruct ice_pkg_enum state;\n+\tstruct ice_xlt_kb *kb;\n+\tvoid *data;\n+\n+\tif (!seg)\n+\t\treturn NULL;\n+\n+\tkb = (struct ice_xlt_kb *)ice_malloc(hw, sizeof(*kb));\n+\tif (!kb) {\n+\t\tice_debug(hw, ICE_DBG_PARSER, \"failed to allocate memory for xlt key builder type %d.\\n\",\n+\t\t\t  sect_type);\n+\t\treturn NULL;\n+\t}\n+\n+\tice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);\n+\tdata = ice_pkg_enum_section(seg, &state, sect_type);\n+\tif (!data) {\n+\t\tice_debug(hw, ICE_DBG_PARSER, \"failed to find section type %d.\\n\",\n+\t\t\t  sect_type);\n+\t\treturn NULL;\n+\t}\n+\n+\t_parse_kb_data(hw, kb, data);\n+\n+\treturn kb;\n+}\n+\n+/**\n+ * ice_xlt_kb_get_sw - create switch xlt key build\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw)\n+{\n+\treturn _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_SW);\n+}\n+\n+/**\n+ * ice_xlt_kb_get_acl - create acl xlt key build\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw)\n+{\n+\treturn _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_ACL);\n+}\n+\n+/**\n+ * ice_xlt_kb_get_fd - create fdir xlt key build\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw)\n+{\n+\treturn _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_FD);\n+}\n+\n+/**\n+ * ice_xlt_kb_get_fd - create rss xlt key build\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw)\n+{\n+\treturn _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_RSS);\n+}\ndiff --git a/drivers/net/ice/base/ice_xlt_kb.h b/drivers/net/ice/base/ice_xlt_kb.h\nnew file mode 100644\nindex 0000000000..a95d845f89\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_xlt_kb.h\n@@ -0,0 +1,33 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2021 Intel Corporation\n+ */\n+\n+#ifndef _ICE_XLT_KB_H_\n+#define _ICE_XLT_KB_H_\n+\n+#define ICE_XLT_KB_TBL_CNT 8\n+#define ICE_XLT_KB_FLAG0_14_CNT 15\n+\n+struct ice_xlt_kb_entry {\n+\tu8 xlt1_ad_sel;\n+\tu8 xlt2_ad_sel;\n+\tu16 flg0_14_sel[ICE_XLT_KB_FLAG0_14_CNT];\n+\tu8 xlt1_md_sel;\n+\tu8 xlt2_md_sel;\n+};\n+\n+struct ice_xlt_kb {\n+\tu8 xlt1_pm;\n+\tu8 xlt2_pm;\n+\tu8 prof_id_pm;\n+\tu64 flag15;\n+\n+\tstruct ice_xlt_kb_entry entries[ICE_XLT_KB_TBL_CNT];\n+};\n+\n+void ice_xlt_kb_dump(struct ice_hw *hw, struct ice_xlt_kb *kb);\n+struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw);\n+struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw);\n+struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw);\n+struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw);\n+#endif /* _ICE_XLT_KB_H */\ndiff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build\nindex 9ce508c272..35f2ac2312 100644\n--- a/drivers/net/ice/base/meson.build\n+++ b/drivers/net/ice/base/meson.build\n@@ -24,6 +24,7 @@ sources = [\n \t'ice_mk_grp.c',\n \t'ice_proto_grp.c',\n \t'ice_flg_rd.c',\n+\t'ice_xlt_kb.c',\n ]\n \n error_cflags = [\n",
    "prefixes": [
        "v3",
        "10/20"
    ]
}