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GET /api/patches/99356/?format=api
{ "id": 99356, "url": "http://patches.dpdk.org/api/patches/99356/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210921132009.3461020-5-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210921132009.3461020-5-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210921132009.3461020-5-qi.z.zhang@intel.com", "date": "2021-09-21T13:19:53", "name": "[v3,04/20] net/ice/base: init parse graph cam table for parser", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "44bdcbe95981528fcec8c8abccfbb4edf5a32687", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210921132009.3461020-5-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 19057, "url": "http://patches.dpdk.org/api/series/19057/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19057", "date": "2021-09-21T13:19:49", "name": "ice/base: add parser module", "version": 3, "mbox": "http://patches.dpdk.org/series/19057/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/99356/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/99356/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 68634A0C4C;\n\tTue, 21 Sep 2021 15:17:42 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B0C9F4114A;\n\tTue, 21 Sep 2021 15:17:16 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id 9134E41137\n for <dev@dpdk.org>; Tue, 21 Sep 2021 15:17:11 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Sep 2021 06:17:11 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga008.jf.intel.com with ESMTP; 21 Sep 2021 06:17:09 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10113\"; a=\"202847432\"", "E=Sophos;i=\"5.85,311,1624345200\"; d=\"scan'208\";a=\"202847432\"", "E=Sophos;i=\"5.85,311,1624345200\"; d=\"scan'208\";a=\"484173833\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "junfeng.guo@intel.com,\n\tdev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>", "Date": "Tue, 21 Sep 2021 21:19:53 +0800", "Message-Id": "<20210921132009.3461020-5-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20210921132009.3461020-1-qi.z.zhang@intel.com>", "References": "<20210921132009.3461020-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 04/20] net/ice/base: init parse graph cam\n table for parser", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Parse DDP section ICE_SID_RXPARSER_CAM or ICE_SID_RXPARSER_PG_SPILL\ninto an array of struct ice_pg_cam_item.\nParse DDP section ICE_SID_RXPARSER_NOMATCH_CAM or\nICE_SID_RXPARSER_NOMATCH_SPILL into an array of struct ice_pg_nm_cam_item.\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n drivers/net/ice/base/ice_parser.c | 44 +++++\n drivers/net/ice/base/ice_parser.h | 12 ++\n drivers/net/ice/base/ice_pg_cam.c | 298 ++++++++++++++++++++++++++++++\n drivers/net/ice/base/ice_pg_cam.h | 68 +++++++\n drivers/net/ice/base/meson.build | 1 +\n 5 files changed, 423 insertions(+)\n create mode 100644 drivers/net/ice/base/ice_pg_cam.c\n create mode 100644 drivers/net/ice/base/ice_pg_cam.h", "diff": "diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c\nindex 0dd6bf137d..f6a1c821f1 100644\n--- a/drivers/net/ice/base/ice_parser.c\n+++ b/drivers/net/ice/base/ice_parser.c\n@@ -8,6 +8,10 @@\n #define ICE_SEC_DATA_OFFSET\t\t\t\t4\n #define ICE_SID_RXPARSER_IMEM_ENTRY_SIZE\t\t48\n #define ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE\t24\n+#define ICE_SID_RXPARSER_CAM_ENTRY_SIZE\t\t\t16\n+#define ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE\t\t17\n+#define ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE\t\t12\n+#define ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE\t13\n \n /**\n * ice_parser_sect_item_get - parse a item from a section\n@@ -33,6 +37,18 @@ void *ice_parser_sect_item_get(u32 sect_type, void *section,\n \tcase ICE_SID_RXPARSER_METADATA_INIT:\n \t\tsize = ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE;\n \t\tbreak;\n+\tcase ICE_SID_RXPARSER_CAM:\n+\t\tsize = ICE_SID_RXPARSER_CAM_ENTRY_SIZE;\n+\t\tbreak;\n+\tcase ICE_SID_RXPARSER_PG_SPILL:\n+\t\tsize = ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE;\n+\t\tbreak;\n+\tcase ICE_SID_RXPARSER_NOMATCH_CAM:\n+\t\tsize = ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE;\n+\t\tbreak;\n+\tcase ICE_SID_RXPARSER_NOMATCH_SPILL:\n+\t\tsize = ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE;\n+\t\tbreak;\n \tdefault:\n \t\treturn NULL;\n \t}\n@@ -125,6 +141,30 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)\n \t\tgoto err;\n \t}\n \n+\tp->pg_cam_table = ice_pg_cam_table_get(hw);\n+\tif (!p->pg_cam_table) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n+\tp->pg_sp_cam_table = ice_pg_sp_cam_table_get(hw);\n+\tif (!p->pg_sp_cam_table) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n+\tp->pg_nm_cam_table = ice_pg_nm_cam_table_get(hw);\n+\tif (!p->pg_nm_cam_table) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n+\tp->pg_nm_sp_cam_table = ice_pg_nm_sp_cam_table_get(hw);\n+\tif (!p->pg_nm_sp_cam_table) {\n+\t\tstatus = ICE_ERR_PARAM;\n+\t\tgoto err;\n+\t}\n+\n \t*psr = p;\n \treturn ICE_SUCCESS;\n err:\n@@ -140,6 +180,10 @@ void ice_parser_destroy(struct ice_parser *psr)\n {\n \tice_free(psr->hw, psr->imem_table);\n \tice_free(psr->hw, psr->mi_table);\n+\tice_free(psr->hw, psr->pg_cam_table);\n+\tice_free(psr->hw, psr->pg_sp_cam_table);\n+\tice_free(psr->hw, psr->pg_nm_cam_table);\n+\tice_free(psr->hw, psr->pg_nm_sp_cam_table);\n \n \tice_free(psr->hw, psr);\n }\ndiff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h\nindex b7d0b23ded..b157e27510 100644\n--- a/drivers/net/ice/base/ice_parser.h\n+++ b/drivers/net/ice/base/ice_parser.h\n@@ -5,6 +5,10 @@\n #ifndef _ICE_PARSER_H_\n #define _ICE_PARSER_H_\n \n+#include \"ice_metainit.h\"\n+#include \"ice_imem.h\"\n+#include \"ice_pg_cam.h\"\n+\n struct ice_parser {\n \tstruct ice_hw *hw; /* pointer to the hardware structure */\n \n@@ -12,6 +16,14 @@ struct ice_parser {\n \tstruct ice_imem_item *imem_table;\n \t/* load data from section ICE_SID_RXPARSER_METADATA_INIT */\n \tstruct ice_metainit_item *mi_table;\n+\t/* load data from section ICE_SID_RXPARSER_CAM */\n+\tstruct ice_pg_cam_item *pg_cam_table;\n+\t/* load data from section ICE_SID_RXPARSER_PG_SPILL */\n+\tstruct ice_pg_cam_item *pg_sp_cam_table;\n+\t/* load data from section ICE_SID_RXPARSER_NOMATCH_CAM */\n+\tstruct ice_pg_nm_cam_item *pg_nm_cam_table;\n+\t/* load data from section ICE_SID_RXPARSER_NOMATCH_SPILL */\n+\tstruct ice_pg_nm_cam_item *pg_nm_sp_cam_table;\n };\n \n enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);\ndiff --git a/drivers/net/ice/base/ice_pg_cam.c b/drivers/net/ice/base/ice_pg_cam.c\nnew file mode 100644\nindex 0000000000..171986bf3d\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_pg_cam.c\n@@ -0,0 +1,298 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2021 Intel Corporation\n+ */\n+\n+#include \"ice_common.h\"\n+#include \"ice_parser_util.h\"\n+\n+static void _pg_cam_key_dump(struct ice_hw *hw, struct ice_pg_cam_key *key)\n+{\n+\tice_info(hw, \"key:\\n\");\n+\tice_info(hw, \"\\tvalid = %d\\n\", key->valid);\n+\tice_info(hw, \"\\tnode_id = %d\\n\", key->node_id);\n+\tice_info(hw, \"\\tflag0 = %d\\n\", key->flag0);\n+\tice_info(hw, \"\\tflag1 = %d\\n\", key->flag1);\n+\tice_info(hw, \"\\tflag2 = %d\\n\", key->flag2);\n+\tice_info(hw, \"\\tflag3 = %d\\n\", key->flag3);\n+\tice_info(hw, \"\\tboost_idx = %d\\n\", key->boost_idx);\n+\tice_info(hw, \"\\talu_reg = 0x%04x\\n\", key->alu_reg);\n+\tice_info(hw, \"\\tnext_proto = 0x%08x\\n\", key->next_proto);\n+}\n+\n+static void _pg_nm_cam_key_dump(struct ice_hw *hw,\n+\t\t\t\tstruct ice_pg_nm_cam_key *key)\n+{\n+\tice_info(hw, \"key:\\n\");\n+\tice_info(hw, \"\\tvalid = %d\\n\", key->valid);\n+\tice_info(hw, \"\\tnode_id = %d\\n\", key->node_id);\n+\tice_info(hw, \"\\tflag0 = %d\\n\", key->flag0);\n+\tice_info(hw, \"\\tflag1 = %d\\n\", key->flag1);\n+\tice_info(hw, \"\\tflag2 = %d\\n\", key->flag2);\n+\tice_info(hw, \"\\tflag3 = %d\\n\", key->flag3);\n+\tice_info(hw, \"\\tboost_idx = %d\\n\", key->boost_idx);\n+\tice_info(hw, \"\\talu_reg = 0x%04x\\n\", key->alu_reg);\n+}\n+\n+static void _pg_cam_action_dump(struct ice_hw *hw,\n+\t\t\t\tstruct ice_pg_cam_action *action)\n+{\n+\tice_info(hw, \"action:\\n\");\n+\tice_info(hw, \"\\tnext_node = %d\\n\", action->next_node);\n+\tice_info(hw, \"\\tnext_pc = %d\\n\", action->next_pc);\n+\tice_info(hw, \"\\tis_pg = %d\\n\", action->is_pg);\n+\tice_info(hw, \"\\tproto_id = %d\\n\", action->proto_id);\n+\tice_info(hw, \"\\tis_mg = %d\\n\", action->is_mg);\n+\tice_info(hw, \"\\tmarker_id = %d\\n\", action->marker_id);\n+\tice_info(hw, \"\\tis_last_round = %d\\n\", action->is_last_round);\n+\tice_info(hw, \"\\tho_polarity = %d\\n\", action->ho_polarity);\n+\tice_info(hw, \"\\tho_inc = %d\\n\", action->ho_inc);\n+}\n+\n+/**\n+ * ice_pg_cam_dump - dump an parse graph cam info\n+ * @ice_hw: pointer to the hardware structure\n+ * @item: parse graph cam to dump\n+ */\n+void ice_pg_cam_dump(struct ice_hw *hw, struct ice_pg_cam_item *item)\n+{\n+\tice_info(hw, \"index = %d\\n\", item->idx);\n+\t_pg_cam_key_dump(hw, &item->key);\n+\t_pg_cam_action_dump(hw, &item->action);\n+}\n+\n+/**\n+ * ice_pg_nm_cam_dump - dump an parse graph no match cam info\n+ * @ice_hw: pointer to the hardware structure\n+ * @item: parse graph no match cam to dump\n+ */\n+void ice_pg_nm_cam_dump(struct ice_hw *hw, struct ice_pg_nm_cam_item *item)\n+{\n+\tice_info(hw, \"index = %d\\n\", item->idx);\n+\t_pg_nm_cam_key_dump(hw, &item->key);\n+\t_pg_cam_action_dump(hw, &item->action);\n+}\n+\n+/** The function parses a 55 bits Parse Graph CAM Action with below format:\n+ * BIT 0-11:\tNext Node ID (action->next_node)\n+ * BIT 12-19:\tNext PC (action->next_pc)\n+ * BIT 20:\tIs Protocol Group (action->is_pg)\n+ * BIT 21-23:\treserved\n+ * BIT 24-31:\tProtocol ID (action->proto_id)\n+ * BIT 32:\tIs Marker Group (action->is_mg)\n+ * BIT 33-40:\tMarker ID (action->marker_id)\n+ * BIT 41:\tIs Last Round (action->is_last_round)\n+ * BIT 42:\tHeader Offset Polarity (action->ho_poloarity)\n+ * BIT 43-51:\tHeader Offset Inc (action->ho_inc)\n+ * BIT 52-54:\treserved\n+ */\n+static void _pg_cam_action_init(struct ice_pg_cam_action *action, u64 data)\n+{\n+\taction->next_node = (u16)(data & 0x7ff);\n+\taction->next_pc = (u8)((data >> 11) & 0xff);\n+\taction->is_pg = ((data >> 19) & 0x1) != 0;\n+\taction->proto_id = ((data >> 23) & 0xff);\n+\taction->is_mg = ((data >> 31) & 0x1) != 0;\n+\taction->marker_id = ((data >> 32) & 0xff);\n+\taction->is_last_round = ((data >> 40) & 0x1) != 0;\n+\taction->ho_polarity = ((data >> 41) & 0x1) != 0;\n+\taction->ho_inc = ((data >> 42) & 0x1ff);\n+}\n+\n+/** The function parses a 41 bits Parse Graph NoMatch CAM Key with below format:\n+ * BIT 0:\tValid (key->valid)\n+ * BIT 1-11:\tNode ID (key->node_id)\n+ * BIT 12:\tFlag 0 (key->flag0)\n+ * BIT 13:\tFlag 1 (key->flag1)\n+ * BIT 14:\tFlag 2 (key->flag2)\n+ * BIT 15:\tFlag 3 (key->flag3)\n+ * BIT 16:\tBoost Hit (key->boost_idx to 0 if it is 0)\n+ * BIT 17-24:\tBoost Index (key->boost_idx only if Boost Hit is not 0)\n+ * BIT 25-40:\tALU Reg (key->alu_reg)\n+ */\n+static void _pg_nm_cam_key_init(struct ice_pg_nm_cam_key *key, u64 data)\n+{\n+\tkey->valid = (data & 0x1) != 0;\n+\tkey->node_id = (u16)((data >> 1) & 0x7ff);\n+\tkey->flag0 = ((data >> 12) & 0x1) != 0;\n+\tkey->flag1 = ((data >> 13) & 0x1) != 0;\n+\tkey->flag2 = ((data >> 14) & 0x1) != 0;\n+\tkey->flag3 = ((data >> 15) & 0x1) != 0;\n+\tif ((data >> 16) & 0x1)\n+\t\tkey->boost_idx = (u8)((data >> 17) & 0xff);\n+\telse\n+\t\tkey->boost_idx = 0;\n+\tkey->alu_reg = (u16)((data >> 25) & 0xffff);\n+}\n+\n+/** The function parses a 73 bits Parse Graph CAM Key with below format:\n+ * BIT 0:\tValid (key->valid)\n+ * BIT 1-11:\tNode ID (key->node_id)\n+ * BIT 12:\tFlag 0 (key->flag0)\n+ * BIT 13:\tFlag 1 (key->flag1)\n+ * BIT 14:\tFlag 2 (key->flag2)\n+ * BIT 15:\tFlag 3 (key->flag3)\n+ * BIT 16:\tBoost Hit (key->boost_idx to 0 if it is 0)\n+ * BIT 17-24:\tBoost Index (key->boost_idx only if Boost Hit is not 0)\n+ * BIT 25-40:\tALU Reg (key->alu_reg)\n+ * BIT 41-72:\tNext Proto Key (key->next_proto)\n+ */\n+static void _pg_cam_key_init(struct ice_pg_cam_key *key, u8 *data)\n+{\n+\tu64 d64 = *(u64 *)data;\n+\n+\tkey->valid = (d64 & 0x1) != 0;\n+\tkey->node_id = (u16)((d64 >> 1) & 0x7ff);\n+\tkey->flag0 = ((d64 >> 12) & 0x1) != 0;\n+\tkey->flag1 = ((d64 >> 13) & 0x1) != 0;\n+\tkey->flag2 = ((d64 >> 14) & 0x1) != 0;\n+\tkey->flag3 = ((d64 >> 15) & 0x1) != 0;\n+\tif ((d64 >> 16) & 0x1)\n+\t\tkey->boost_idx = (u8)((d64 >> 17) & 0xff);\n+\telse\n+\t\tkey->boost_idx = 0;\n+\tkey->alu_reg = (u16)((d64 >> 25) & 0xffff);\n+\n+\tkey->next_proto = (*(u32 *)&data[5] >> 1);\n+\tkey->next_proto |= ((u32)(data[9] & 0x1) << 31);\n+}\n+\n+/** The function parses a 128 bits Parse Graph CAM Entry with below format:\n+ * BIT 0-72:\tKey (ci->key)\n+ * BIT 73-127:\tAction (ci->action)\n+ */\n+static void _pg_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,\n+\t\t\t void *data, int size)\n+{\n+\tstruct ice_pg_cam_item *ci = (struct ice_pg_cam_item *)item;\n+\tu8 *buf = (u8 *)data;\n+\tu64 d64;\n+\n+\tci->idx = idx;\n+\td64 = (*(u64 *)&buf[9] >> 1);\n+\t_pg_cam_key_init(&ci->key, buf);\n+\t_pg_cam_action_init(&ci->action, d64);\n+\n+\tif (hw->debug_mask & ICE_DBG_PARSER)\n+\t\tice_pg_cam_dump(hw, ci);\n+}\n+\n+/** The function parses a 136 bits Parse Graph Spill CAM Entry with below\n+ * format:\n+ * BIT 0-55:\tAction (ci->key)\n+ * BIT 56-135:\tKey (ci->action)\n+ */\n+static void _pg_sp_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,\n+\t\t\t\t void *data, int size)\n+{\n+\tstruct ice_pg_cam_item *ci = (struct ice_pg_cam_item *)item;\n+\tu8 *buf = (u8 *)data;\n+\tu64 d64;\n+\n+\tci->idx = idx;\n+\td64 = *(u64 *)buf;\n+\t_pg_cam_action_init(&ci->action, d64);\n+\t_pg_cam_key_init(&ci->key, &buf[7]);\n+\n+\tif (hw->debug_mask & ICE_DBG_PARSER)\n+\t\tice_pg_cam_dump(hw, ci);\n+}\n+\n+/** The function parses a 96 bits Parse Graph NoMatch CAM Entry with below\n+ * format:\n+ * BIT 0-40:\tKey (ci->key)\n+ * BIT 41-95:\tAction (ci->action)\n+ */\n+static void _pg_nm_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,\n+\t\t\t\t void *data, int size)\n+{\n+\tstruct ice_pg_nm_cam_item *ci = (struct ice_pg_nm_cam_item *)item;\n+\tu8 *buf = (u8 *)data;\n+\tu64 d64;\n+\n+\tci->idx = idx;\n+\td64 = *(u64 *)buf;\n+\t_pg_nm_cam_key_init(&ci->key, d64);\n+\td64 = (*(u64 *)&buf[5] >> 1);\n+\t_pg_cam_action_init(&ci->action, d64);\n+\n+\tif (hw->debug_mask & ICE_DBG_PARSER)\n+\t\tice_pg_nm_cam_dump(hw, ci);\n+}\n+\n+/** The function parses a 104 bits Parse Graph NoMatch Spill CAM Entry with\n+ * below format:\n+ * BIT 0-55:\tKey (ci->key)\n+ * BIT 56-103:\tAction (ci->action)\n+ */\n+static void _pg_nm_sp_cam_parse_item(struct ice_hw *hw, u16 idx, void *item,\n+\t\t\t\t void *data, int size)\n+{\n+\tstruct ice_pg_nm_cam_item *ci = (struct ice_pg_nm_cam_item *)item;\n+\tu8 *buf = (u8 *)data;\n+\tu64 d64;\n+\n+\tci->idx = idx;\n+\td64 = *(u64 *)buf;\n+\t_pg_cam_action_init(&ci->action, d64);\n+\td64 = *(u64 *)&buf[7];\n+\t_pg_nm_cam_key_init(&ci->key, d64);\n+\n+\tif (hw->debug_mask & ICE_DBG_PARSER)\n+\t\tice_pg_nm_cam_dump(hw, ci);\n+}\n+\n+/**\n+ * ice_pg_cam_table_get - create a parse graph cam table\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_pg_cam_item *ice_pg_cam_table_get(struct ice_hw *hw)\n+{\n+\treturn (struct ice_pg_cam_item *)\n+\t\tice_parser_create_table(hw, ICE_SID_RXPARSER_CAM,\n+\t\t\t\t\tsizeof(struct ice_pg_cam_item),\n+\t\t\t\t\tICE_PG_CAM_TABLE_SIZE,\n+\t\t\t\t\tice_parser_sect_item_get,\n+\t\t\t\t\t_pg_cam_parse_item);\n+}\n+\n+/**\n+ * ice_pg_sp_cam_table_get - create a parse graph spill cam table\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw)\n+{\n+\treturn (struct ice_pg_cam_item *)\n+\t\tice_parser_create_table(hw, ICE_SID_RXPARSER_PG_SPILL,\n+\t\t\t\t\tsizeof(struct ice_pg_cam_item),\n+\t\t\t\t\tICE_PG_SP_CAM_TABLE_SIZE,\n+\t\t\t\t\tice_parser_sect_item_get,\n+\t\t\t\t\t_pg_sp_cam_parse_item);\n+}\n+\n+/**\n+ * ice_pg_nm_cam_table_get - create a parse graph no match cam table\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw)\n+{\n+\treturn (struct ice_pg_nm_cam_item *)\n+\t\tice_parser_create_table(hw, ICE_SID_RXPARSER_NOMATCH_CAM,\n+\t\t\t\t\tsizeof(struct ice_pg_nm_cam_item),\n+\t\t\t\t\tICE_PG_NM_CAM_TABLE_SIZE,\n+\t\t\t\t\tice_parser_sect_item_get,\n+\t\t\t\t\t_pg_nm_cam_parse_item);\n+}\n+\n+/**\n+ * ice_pg_nm_sp_cam_table_get - create a parse graph no match spill cam table\n+ * @ice_hw: pointer to the hardware structure\n+ */\n+struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw)\n+{\n+\treturn (struct ice_pg_nm_cam_item *)\n+\t\tice_parser_create_table(hw, ICE_SID_RXPARSER_NOMATCH_SPILL,\n+\t\t\t\t\tsizeof(struct ice_pg_nm_cam_item),\n+\t\t\t\t\tICE_PG_NM_SP_CAM_TABLE_SIZE,\n+\t\t\t\t\tice_parser_sect_item_get,\n+\t\t\t\t\t_pg_nm_sp_cam_parse_item);\n+}\ndiff --git a/drivers/net/ice/base/ice_pg_cam.h b/drivers/net/ice/base/ice_pg_cam.h\nnew file mode 100644\nindex 0000000000..fcb2e11e54\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_pg_cam.h\n@@ -0,0 +1,68 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2021 Intel Corporation\n+ */\n+\n+#ifndef _ICE_PG_CAM_H_\n+#define _ICE_PG_CAM_H_\n+\n+#define ICE_PG_CAM_TABLE_SIZE\t\t2048\n+#define ICE_PG_SP_CAM_TABLE_SIZE\t128\n+#define ICE_PG_NM_CAM_TABLE_SIZE\t1024\n+#define ICE_PG_NM_SP_CAM_TABLE_SIZE\t64\n+\n+struct ice_pg_cam_key {\n+\tbool valid;\n+\tu16 node_id;\n+\tbool flag0;\n+\tbool flag1;\n+\tbool flag2;\n+\tbool flag3;\n+\tu8 boost_idx;\n+\tu16 alu_reg;\n+\tu32 next_proto;\n+};\n+\n+struct ice_pg_nm_cam_key {\n+\tbool valid;\n+\tu16 node_id;\n+\tbool flag0;\n+\tbool flag1;\n+\tbool flag2;\n+\tbool flag3;\n+\tu8 boost_idx;\n+\tu16 alu_reg;\n+};\n+\n+struct ice_pg_cam_action {\n+\tu16 next_node;\n+\tu8 next_pc;\n+\tbool is_pg;\n+\tu8 proto_id;\n+\tbool is_mg;\n+\tu8 marker_id;\n+\tbool is_last_round;\n+\tbool ho_polarity;\n+\tu16 ho_inc;\n+};\n+\n+struct ice_pg_cam_item {\n+\tu16 idx;\n+\tstruct ice_pg_cam_key key;\n+\tstruct ice_pg_cam_action action;\n+};\n+\n+struct ice_pg_nm_cam_item {\n+\tu16 idx;\n+\tstruct ice_pg_nm_cam_key key;\n+\tstruct ice_pg_cam_action action;\n+};\n+\n+void ice_pg_cam_dump(struct ice_hw *hw, struct ice_pg_cam_item *item);\n+void ice_pg_nm_cam_dump(struct ice_hw *hw, struct ice_pg_nm_cam_item *item);\n+\n+struct ice_pg_cam_item *ice_pg_cam_table_get(struct ice_hw *hw);\n+struct ice_pg_cam_item *ice_pg_sp_cam_table_get(struct ice_hw *hw);\n+\n+struct ice_pg_nm_cam_item *ice_pg_nm_cam_table_get(struct ice_hw *hw);\n+struct ice_pg_nm_cam_item *ice_pg_nm_sp_cam_table_get(struct ice_hw *hw);\n+#endif /* _ICE_PG_CAM_H_ */\ndiff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build\nindex 8b8efd815f..56dfb390e8 100644\n--- a/drivers/net/ice/base/meson.build\n+++ b/drivers/net/ice/base/meson.build\n@@ -18,6 +18,7 @@ sources = [\n \t'ice_parser.c',\n \t'ice_imem.c',\n \t'ice_metainit.c',\n+\t'ice_pg_cam.c',\n ]\n \n error_cflags = [\n", "prefixes": [ "v3", "04/20" ] }