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{
    "id": 98628,
    "url": "http://patches.dpdk.org/api/patches/98628/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210910123003.85448-20-cristian.dumitrescu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210910123003.85448-20-cristian.dumitrescu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210910123003.85448-20-cristian.dumitrescu@intel.com",
    "date": "2021-09-10T12:29:59",
    "name": "[20/24] pipeline: export pipeline instructions to file",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "2ca03f1e32fe6c711f714cda15670d9e44065650",
    "submitter": {
        "id": 19,
        "url": "http://patches.dpdk.org/api/people/19/?format=api",
        "name": "Cristian Dumitrescu",
        "email": "cristian.dumitrescu@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210910123003.85448-20-cristian.dumitrescu@intel.com/mbox/",
    "series": [
        {
            "id": 18838,
            "url": "http://patches.dpdk.org/api/series/18838/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18838",
            "date": "2021-09-10T12:29:44",
            "name": "[01/24] pipeline: move data structures to internal header file",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/18838/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/98628/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/98628/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 80AC8A0547;\n\tFri, 10 Sep 2021 14:33:08 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 614B9411CD;\n\tFri, 10 Sep 2021 14:30:53 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 4F2D041154\n for <dev@dpdk.org>; Fri, 10 Sep 2021 14:30:27 +0200 (CEST)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Sep 2021 05:30:22 -0700",
            "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by orsmga001.jf.intel.com with ESMTP; 10 Sep 2021 05:30:21 -0700"
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10102\"; a=\"243386322\"",
            "E=Sophos;i=\"5.85,282,1624345200\"; d=\"scan'208\";a=\"243386322\"",
            "E=Sophos;i=\"5.85,282,1624345200\"; d=\"scan'208\";a=\"514279825\""
        ],
        "X-ExtLoop1": "1",
        "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Fri, 10 Sep 2021 13:29:59 +0100",
        "Message-Id": "<20210910123003.85448-20-cristian.dumitrescu@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20210910123003.85448-1-cristian.dumitrescu@intel.com>",
        "References": "<20210910123003.85448-1-cristian.dumitrescu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 20/24] pipeline: export pipeline instructions to\n file",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Export the array of translated instructions to a C file. There is one\nsuch array per action and one for the pipeline.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n---\n lib/pipeline/rte_swx_pipeline.c | 1097 +++++++++++++++++++++++++++++++\n 1 file changed, 1097 insertions(+)",
    "diff": "diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c\nindex 4c0e3043ec..0153c70b5f 100644\n--- a/lib/pipeline/rte_swx_pipeline.c\n+++ b/lib/pipeline/rte_swx_pipeline.c\n@@ -9770,9 +9770,1097 @@ rte_swx_ctl_meter_stats_read(struct rte_swx_pipeline *p,\n /*\n  * Pipeline compilation.\n  */\n+static const char *\n+instr_type_to_name(struct instruction *instr)\n+{\n+\tswitch (instr->type) {\n+\t\tcase INSTR_RX: return \"INSTR_RX\";\n+\n+\t\tcase INSTR_TX: return \"INSTR_TX\";\n+\t\tcase INSTR_TX_I: return \"INSTR_TX_I\";\n+\n+\t\tcase INSTR_HDR_EXTRACT: return \"INSTR_HDR_EXTRACT\";\n+\t\tcase INSTR_HDR_EXTRACT2: return \"INSTR_HDR_EXTRACT2\";\n+\t\tcase INSTR_HDR_EXTRACT3: return \"INSTR_HDR_EXTRACT3\";\n+\t\tcase INSTR_HDR_EXTRACT4: return \"INSTR_HDR_EXTRACT4\";\n+\t\tcase INSTR_HDR_EXTRACT5: return \"INSTR_HDR_EXTRACT5\";\n+\t\tcase INSTR_HDR_EXTRACT6: return \"INSTR_HDR_EXTRACT6\";\n+\t\tcase INSTR_HDR_EXTRACT7: return \"INSTR_HDR_EXTRACT7\";\n+\t\tcase INSTR_HDR_EXTRACT8: return \"INSTR_HDR_EXTRACT8\";\n+\n+\t\tcase INSTR_HDR_EXTRACT_M: return \"INSTR_HDR_EXTRACT_M\";\n+\n+\t\tcase INSTR_HDR_LOOKAHEAD: return \"INSTR_HDR_LOOKAHEAD\";\n+\n+\t\tcase INSTR_HDR_EMIT: return \"INSTR_HDR_EMIT\";\n+\t\tcase INSTR_HDR_EMIT_TX: return \"INSTR_HDR_EMIT_TX\";\n+\t\tcase INSTR_HDR_EMIT2_TX: return \"INSTR_HDR_EMIT2_TX\";\n+\t\tcase INSTR_HDR_EMIT3_TX: return \"INSTR_HDR_EMIT3_TX\";\n+\t\tcase INSTR_HDR_EMIT4_TX: return \"INSTR_HDR_EMIT4_TX\";\n+\t\tcase INSTR_HDR_EMIT5_TX: return \"INSTR_HDR_EMIT5_TX\";\n+\t\tcase INSTR_HDR_EMIT6_TX: return \"INSTR_HDR_EMIT6_TX\";\n+\t\tcase INSTR_HDR_EMIT7_TX: return \"INSTR_HDR_EMIT7_TX\";\n+\t\tcase INSTR_HDR_EMIT8_TX: return \"INSTR_HDR_EMIT8_TX\";\n+\n+\t\tcase INSTR_HDR_VALIDATE: return \"INSTR_HDR_VALIDATE\";\n+\t\tcase INSTR_HDR_INVALIDATE: return \"INSTR_HDR_INVALIDATE\";\n+\n+\t\tcase INSTR_MOV: return \"INSTR_MOV\";\n+\t\tcase INSTR_MOV_MH: return \"INSTR_MOV_MH\";\n+\t\tcase INSTR_MOV_HM: return \"INSTR_MOV_HM\";\n+\t\tcase INSTR_MOV_HH: return \"INSTR_MOV_HH\";\n+\t\tcase INSTR_MOV_I: return \"INSTR_MOV_I\";\n+\n+\t\tcase INSTR_DMA_HT: return \"INSTR_DMA_HT\";\n+\t\tcase INSTR_DMA_HT2: return \"INSTR_DMA_HT2\";\n+\t\tcase INSTR_DMA_HT3: return \"INSTR_DMA_HT3\";\n+\t\tcase INSTR_DMA_HT4: return \"INSTR_DMA_HT4\";\n+\t\tcase INSTR_DMA_HT5: return \"INSTR_DMA_HT5\";\n+\t\tcase INSTR_DMA_HT6: return \"INSTR_DMA_HT6\";\n+\t\tcase INSTR_DMA_HT7: return \"INSTR_DMA_HT7\";\n+\t\tcase INSTR_DMA_HT8: return \"INSTR_DMA_HT8\";\n+\n+\t\tcase INSTR_ALU_ADD: return \"INSTR_ALU_ADD\";\n+\t\tcase INSTR_ALU_ADD_MH: return \"INSTR_ALU_ADD_MH\";\n+\t\tcase INSTR_ALU_ADD_HM: return \"INSTR_ALU_ADD_HM\";\n+\t\tcase INSTR_ALU_ADD_HH: return \"INSTR_ALU_ADD_HH\";\n+\t\tcase INSTR_ALU_ADD_MI: return \"INSTR_ALU_ADD_MI\";\n+\t\tcase INSTR_ALU_ADD_HI: return \"INSTR_ALU_ADD_HI\";\n+\n+\t\tcase INSTR_ALU_SUB: return \"INSTR_ALU_SUB\";\n+\t\tcase INSTR_ALU_SUB_MH: return \"INSTR_ALU_SUB_MH\";\n+\t\tcase INSTR_ALU_SUB_HM: return \"INSTR_ALU_SUB_HM\";\n+\t\tcase INSTR_ALU_SUB_HH: return \"INSTR_ALU_SUB_HH\";\n+\t\tcase INSTR_ALU_SUB_MI: return \"INSTR_ALU_SUB_MI\";\n+\t\tcase INSTR_ALU_SUB_HI: return \"INSTR_ALU_SUB_HI\";\n+\n+\t\tcase INSTR_ALU_CKADD_FIELD: return \"INSTR_ALU_CKADD_FIELD\";\n+\t\tcase INSTR_ALU_CKADD_STRUCT20: return \"INSTR_ALU_CKADD_STRUCT20\";\n+\t\tcase INSTR_ALU_CKADD_STRUCT: return \"INSTR_ALU_CKADD_STRUCT\";\n+\t\tcase INSTR_ALU_CKSUB_FIELD: return \"INSTR_ALU_CKSUB_FIELD\";\n+\n+\t\tcase INSTR_ALU_AND: return \"INSTR_ALU_AND\";\n+\t\tcase INSTR_ALU_AND_MH: return \"INSTR_ALU_AND_MH\";\n+\t\tcase INSTR_ALU_AND_HM: return \"INSTR_ALU_AND_HM\";\n+\t\tcase INSTR_ALU_AND_HH: return \"INSTR_ALU_AND_HH\";\n+\t\tcase INSTR_ALU_AND_I: return \"INSTR_ALU_AND_I\";\n+\n+\t\tcase INSTR_ALU_OR: return \"INSTR_ALU_OR\";\n+\t\tcase INSTR_ALU_OR_MH: return \"INSTR_ALU_OR_MH\";\n+\t\tcase INSTR_ALU_OR_HM: return \"INSTR_ALU_OR_HM\";\n+\t\tcase INSTR_ALU_OR_HH: return \"INSTR_ALU_OR_HH\";\n+\t\tcase INSTR_ALU_OR_I: return \"INSTR_ALU_OR_I\";\n+\n+\t\tcase INSTR_ALU_XOR: return \"INSTR_ALU_XOR\";\n+\t\tcase INSTR_ALU_XOR_MH: return \"INSTR_ALU_XOR_MH\";\n+\t\tcase INSTR_ALU_XOR_HM: return \"INSTR_ALU_XOR_HM\";\n+\t\tcase INSTR_ALU_XOR_HH: return \"INSTR_ALU_XOR_HH\";\n+\t\tcase INSTR_ALU_XOR_I: return \"INSTR_ALU_XOR_I\";\n+\n+\t\tcase INSTR_ALU_SHL: return \"INSTR_ALU_SHL\";\n+\t\tcase INSTR_ALU_SHL_MH: return \"INSTR_ALU_SHL_MH\";\n+\t\tcase INSTR_ALU_SHL_HM: return \"INSTR_ALU_SHL_HM\";\n+\t\tcase INSTR_ALU_SHL_HH: return \"INSTR_ALU_SHL_HH\";\n+\t\tcase INSTR_ALU_SHL_MI: return \"INSTR_ALU_SHL_MI\";\n+\t\tcase INSTR_ALU_SHL_HI: return \"INSTR_ALU_SHL_HI\";\n+\n+\t\tcase INSTR_ALU_SHR: return \"INSTR_ALU_SHR\";\n+\t\tcase INSTR_ALU_SHR_MH: return \"INSTR_ALU_SHR_MH\";\n+\t\tcase INSTR_ALU_SHR_HM: return \"INSTR_ALU_SHR_HM\";\n+\t\tcase INSTR_ALU_SHR_HH: return \"INSTR_ALU_SHR_HH\";\n+\t\tcase INSTR_ALU_SHR_MI: return \"INSTR_ALU_SHR_MI\";\n+\t\tcase INSTR_ALU_SHR_HI: return \"INSTR_ALU_SHR_HI\";\n+\n+\t\tcase INSTR_REGPREFETCH_RH: return \"INSTR_REGPREFETCH_RH\";\n+\t\tcase INSTR_REGPREFETCH_RM: return \"INSTR_REGPREFETCH_RM\";\n+\t\tcase INSTR_REGPREFETCH_RI: return \"INSTR_REGPREFETCH_RI\";\n+\n+\t\tcase INSTR_REGRD_HRH: return \"INSTR_REGRD_HRH\";\n+\t\tcase INSTR_REGRD_HRM: return \"INSTR_REGRD_HRM\";\n+\t\tcase INSTR_REGRD_HRI: return \"INSTR_REGRD_HRI\";\n+\t\tcase INSTR_REGRD_MRH: return \"INSTR_REGRD_MRH\";\n+\t\tcase INSTR_REGRD_MRM: return \"INSTR_REGRD_MRM\";\n+\t\tcase INSTR_REGRD_MRI: return \"INSTR_REGRD_MRI\";\n+\n+\t\tcase INSTR_REGWR_RHH: return \"INSTR_REGWR_RHH\";\n+\t\tcase INSTR_REGWR_RHM: return \"INSTR_REGWR_RHM\";\n+\t\tcase INSTR_REGWR_RHI: return \"INSTR_REGWR_RHI\";\n+\t\tcase INSTR_REGWR_RMH: return \"INSTR_REGWR_RMH\";\n+\t\tcase INSTR_REGWR_RMM: return \"INSTR_REGWR_RMM\";\n+\t\tcase INSTR_REGWR_RMI: return \"INSTR_REGWR_RMI\";\n+\t\tcase INSTR_REGWR_RIH: return \"INSTR_REGWR_RIH\";\n+\t\tcase INSTR_REGWR_RIM: return \"INSTR_REGWR_RIM\";\n+\t\tcase INSTR_REGWR_RII: return \"INSTR_REGWR_RII\";\n+\n+\t\tcase INSTR_REGADD_RHH: return \"INSTR_REGADD_RHH\";\n+\t\tcase INSTR_REGADD_RHM: return \"INSTR_REGADD_RHM\";\n+\t\tcase INSTR_REGADD_RHI: return \"INSTR_REGADD_RHI\";\n+\t\tcase INSTR_REGADD_RMH: return \"INSTR_REGADD_RMH\";\n+\t\tcase INSTR_REGADD_RMM: return \"INSTR_REGADD_RMM\";\n+\t\tcase INSTR_REGADD_RMI: return \"INSTR_REGADD_RMI\";\n+\t\tcase INSTR_REGADD_RIH: return \"INSTR_REGADD_RIH\";\n+\t\tcase INSTR_REGADD_RIM: return \"INSTR_REGADD_RIM\";\n+\t\tcase INSTR_REGADD_RII: return \"INSTR_REGADD_RII\";\n+\n+\t\tcase INSTR_METPREFETCH_H: return \"INSTR_METPREFETCH_H\";\n+\t\tcase INSTR_METPREFETCH_M: return \"INSTR_METPREFETCH_M\";\n+\t\tcase INSTR_METPREFETCH_I: return \"INSTR_METPREFETCH_I\";\n+\n+\t\tcase INSTR_METER_HHM: return \"INSTR_METER_HHM\";\n+\t\tcase INSTR_METER_HHI: return \"INSTR_METER_HHI\";\n+\t\tcase INSTR_METER_HMM: return \"INSTR_METER_HMM\";\n+\t\tcase INSTR_METER_HMI: return \"INSTR_METER_HMI\";\n+\t\tcase INSTR_METER_MHM: return \"INSTR_METER_MHM\";\n+\t\tcase INSTR_METER_MHI: return \"INSTR_METER_MHI\";\n+\t\tcase INSTR_METER_MMM: return \"INSTR_METER_MMM\";\n+\t\tcase INSTR_METER_MMI: return \"INSTR_METER_MMI\";\n+\t\tcase INSTR_METER_IHM: return \"INSTR_METER_IHM\";\n+\t\tcase INSTR_METER_IHI: return \"INSTR_METER_IHI\";\n+\t\tcase INSTR_METER_IMM: return \"INSTR_METER_IMM\";\n+\t\tcase INSTR_METER_IMI: return \"INSTR_METER_IMI\";\n+\n+\t\tcase INSTR_TABLE: return \"INSTR_TABLE\";\n+\t\tcase INSTR_TABLE_AF: return \"INSTR_TABLE_AF\";\n+\t\tcase INSTR_SELECTOR: return \"INSTR_SELECTOR\";\n+\t\tcase INSTR_LEARNER: return \"INSTR_LEARNER\";\n+\t\tcase INSTR_LEARNER_AF: return \"INSTR_LEARNER_AF\";\n+\n+\t\tcase INSTR_LEARNER_LEARN: return \"INSTR_LEARNER_LEARN\";\n+\t\tcase INSTR_LEARNER_FORGET: return \"INSTR_LEARNER_FORGET\";\n+\n+\t\tcase INSTR_EXTERN_OBJ: return \"INSTR_EXTERN_OBJ\";\n+\t\tcase INSTR_EXTERN_FUNC: return \"INSTR_EXTERN_FUNC\";\n+\n+\t\tcase INSTR_JMP: return \"INSTR_JMP\";\n+\t\tcase INSTR_JMP_VALID: return \"INSTR_JMP_VALID\";\n+\t\tcase INSTR_JMP_INVALID: return \"INSTR_JMP_INVALID\";\n+\t\tcase INSTR_JMP_HIT: return \"INSTR_JMP_HIT\";\n+\t\tcase INSTR_JMP_MISS: return \"INSTR_JMP_MISS\";\n+\t\tcase INSTR_JMP_ACTION_HIT: return \"INSTR_JMP_ACTION_HIT\";\n+\t\tcase INSTR_JMP_ACTION_MISS: return \"INSTR_JMP_ACTION_MISS\";\n+\t\tcase INSTR_JMP_EQ: return \"INSTR_JMP_EQ\";\n+\t\tcase INSTR_JMP_EQ_MH: return \"INSTR_JMP_EQ_MH\";\n+\t\tcase INSTR_JMP_EQ_HM: return \"INSTR_JMP_EQ_HM\";\n+\t\tcase INSTR_JMP_EQ_HH: return \"INSTR_JMP_EQ_HH\";\n+\t\tcase INSTR_JMP_EQ_I: return \"INSTR_JMP_EQ_I\";\n+\t\tcase INSTR_JMP_NEQ: return \"INSTR_JMP_NEQ\";\n+\t\tcase INSTR_JMP_NEQ_MH: return \"INSTR_JMP_NEQ_MH\";\n+\t\tcase INSTR_JMP_NEQ_HM: return \"INSTR_JMP_NEQ_HM\";\n+\t\tcase INSTR_JMP_NEQ_HH: return \"INSTR_JMP_NEQ_HH\";\n+\t\tcase INSTR_JMP_NEQ_I: return \"INSTR_JMP_NEQ_I\";\n+\t\tcase INSTR_JMP_LT: return \"INSTR_JMP_LT\";\n+\t\tcase INSTR_JMP_LT_MH: return \"INSTR_JMP_LT_MH\";\n+\t\tcase INSTR_JMP_LT_HM: return \"INSTR_JMP_LT_HM\";\n+\t\tcase INSTR_JMP_LT_HH: return \"INSTR_JMP_LT_HH\";\n+\t\tcase INSTR_JMP_LT_MI: return \"INSTR_JMP_LT_MI\";\n+\t\tcase INSTR_JMP_LT_HI: return \"INSTR_JMP_LT_HI\";\n+\t\tcase INSTR_JMP_GT: return \"INSTR_JMP_GT\";\n+\t\tcase INSTR_JMP_GT_MH: return \"INSTR_JMP_GT_MH\";\n+\t\tcase INSTR_JMP_GT_HM: return \"INSTR_JMP_GT_HM\";\n+\t\tcase INSTR_JMP_GT_HH: return \"INSTR_JMP_GT_HH\";\n+\t\tcase INSTR_JMP_GT_MI: return \"INSTR_JMP_GT_MI\";\n+\t\tcase INSTR_JMP_GT_HI: return \"INSTR_JMP_GT_HI\";\n+\n+\t\tcase INSTR_RETURN: return \"INSTR_RETURN\";\n+\n+\t\tdefault: return \"INSTR_UNKNOWN\";\n+\t}\n+}\n+\n+typedef void\n+(*instruction_export_t)(struct instruction *, FILE *);\n+\n+static void\n+instr_io_export(struct instruction *instr, FILE *f)\n+{\n+\tuint32_t n_io = 0, n_io_imm = 0, n_hdrs = 0, i;\n+\n+\t/* n_io, n_io_imm, n_hdrs. */\n+\tif (instr->type == INSTR_RX ||\n+\t    instr->type == INSTR_TX ||\n+\t    instr->type == INSTR_HDR_EXTRACT_M ||\n+\t    (instr->type >= INSTR_HDR_EMIT_TX && instr->type <= INSTR_HDR_EMIT8_TX))\n+\t\tn_io = 1;\n+\n+\tif (instr->type == INSTR_TX_I)\n+\t\tn_io_imm = 1;\n+\n+\tif (instr->type >= INSTR_HDR_EXTRACT && instr->type <= INSTR_HDR_EXTRACT8)\n+\t\tn_hdrs = 1 + (instr->type - INSTR_HDR_EXTRACT);\n+\n+\tif (instr->type == INSTR_HDR_EXTRACT_M ||\n+\t    instr->type == INSTR_HDR_LOOKAHEAD ||\n+\t    instr->type == INSTR_HDR_EMIT)\n+\t\tn_hdrs = 1;\n+\n+\tif (instr->type >= INSTR_HDR_EMIT_TX && instr->type <= INSTR_HDR_EMIT8_TX)\n+\t\tn_hdrs = 1 + (instr->type - INSTR_HDR_EMIT_TX);\n+\n+\t/* instr. */\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\",\n+\t\tinstr_type_to_name(instr));\n+\n+\t/* instr.io. */\n+\tfprintf(f,\n+\t\t\"\\t\\t.io = {\\n\");\n+\n+\t/* instr.io.io. */\n+\tif (n_io)\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.io = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\",\n+\t\t\tinstr->io.io.offset,\n+\t\t\tinstr->io.io.n_bits);\n+\n+\tif (n_io_imm)\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.io = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.val = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\",\n+\t\t\tinstr->io.io.val);\n+\n+\t/* instr.io.hdr. */\n+\tif (n_hdrs) {\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t.hdr = {\\n\");\n+\n+\t\t/* instr.io.hdr.header_id. */\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.header_id = {\");\n+\n+\t\tfor (i = 0; i < n_hdrs; i++)\n+\t\t\tfprintf(f,\n+\t\t\t\t\"%u, \",\n+\t\t\t\tinstr->io.hdr.header_id[i]);\n+\n+\t\tfprintf(f,\n+\t\t\t\"},\\n\");\n+\n+\t\t/* instr.io.hdr.struct_id. */\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.struct_id = {\");\n+\n+\t\tfor (i = 0; i < n_hdrs; i++)\n+\t\t\tfprintf(f,\n+\t\t\t\t\"%u, \",\n+\t\t\t\tinstr->io.hdr.struct_id[i]);\n+\n+\t\tfprintf(f,\n+\t\t\t\"},\\n\");\n+\n+\t\t/* instr.io.hdr.n_bytes. */\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.n_bytes = {\");\n+\n+\t\tfor (i = 0; i < n_hdrs; i++)\n+\t\t\tfprintf(f,\n+\t\t\t\t\"%u, \",\n+\t\t\t\tinstr->io.hdr.n_bytes[i]);\n+\n+\t\tfprintf(f,\n+\t\t\t\"},\\n\");\n+\n+\t\t/* instr.io.hdr - closing curly brace. */\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t}\\n,\");\n+\t}\n+\n+\t/* instr.io - closing curly brace. */\n+\tfprintf(f,\n+\t\t\"\\t\\t},\\n\");\n+\n+\t/* instr - closing curly brace. */\n+\tfprintf(f,\n+\t\t\"\\t},\\n\");\n+}\n+\n+static void\n+instr_hdr_validate_export(struct instruction *instr, FILE *f)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.valid = {\\n\"\n+\t\t\"\\t\\t\\t.header_id = %u,\\n\"\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\",\n+\t\tinstr_type_to_name(instr),\n+\t\tinstr->valid.header_id);\n+}\n+\n+static void\n+instr_mov_export(struct instruction *instr, FILE *f)\n+{\n+\tif (instr->type != INSTR_MOV_I)\n+\t\tfprintf(f,\n+\t\t\t\"\\t{\\n\"\n+\t\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\t\"\\t\\t.mov = {\\n\"\n+\t\t\t\"\\t\\t\\t.dst = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\"\n+\t\t\t\"\\t\\t\\t.src = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\"\n+\t\t\t\"\\t\\t},\\n\"\n+\t\t\t\"\\t},\\n\",\n+\t\t\tinstr_type_to_name(instr),\n+\t\t\tinstr->mov.dst.struct_id,\n+\t\t\tinstr->mov.dst.n_bits,\n+\t\t\tinstr->mov.dst.offset,\n+\t\t\tinstr->mov.src.struct_id,\n+\t\t\tinstr->mov.src.n_bits,\n+\t\t\tinstr->mov.src.offset);\n+\telse\n+\t\tfprintf(f,\n+\t\t\t\"\\t{\\n\"\n+\t\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\t\"\\t\\t.mov = {\\n\"\n+\t\t\t\"\\t\\t\\t.dst = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t}\\n,\"\n+\t\t\t\"\\t\\t\\t.src_val = %\" PRIu64 \",\\n\"\n+\t\t\t\"\\t\\t},\\n\"\n+\t\t\t\"\\t},\\n\",\n+\t\t\tinstr_type_to_name(instr),\n+\t\t\tinstr->mov.dst.struct_id,\n+\t\t\tinstr->mov.dst.n_bits,\n+\t\t\tinstr->mov.dst.offset,\n+\t\t\tinstr->mov.src_val);\n+}\n+\n+static void\n+instr_dma_ht_export(struct instruction *instr, FILE *f)\n+{\n+\tuint32_t n_dma = 0, i;\n+\n+\t/* n_dma. */\n+\tn_dma = 1 + (instr->type - INSTR_DMA_HT);\n+\n+\t/* instr. */\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\",\n+\t\tinstr_type_to_name(instr));\n+\n+\t/* instr.dma. */\n+\tfprintf(f,\n+\t\t\"\\t\\t.dma = {\\n\");\n+\n+\t/* instr.dma.dst. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t.dst = {\\n\");\n+\n+\t/* instr.dma.dst.header_id. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t\\t.header_id = {\");\n+\n+\tfor (i = 0; i < n_dma; i++)\n+\t\tfprintf(f,\n+\t\t\t\"%u, \",\n+\t\t\tinstr->dma.dst.header_id[i]);\n+\n+\tfprintf(f,\n+\t\t\"},\\n\");\n+\n+\t/* instr.dma.dst.struct_id. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t\\t.struct_id = {\");\n+\n+\tfor (i = 0; i < n_dma; i++)\n+\t\tfprintf(f,\n+\t\t\t\"%u, \",\n+\t\t\tinstr->dma.dst.struct_id[i]);\n+\n+\tfprintf(f,\n+\t\t\"},\\n\");\n+\n+\t/* instr.dma.dst - closing curly brace. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t},\\n\");\n+\n+\t/* instr.dma.src. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t.src = {\\n\");\n+\n+\t/* instr.dma.src.offset. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t\\t.offset = {\");\n+\n+\tfor (i = 0; i < n_dma; i++)\n+\t\tfprintf(f,\n+\t\t\t\"%u, \",\n+\t\t\tinstr->dma.src.offset[i]);\n+\n+\tfprintf(f,\n+\t\t\"},\\n\");\n+\n+\t/* instr.dma.src - closing curly brace. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t},\\n\");\n+\n+\t/* instr.dma.n_bytes. */\n+\tfprintf(f,\n+\t\t\"\\t\\t\\t.n_bytes = {\");\n+\n+\tfor (i = 0; i < n_dma; i++)\n+\t\tfprintf(f,\n+\t\t\t\"%u, \",\n+\t\t\tinstr->dma.n_bytes[i]);\n+\n+\tfprintf(f,\n+\t\t\"},\\n\");\n+\n+\t/* instr.dma - closing curly brace. */\n+\tfprintf(f,\n+\t\t\"\\t\\t},\\n\");\n+\n+\t/* instr - closing curly brace. */\n+\tfprintf(f,\n+\t\t\"\\t},\\n\");\n+}\n+\n+static void\n+instr_alu_export(struct instruction *instr, FILE *f)\n+{\n+\tint imm = 0;\n+\n+\tif (instr->type == INSTR_ALU_ADD_MI ||\n+\t    instr->type == INSTR_ALU_ADD_HI ||\n+\t    instr->type == INSTR_ALU_SUB_MI ||\n+\t    instr->type == INSTR_ALU_SUB_HI ||\n+\t    instr->type == INSTR_ALU_SHL_MI ||\n+\t    instr->type == INSTR_ALU_SHL_HI ||\n+\t    instr->type == INSTR_ALU_SHR_MI ||\n+\t    instr->type == INSTR_ALU_SHR_HI ||\n+\t    instr->type == INSTR_ALU_AND_I ||\n+\t    instr->type == INSTR_ALU_OR_I ||\n+\t    instr->type == INSTR_ALU_XOR_I)\n+\t    imm = 1;\n+\n+\tif (!imm)\n+\t\tfprintf(f,\n+\t\t\t\"\\t{\\n\"\n+\t\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\t\"\\t\\t.alu = {\\n\"\n+\t\t\t\"\\t\\t\\t.dst = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\"\n+\t\t\t\"\\t\\t\\t.src = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\"\n+\t\t\t\"\\t\\t},\\n\"\n+\t\t\t\"\\t},\\n\",\n+\t\t\tinstr_type_to_name(instr),\n+\t\t\tinstr->alu.dst.struct_id,\n+\t\t\tinstr->alu.dst.n_bits,\n+\t\t\tinstr->alu.dst.offset,\n+\t\t\tinstr->alu.src.struct_id,\n+\t\t\tinstr->alu.src.n_bits,\n+\t\t\tinstr->alu.src.offset);\n+\telse\n+\t\tfprintf(f,\n+\t\t\t\"\\t{\\n\"\n+\t\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\t\"\\t\\t.alu = {\\n\"\n+\t\t\t\"\\t\\t\\t.dst = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t}\\n,\"\n+\t\t\t\"\\t\\t\\t.src_val = %\" PRIu64 \",\\n\"\n+\t\t\t\"\\t\\t},\\n\"\n+\t\t\t\"\\t},\\n\",\n+\t\t\tinstr_type_to_name(instr),\n+\t\t\tinstr->alu.dst.struct_id,\n+\t\t\tinstr->alu.dst.n_bits,\n+\t\t\tinstr->alu.dst.offset,\n+\t\t\tinstr->alu.src_val);\n+}\n+\n+static void\n+instr_reg_export(struct instruction *instr __rte_unused, FILE *f __rte_unused)\n+{\n+\tint prefetch  = 0, idx_imm = 0, src_imm = 0;\n+\n+\tif (instr->type == INSTR_REGPREFETCH_RH ||\n+\t    instr->type == INSTR_REGPREFETCH_RM ||\n+\t    instr->type == INSTR_REGPREFETCH_RI)\n+\t\tprefetch = 1;\n+\n+\t/* index is the 3rd operand for the regrd instruction and the 2nd\n+\t * operand for the regwr and regadd instructions.\n+\t */\n+\tif (instr->type == INSTR_REGPREFETCH_RI ||\n+\t    instr->type == INSTR_REGRD_HRI ||\n+\t    instr->type == INSTR_REGRD_MRI ||\n+\t    instr->type == INSTR_REGWR_RIH ||\n+\t    instr->type == INSTR_REGWR_RIM ||\n+\t    instr->type == INSTR_REGWR_RII ||\n+\t    instr->type == INSTR_REGADD_RIH ||\n+\t    instr->type == INSTR_REGADD_RIM ||\n+\t    instr->type == INSTR_REGADD_RII)\n+\t\tidx_imm = 1;\n+\n+\t/* src is the 3rd operand for the regwr and regadd instructions. */\n+\tif (instr->type == INSTR_REGWR_RHI ||\n+\t    instr->type == INSTR_REGWR_RMI ||\n+\t    instr->type == INSTR_REGWR_RII ||\n+\t    instr->type == INSTR_REGADD_RHI ||\n+\t    instr->type == INSTR_REGADD_RMI ||\n+\t    instr->type == INSTR_REGADD_RII)\n+\t\tsrc_imm = 1;\n+\n+\t/* instr.regarray.regarray_id. */\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.regarray = {\\n\"\n+\t\t\"\\t\\t\\t.regarray_id = %u,\\n\",\n+\t\tinstr_type_to_name(instr),\n+\t\tinstr->regarray.regarray_id);\n+\n+\t/* instr.regarray.idx / instr.regarray.idx_val. */\n+\tif (!idx_imm)\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t\\t.idx = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t},\\n\",\n+\t\t\tinstr->regarray.idx.struct_id,\n+\t\t\tinstr->regarray.idx.n_bits,\n+\t\t\tinstr->regarray.idx.offset);\n+\telse\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t\\t.idx_val = %u,\\n\",\n+\t\t\tinstr->regarray.idx_val);\n+\n+\t/* instr.regarray.dstsrc / instr.regarray.dstsrc_val. */\n+\tif (!prefetch) {\n+\t\tif (!src_imm)\n+\t\t\tfprintf(f,\n+\t\t\t\t\"\\t\\t\\t\\t.dstsrc = {\\n\"\n+\t\t\t\t\"\\t\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\t\"\\t\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\t\"\\t\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\t\"\\t\\t\\t\\t},\\n\",\n+\t\t\t\tinstr->regarray.dstsrc.struct_id,\n+\t\t\t\tinstr->regarray.dstsrc.n_bits,\n+\t\t\t\tinstr->regarray.dstsrc.offset);\n+\t\telse\n+\t\t\tfprintf(f,\n+\t\t\t\t\"\\t\\t\\t\\t.dstsrc_val = %\" PRIu64 \",\\n\",\n+\t\t\t\tinstr->regarray.dstsrc_val);\n+\t}\n+\n+\t/* instr.regarray and instr - closing curly braces. */\n+\tfprintf(f,\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\");\n+\n+\treturn;\n+}\n+\n+static void\n+instr_meter_export(struct instruction *instr __rte_unused, FILE *f __rte_unused)\n+{\n+\tint prefetch  = 0, idx_imm = 0, color_in_imm = 0;\n+\n+\tif (instr->type == INSTR_METPREFETCH_H ||\n+\t    instr->type == INSTR_METPREFETCH_M ||\n+\t    instr->type == INSTR_METPREFETCH_I)\n+\t\tprefetch = 1;\n+\n+\t/* idx_imm. */\n+\tif (instr->type == INSTR_METPREFETCH_I ||\n+\t    instr->type == INSTR_METER_IHM ||\n+\t    instr->type == INSTR_METER_IHI ||\n+\t    instr->type == INSTR_METER_IMM ||\n+\t    instr->type == INSTR_METER_IMI)\n+\t\tidx_imm = 1;\n+\n+\t/* color_in_imm. */\n+\tif (instr->type == INSTR_METER_HHI ||\n+\t    instr->type == INSTR_METER_HMI ||\n+\t    instr->type == INSTR_METER_MHI ||\n+\t    instr->type == INSTR_METER_MMI ||\n+\t    instr->type == INSTR_METER_IHI ||\n+\t    instr->type == INSTR_METER_IMI)\n+\t\tcolor_in_imm = 1;\n+\n+\t/* instr.meter.metarray_id. */\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.meter = {\\n\"\n+\t\t\"\\t\\t\\t.metarray_id = %u,\\n\",\n+\t\tinstr_type_to_name(instr),\n+\t\tinstr->meter.metarray_id);\n+\n+\t/* instr.meter.idx / instr.meter.idx_val. */\n+\tif (!idx_imm)\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.idx = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\",\n+\t\t\tinstr->meter.idx.struct_id,\n+\t\t\tinstr->meter.idx.n_bits,\n+\t\t\tinstr->meter.idx.offset);\n+\telse\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.idx_val = %u,\\n\",\n+\t\t\tinstr->meter.idx_val);\n+\n+\tif (!prefetch) {\n+\t\t/* instr.meter.length. */\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.length = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\",\n+\t\t\tinstr->meter.length.struct_id,\n+\t\t\tinstr->meter.length.n_bits,\n+\t\t\tinstr->meter.length.offset);\n+\n+\t\t/* instr.meter.color_in / instr.meter.color_in_val. */\n+\t\tif (!color_in_imm)\n+\t\t\tfprintf(f,\n+\t\t\t\t\"\\t\\t\\t.color_in = {\\n\"\n+\t\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\t\"\\t\\t\\t},\\n\",\n+\t\t\t\tinstr->meter.color_in.struct_id,\n+\t\t\t\tinstr->meter.color_in.n_bits,\n+\t\t\t\tinstr->meter.color_in.offset);\n+\t\telse\n+\t\t\tfprintf(f,\n+\t\t\t\t\"\\t\\t\\t.color_in_val = %u,\\n\",\n+\t\t\t\t(uint32_t)instr->meter.color_in_val);\n+\n+\t\t/* instr.meter.color_out. */\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.color_out = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\",\n+\t\t\tinstr->meter.color_out.struct_id,\n+\t\t\tinstr->meter.color_out.n_bits,\n+\t\t\tinstr->meter.color_out.offset);\n+\t}\n+\n+\t/* instr.meter and instr - closing curly braces. */\n+\tfprintf(f,\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\");\n+\n+\treturn;\n+}\n+\n+static void\n+instr_table_export(struct instruction *instr,\n+\t\tFILE *f)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.table = {\\n\"\n+\t\t\"\\t\\t\\t.table_id = %u,\\n\"\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\",\n+\t\tinstr_type_to_name(instr),\n+\t\tinstr->table.table_id);\n+}\n+\n+static void\n+instr_learn_export(struct instruction *instr, FILE *f)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.learn = {\\n\"\n+\t\t\"\\t\\t\\t\\t.action_id = %u,\\n\"\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\",\n+\t\tinstr_type_to_name(instr),\n+\t\tinstr->learn.action_id);\n+}\n+\n+static void\n+instr_forget_export(struct instruction *instr, FILE *f)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t},\\n\",\n+\t\tinstr_type_to_name(instr));\n+}\n+\n+static void\n+instr_extern_export(struct instruction *instr, FILE *f)\n+{\n+\tif (instr->type == INSTR_EXTERN_OBJ)\n+\t\tfprintf(f,\n+\t\t\t\"\\t{\\n\"\n+\t\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\t\"\\t\\t.ext_obj = {\\n\"\n+\t\t\t\"\\t\\t\\t.ext_obj_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t.func_id = %u,\\n\"\n+\t\t\t\"\\t\\t},\\n\"\n+\t\t\t\"\\t},\\n\",\n+\t\t\tinstr_type_to_name(instr),\n+\t\t\tinstr->ext_obj.ext_obj_id,\n+\t\t\tinstr->ext_obj.func_id);\n+\telse\n+\t\tfprintf(f,\n+\t\t\t\"\\t{\\n\"\n+\t\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\t\"\\t\\t.ext_func = {\\n\"\n+\t\t\t\"\\t\\t\\t.ext_func_id = %u,\\n\"\n+\t\t\t\"\\t\\t},\\n\"\n+\t\t\t\"\\t},\\n\",\n+\t\t\tinstr_type_to_name(instr),\n+\t\t\tinstr->ext_func.ext_func_id);\n+}\n+\n+static void\n+instr_jmp_export(struct instruction *instr, FILE *f __rte_unused)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.jmp = {\\n\"\n+\t\t\"\\t\\t\\t.ip = NULL,\\n\",\n+\t\tinstr_type_to_name(instr));\n+\n+\tswitch (instr->type) {\n+\tcase INSTR_JMP_VALID:\n+\tcase INSTR_JMP_INVALID:\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.header_id = %u,\\n\",\n+\t\t\tinstr->jmp.header_id);\n+\t\tbreak;\n+\n+\tcase INSTR_JMP_ACTION_HIT:\n+\tcase INSTR_JMP_ACTION_MISS:\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.action_id = %u,\\n\",\n+\t\t\tinstr->jmp.action_id);\n+\t\tbreak;\n+\n+\tcase INSTR_JMP_EQ:\n+\tcase INSTR_JMP_EQ_MH:\n+\tcase INSTR_JMP_EQ_HM:\n+\tcase INSTR_JMP_EQ_HH:\n+\tcase INSTR_JMP_NEQ:\n+\tcase INSTR_JMP_NEQ_MH:\n+\tcase INSTR_JMP_NEQ_HM:\n+\tcase INSTR_JMP_NEQ_HH:\n+\tcase INSTR_JMP_LT:\n+\tcase INSTR_JMP_LT_MH:\n+\tcase INSTR_JMP_LT_HM:\n+\tcase INSTR_JMP_LT_HH:\n+\tcase INSTR_JMP_GT:\n+\tcase INSTR_JMP_GT_MH:\n+\tcase INSTR_JMP_GT_HM:\n+\tcase INSTR_JMP_GT_HH:\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.a = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\"\n+\t\t\t\"\\t\\t\\t.b = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t},\\n\",\n+\t\t\tinstr->jmp.a.struct_id,\n+\t\t\tinstr->jmp.a.n_bits,\n+\t\t\tinstr->jmp.a.offset,\n+\t\t\tinstr->jmp.b.struct_id,\n+\t\t\tinstr->jmp.b.n_bits,\n+\t\t\tinstr->jmp.b.offset);\n+\t\tbreak;\n+\n+\tcase INSTR_JMP_EQ_I:\n+\tcase INSTR_JMP_NEQ_I:\n+\tcase INSTR_JMP_LT_MI:\n+\tcase INSTR_JMP_LT_HI:\n+\tcase INSTR_JMP_GT_MI:\n+\tcase INSTR_JMP_GT_HI:\n+\t\tfprintf(f,\n+\t\t\t\"\\t\\t\\t.a = {\\n\"\n+\t\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\t\"\\t\\t\\t}\\n,\"\n+\t\t\t\"\\t\\t\\t.b_val = %\" PRIu64 \",\\n\",\n+\t\t\tinstr->jmp.a.struct_id,\n+\t\t\tinstr->jmp.a.n_bits,\n+\t\t\tinstr->jmp.a.offset,\n+\t\t\tinstr->jmp.b_val);\n+\t\tbreak;\n+\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\tfprintf(f,\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\");\n+}\n+\n+static void\n+instr_return_export(struct instruction *instr,\n+\t\tFILE *f)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\",\n+\t\tinstr_type_to_name(instr));\n+\n+\tfprintf(f,\n+\t\t\"\\t},\\n\");\n+}\n+\n+static instruction_export_t export_table[] = {\n+\t[INSTR_RX] = instr_io_export,\n+\n+\t[INSTR_TX] = instr_io_export,\n+\t[INSTR_TX_I] = instr_io_export,\n+\n+\t[INSTR_HDR_EXTRACT] = instr_io_export,\n+\t[INSTR_HDR_EXTRACT2] = instr_io_export,\n+\t[INSTR_HDR_EXTRACT3] = instr_io_export,\n+\t[INSTR_HDR_EXTRACT4] = instr_io_export,\n+\t[INSTR_HDR_EXTRACT5] = instr_io_export,\n+\t[INSTR_HDR_EXTRACT6] = instr_io_export,\n+\t[INSTR_HDR_EXTRACT7] = instr_io_export,\n+\t[INSTR_HDR_EXTRACT8] = instr_io_export,\n+\n+\t[INSTR_HDR_EXTRACT_M] = instr_io_export,\n+\n+\t[INSTR_HDR_LOOKAHEAD] = instr_io_export,\n+\n+\t[INSTR_HDR_EMIT] = instr_io_export,\n+\t[INSTR_HDR_EMIT_TX] = instr_io_export,\n+\t[INSTR_HDR_EMIT2_TX] = instr_io_export,\n+\t[INSTR_HDR_EMIT3_TX] = instr_io_export,\n+\t[INSTR_HDR_EMIT4_TX] = instr_io_export,\n+\t[INSTR_HDR_EMIT5_TX] = instr_io_export,\n+\t[INSTR_HDR_EMIT6_TX] = instr_io_export,\n+\t[INSTR_HDR_EMIT7_TX] = instr_io_export,\n+\t[INSTR_HDR_EMIT8_TX] = instr_io_export,\n+\n+\t[INSTR_HDR_VALIDATE] = instr_hdr_validate_export,\n+\t[INSTR_HDR_INVALIDATE] = instr_hdr_validate_export,\n+\n+\t[INSTR_MOV] = instr_mov_export,\n+\t[INSTR_MOV_MH] = instr_mov_export,\n+\t[INSTR_MOV_HM] = instr_mov_export,\n+\t[INSTR_MOV_HH] = instr_mov_export,\n+\t[INSTR_MOV_I] = instr_mov_export,\n+\n+\t[INSTR_DMA_HT]  = instr_dma_ht_export,\n+\t[INSTR_DMA_HT2] = instr_dma_ht_export,\n+\t[INSTR_DMA_HT3] = instr_dma_ht_export,\n+\t[INSTR_DMA_HT4] = instr_dma_ht_export,\n+\t[INSTR_DMA_HT5] = instr_dma_ht_export,\n+\t[INSTR_DMA_HT6] = instr_dma_ht_export,\n+\t[INSTR_DMA_HT7] = instr_dma_ht_export,\n+\t[INSTR_DMA_HT8] = instr_dma_ht_export,\n+\n+\t[INSTR_ALU_ADD] = instr_alu_export,\n+\t[INSTR_ALU_ADD_MH] = instr_alu_export,\n+\t[INSTR_ALU_ADD_HM] = instr_alu_export,\n+\t[INSTR_ALU_ADD_HH] = instr_alu_export,\n+\t[INSTR_ALU_ADD_MI] = instr_alu_export,\n+\t[INSTR_ALU_ADD_HI] = instr_alu_export,\n+\n+\t[INSTR_ALU_SUB] = instr_alu_export,\n+\t[INSTR_ALU_SUB_MH] = instr_alu_export,\n+\t[INSTR_ALU_SUB_HM] = instr_alu_export,\n+\t[INSTR_ALU_SUB_HH] = instr_alu_export,\n+\t[INSTR_ALU_SUB_MI] = instr_alu_export,\n+\t[INSTR_ALU_SUB_HI] = instr_alu_export,\n+\n+\t[INSTR_ALU_CKADD_FIELD] = instr_alu_export,\n+\t[INSTR_ALU_CKADD_STRUCT] = instr_alu_export,\n+\t[INSTR_ALU_CKADD_STRUCT20] = instr_alu_export,\n+\t[INSTR_ALU_CKSUB_FIELD] = instr_alu_export,\n+\n+\t[INSTR_ALU_AND] = instr_alu_export,\n+\t[INSTR_ALU_AND_MH] = instr_alu_export,\n+\t[INSTR_ALU_AND_HM] = instr_alu_export,\n+\t[INSTR_ALU_AND_HH] = instr_alu_export,\n+\t[INSTR_ALU_AND_I] = instr_alu_export,\n+\n+\t[INSTR_ALU_OR] = instr_alu_export,\n+\t[INSTR_ALU_OR_MH] = instr_alu_export,\n+\t[INSTR_ALU_OR_HM] = instr_alu_export,\n+\t[INSTR_ALU_OR_HH] = instr_alu_export,\n+\t[INSTR_ALU_OR_I] = instr_alu_export,\n+\n+\t[INSTR_ALU_XOR] = instr_alu_export,\n+\t[INSTR_ALU_XOR_MH] = instr_alu_export,\n+\t[INSTR_ALU_XOR_HM] = instr_alu_export,\n+\t[INSTR_ALU_XOR_HH] = instr_alu_export,\n+\t[INSTR_ALU_XOR_I] = instr_alu_export,\n+\n+\t[INSTR_ALU_SHL] = instr_alu_export,\n+\t[INSTR_ALU_SHL_MH] = instr_alu_export,\n+\t[INSTR_ALU_SHL_HM] = instr_alu_export,\n+\t[INSTR_ALU_SHL_HH] = instr_alu_export,\n+\t[INSTR_ALU_SHL_MI] = instr_alu_export,\n+\t[INSTR_ALU_SHL_HI] = instr_alu_export,\n+\n+\t[INSTR_ALU_SHR] = instr_alu_export,\n+\t[INSTR_ALU_SHR_MH] = instr_alu_export,\n+\t[INSTR_ALU_SHR_HM] = instr_alu_export,\n+\t[INSTR_ALU_SHR_HH] = instr_alu_export,\n+\t[INSTR_ALU_SHR_MI] = instr_alu_export,\n+\t[INSTR_ALU_SHR_HI] = instr_alu_export,\n+\n+\t[INSTR_REGPREFETCH_RH] = instr_reg_export,\n+\t[INSTR_REGPREFETCH_RM] = instr_reg_export,\n+\t[INSTR_REGPREFETCH_RI] = instr_reg_export,\n+\n+\t[INSTR_REGRD_HRH] = instr_reg_export,\n+\t[INSTR_REGRD_HRM] = instr_reg_export,\n+\t[INSTR_REGRD_MRH] = instr_reg_export,\n+\t[INSTR_REGRD_MRM] = instr_reg_export,\n+\t[INSTR_REGRD_HRI] = instr_reg_export,\n+\t[INSTR_REGRD_MRI] = instr_reg_export,\n+\n+\t[INSTR_REGWR_RHH] = instr_reg_export,\n+\t[INSTR_REGWR_RHM] = instr_reg_export,\n+\t[INSTR_REGWR_RMH] = instr_reg_export,\n+\t[INSTR_REGWR_RMM] = instr_reg_export,\n+\t[INSTR_REGWR_RHI] = instr_reg_export,\n+\t[INSTR_REGWR_RMI] = instr_reg_export,\n+\t[INSTR_REGWR_RIH] = instr_reg_export,\n+\t[INSTR_REGWR_RIM] = instr_reg_export,\n+\t[INSTR_REGWR_RII] = instr_reg_export,\n+\n+\t[INSTR_REGADD_RHH] = instr_reg_export,\n+\t[INSTR_REGADD_RHM] = instr_reg_export,\n+\t[INSTR_REGADD_RMH] = instr_reg_export,\n+\t[INSTR_REGADD_RMM] = instr_reg_export,\n+\t[INSTR_REGADD_RHI] = instr_reg_export,\n+\t[INSTR_REGADD_RMI] = instr_reg_export,\n+\t[INSTR_REGADD_RIH] = instr_reg_export,\n+\t[INSTR_REGADD_RIM] = instr_reg_export,\n+\t[INSTR_REGADD_RII] = instr_reg_export,\n+\n+\t[INSTR_METPREFETCH_H] = instr_meter_export,\n+\t[INSTR_METPREFETCH_M] = instr_meter_export,\n+\t[INSTR_METPREFETCH_I] = instr_meter_export,\n+\n+\t[INSTR_METER_HHM] = instr_meter_export,\n+\t[INSTR_METER_HHI] = instr_meter_export,\n+\t[INSTR_METER_HMM] = instr_meter_export,\n+\t[INSTR_METER_HMI] = instr_meter_export,\n+\t[INSTR_METER_MHM] = instr_meter_export,\n+\t[INSTR_METER_MHI] = instr_meter_export,\n+\t[INSTR_METER_MMM] = instr_meter_export,\n+\t[INSTR_METER_MMI] = instr_meter_export,\n+\t[INSTR_METER_IHM] = instr_meter_export,\n+\t[INSTR_METER_IHI] = instr_meter_export,\n+\t[INSTR_METER_IMM] = instr_meter_export,\n+\t[INSTR_METER_IMI] = instr_meter_export,\n+\n+\t[INSTR_TABLE] = instr_table_export,\n+\t[INSTR_TABLE_AF] = instr_table_export,\n+\t[INSTR_SELECTOR] = instr_table_export,\n+\t[INSTR_LEARNER] = instr_table_export,\n+\t[INSTR_LEARNER_AF] = instr_table_export,\n+\n+\t[INSTR_LEARNER_LEARN] = instr_learn_export,\n+\t[INSTR_LEARNER_FORGET] = instr_forget_export,\n+\n+\t[INSTR_EXTERN_OBJ] = instr_extern_export,\n+\t[INSTR_EXTERN_FUNC] = instr_extern_export,\n+\n+\t[INSTR_JMP] = instr_jmp_export,\n+\t[INSTR_JMP_VALID] = instr_jmp_export,\n+\t[INSTR_JMP_INVALID] = instr_jmp_export,\n+\t[INSTR_JMP_HIT] = instr_jmp_export,\n+\t[INSTR_JMP_MISS] = instr_jmp_export,\n+\t[INSTR_JMP_ACTION_HIT] = instr_jmp_export,\n+\t[INSTR_JMP_ACTION_MISS] = instr_jmp_export,\n+\n+\t[INSTR_JMP_EQ] = instr_jmp_export,\n+\t[INSTR_JMP_EQ_MH] = instr_jmp_export,\n+\t[INSTR_JMP_EQ_HM] = instr_jmp_export,\n+\t[INSTR_JMP_EQ_HH] = instr_jmp_export,\n+\t[INSTR_JMP_EQ_I] = instr_jmp_export,\n+\n+\t[INSTR_JMP_NEQ] = instr_jmp_export,\n+\t[INSTR_JMP_NEQ_MH] = instr_jmp_export,\n+\t[INSTR_JMP_NEQ_HM] = instr_jmp_export,\n+\t[INSTR_JMP_NEQ_HH] = instr_jmp_export,\n+\t[INSTR_JMP_NEQ_I] = instr_jmp_export,\n+\n+\t[INSTR_JMP_LT] = instr_jmp_export,\n+\t[INSTR_JMP_LT_MH] = instr_jmp_export,\n+\t[INSTR_JMP_LT_HM] = instr_jmp_export,\n+\t[INSTR_JMP_LT_HH] = instr_jmp_export,\n+\t[INSTR_JMP_LT_MI] = instr_jmp_export,\n+\t[INSTR_JMP_LT_HI] = instr_jmp_export,\n+\n+\t[INSTR_JMP_GT] = instr_jmp_export,\n+\t[INSTR_JMP_GT_MH] = instr_jmp_export,\n+\t[INSTR_JMP_GT_HM] = instr_jmp_export,\n+\t[INSTR_JMP_GT_HH] = instr_jmp_export,\n+\t[INSTR_JMP_GT_MI] = instr_jmp_export,\n+\t[INSTR_JMP_GT_HI] = instr_jmp_export,\n+\n+\t[INSTR_RETURN] = instr_return_export,\n+};\n+\n+static void\n+action_data_codegen(struct action *a, FILE *f)\n+{\n+\tuint32_t i;\n+\n+\tfprintf(f,\n+\t\t\"static const struct instruction action_%s_instructions[] = {\\n\",\n+\t\ta->name);\n+\n+\tfor (i = 0; i < a->n_instructions; i++) {\n+\t\tstruct instruction *instr = &a->instructions[i];\n+\t\tinstruction_export_t func = export_table[instr->type];\n+\n+\t\tfunc(instr, f);\n+\t}\n+\n+\tfprintf(f, \"};\\n\");\n+}\n+\n static int\n pipeline_codegen(struct rte_swx_pipeline *p)\n {\n+\tstruct action *a;\n \tFILE *f = NULL;\n \n \tif (!p)\n@@ -9786,6 +10874,15 @@ pipeline_codegen(struct rte_swx_pipeline *p)\n \t/* Include the .h file. */\n \tfprintf(f, \"#include \\\"rte_swx_pipeline_internal.h\\\"\\n\");\n \n+\t/* Add the code for each action. */\n+\tTAILQ_FOREACH(a, &p->actions, node) {\n+\t\tfprintf(f, \"/**\\n * Action %s\\n */\\n\\n\", a->name);\n+\n+\t\taction_data_codegen(a, f);\n+\n+\t\tfprintf(f, \"\\n\");\n+\t}\n+\n \t/* Close the .c file. */\n \tfclose(f);\n \n",
    "prefixes": [
        "20/24"
    ]
}