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GET /api/patches/98604/?format=api
{ "id": 98604, "url": "http://patches.dpdk.org/api/patches/98604/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210910123003.85448-11-cristian.dumitrescu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210910123003.85448-11-cristian.dumitrescu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210910123003.85448-11-cristian.dumitrescu@intel.com", "date": "2021-09-10T12:29:50", "name": "[11/24] pipeline: create inline functions for DMA instruction", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5e833b9d35b7e088ae5e5422a01f854c0f03ad41", "submitter": { "id": 19, "url": "http://patches.dpdk.org/api/people/19/?format=api", "name": "Cristian Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210910123003.85448-11-cristian.dumitrescu@intel.com/mbox/", "series": [ { "id": 18838, "url": "http://patches.dpdk.org/api/series/18838/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18838", "date": "2021-09-10T12:29:44", "name": "[01/24] pipeline: move data structures to internal header file", "version": 1, "mbox": "http://patches.dpdk.org/series/18838/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/98604/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/98604/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BF6E7A0547;\n\tFri, 10 Sep 2021 14:30:33 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 89145410EB;\n\tFri, 10 Sep 2021 14:30:23 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id C8110406B4\n for <dev@dpdk.org>; Fri, 10 Sep 2021 14:30:19 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Sep 2021 05:30:14 -0700", "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by orsmga001.jf.intel.com with ESMTP; 10 Sep 2021 05:30:13 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10102\"; a=\"243386283\"", "E=Sophos;i=\"5.85,282,1624345200\"; d=\"scan'208\";a=\"243386283\"", "E=Sophos;i=\"5.85,282,1624345200\"; d=\"scan'208\";a=\"514279750\"" ], "X-ExtLoop1": "1", "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>", "To": "dev@dpdk.org", "Date": "Fri, 10 Sep 2021 13:29:50 +0100", "Message-Id": "<20210910123003.85448-11-cristian.dumitrescu@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210910123003.85448-1-cristian.dumitrescu@intel.com>", "References": "<20210910123003.85448-1-cristian.dumitrescu@intel.com>", "Subject": "[dpdk-dev] [PATCH 11/24] pipeline: create inline functions for DMA\n instruction", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n---\n lib/pipeline/rte_swx_pipeline.c | 80 ++++++------------\n lib/pipeline/rte_swx_pipeline_internal.h | 100 +++++++++++++++++++++++\n 2 files changed, 123 insertions(+), 57 deletions(-)", "diff": "diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c\nindex 72606f1a06..a06dc8d348 100644\n--- a/lib/pipeline/rte_swx_pipeline.c\n+++ b/lib/pipeline/rte_swx_pipeline.c\n@@ -2465,46 +2465,12 @@ instr_mov_i_exec(struct rte_swx_pipeline *p)\n * dma.\n */\n static inline void\n-__instr_dma_ht_exec(struct rte_swx_pipeline *p, uint32_t n_dma);\n-\n-static inline void\n-__instr_dma_ht_exec(struct rte_swx_pipeline *p, uint32_t n_dma)\n+instr_dma_ht_exec(struct rte_swx_pipeline *p)\n {\n \tstruct thread *t = &p->threads[p->thread_id];\n \tstruct instruction *ip = t->ip;\n-\tuint8_t *action_data = t->structs[0];\n-\tuint64_t valid_headers = t->valid_headers;\n-\tuint32_t i;\n-\n-\tfor (i = 0; i < n_dma; i++) {\n-\t\tuint32_t header_id = ip->dma.dst.header_id[i];\n-\t\tuint32_t struct_id = ip->dma.dst.struct_id[i];\n-\t\tuint32_t offset = ip->dma.src.offset[i];\n-\t\tuint32_t n_bytes = ip->dma.n_bytes[i];\n-\n-\t\tstruct header_runtime *h = &t->headers[header_id];\n-\t\tuint8_t *h_ptr0 = h->ptr0;\n-\t\tuint8_t *h_ptr = t->structs[struct_id];\n-\n-\t\tvoid *dst = MASK64_BIT_GET(valid_headers, header_id) ?\n-\t\t\th_ptr : h_ptr0;\n-\t\tvoid *src = &action_data[offset];\n-\n-\t\tTRACE(\"[Thread %2u] dma h.s t.f\\n\", p->thread_id);\n \n-\t\t/* Headers. */\n-\t\tmemcpy(dst, src, n_bytes);\n-\t\tt->structs[struct_id] = dst;\n-\t\tvalid_headers = MASK64_BIT_SET(valid_headers, header_id);\n-\t}\n-\n-\tt->valid_headers = valid_headers;\n-}\n-\n-static inline void\n-instr_dma_ht_exec(struct rte_swx_pipeline *p)\n-{\n-\t__instr_dma_ht_exec(p, 1);\n+\t__instr_dma_ht_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\n@@ -2513,10 +2479,10 @@ instr_dma_ht_exec(struct rte_swx_pipeline *p)\n static inline void\n instr_dma_ht2_exec(struct rte_swx_pipeline *p)\n {\n-\tTRACE(\"[Thread %2u] *** The next 2 instructions are fused. ***\\n\",\n-\t p->thread_id);\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n \n-\t__instr_dma_ht_exec(p, 2);\n+\t__instr_dma_ht2_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\n@@ -2525,10 +2491,10 @@ instr_dma_ht2_exec(struct rte_swx_pipeline *p)\n static inline void\n instr_dma_ht3_exec(struct rte_swx_pipeline *p)\n {\n-\tTRACE(\"[Thread %2u] *** The next 3 instructions are fused. ***\\n\",\n-\t p->thread_id);\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n \n-\t__instr_dma_ht_exec(p, 3);\n+\t__instr_dma_ht3_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\n@@ -2537,10 +2503,10 @@ instr_dma_ht3_exec(struct rte_swx_pipeline *p)\n static inline void\n instr_dma_ht4_exec(struct rte_swx_pipeline *p)\n {\n-\tTRACE(\"[Thread %2u] *** The next 4 instructions are fused. ***\\n\",\n-\t p->thread_id);\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n \n-\t__instr_dma_ht_exec(p, 4);\n+\t__instr_dma_ht4_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\n@@ -2549,10 +2515,10 @@ instr_dma_ht4_exec(struct rte_swx_pipeline *p)\n static inline void\n instr_dma_ht5_exec(struct rte_swx_pipeline *p)\n {\n-\tTRACE(\"[Thread %2u] *** The next 5 instructions are fused. ***\\n\",\n-\t p->thread_id);\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n \n-\t__instr_dma_ht_exec(p, 5);\n+\t__instr_dma_ht5_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\n@@ -2561,10 +2527,10 @@ instr_dma_ht5_exec(struct rte_swx_pipeline *p)\n static inline void\n instr_dma_ht6_exec(struct rte_swx_pipeline *p)\n {\n-\tTRACE(\"[Thread %2u] *** The next 6 instructions are fused. ***\\n\",\n-\t p->thread_id);\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n \n-\t__instr_dma_ht_exec(p, 6);\n+\t__instr_dma_ht6_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\n@@ -2573,10 +2539,10 @@ instr_dma_ht6_exec(struct rte_swx_pipeline *p)\n static inline void\n instr_dma_ht7_exec(struct rte_swx_pipeline *p)\n {\n-\tTRACE(\"[Thread %2u] *** The next 7 instructions are fused. ***\\n\",\n-\t p->thread_id);\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n \n-\t__instr_dma_ht_exec(p, 7);\n+\t__instr_dma_ht7_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\n@@ -2585,10 +2551,10 @@ instr_dma_ht7_exec(struct rte_swx_pipeline *p)\n static inline void\n instr_dma_ht8_exec(struct rte_swx_pipeline *p)\n {\n-\tTRACE(\"[Thread %2u] *** The next 8 instructions are fused. ***\\n\",\n-\t p->thread_id);\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n \n-\t__instr_dma_ht_exec(p, 8);\n+\t__instr_dma_ht8_exec(p, t, ip);\n \n \t/* Thread. */\n \tthread_ip_inc(p);\ndiff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h\nindex 1bf94159a9..ec8e342a5d 100644\n--- a/lib/pipeline/rte_swx_pipeline_internal.h\n+++ b/lib/pipeline/rte_swx_pipeline_internal.h\n@@ -2111,4 +2111,104 @@ __instr_mov_i_exec(struct rte_swx_pipeline *p __rte_unused,\n \tMOV_I(t, ip);\n }\n \n+/*\n+ * dma.\n+ */\n+static inline void\n+__instr_dma_ht_many_exec(struct rte_swx_pipeline *p __rte_unused,\n+\t\t\t struct thread *t,\n+\t\t\t const struct instruction *ip,\n+\t\t\t uint32_t n_dma)\n+{\n+\tuint8_t *action_data = t->structs[0];\n+\tuint64_t valid_headers = t->valid_headers;\n+\tuint32_t i;\n+\n+\tfor (i = 0; i < n_dma; i++) {\n+\t\tuint32_t header_id = ip->dma.dst.header_id[i];\n+\t\tuint32_t struct_id = ip->dma.dst.struct_id[i];\n+\t\tuint32_t offset = ip->dma.src.offset[i];\n+\t\tuint32_t n_bytes = ip->dma.n_bytes[i];\n+\n+\t\tstruct header_runtime *h = &t->headers[header_id];\n+\t\tuint8_t *h_ptr0 = h->ptr0;\n+\t\tuint8_t *h_ptr = t->structs[struct_id];\n+\n+\t\tvoid *dst = MASK64_BIT_GET(valid_headers, header_id) ?\n+\t\t\th_ptr : h_ptr0;\n+\t\tvoid *src = &action_data[offset];\n+\n+\t\tTRACE(\"[Thread %2u] dma h.s t.f\\n\", p->thread_id);\n+\n+\t\t/* Headers. */\n+\t\tmemcpy(dst, src, n_bytes);\n+\t\tt->structs[struct_id] = dst;\n+\t\tvalid_headers = MASK64_BIT_SET(valid_headers, header_id);\n+\t}\n+\n+\tt->valid_headers = valid_headers;\n+}\n+\n+static inline void\n+__instr_dma_ht_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\t__instr_dma_ht_many_exec(p, t, ip, 1);\n+}\n+\n+static inline void\n+__instr_dma_ht2_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\tTRACE(\"[Thread %2u] *** The next 2 instructions are fused. ***\\n\", p->thread_id);\n+\n+\t__instr_dma_ht_many_exec(p, t, ip, 2);\n+}\n+\n+static inline void\n+__instr_dma_ht3_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\tTRACE(\"[Thread %2u] *** The next 3 instructions are fused. ***\\n\", p->thread_id);\n+\n+\t__instr_dma_ht_many_exec(p, t, ip, 3);\n+}\n+\n+static inline void\n+__instr_dma_ht4_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\tTRACE(\"[Thread %2u] *** The next 4 instructions are fused. ***\\n\", p->thread_id);\n+\n+\t__instr_dma_ht_many_exec(p, t, ip, 4);\n+}\n+\n+static inline void\n+__instr_dma_ht5_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\tTRACE(\"[Thread %2u] *** The next 5 instructions are fused. ***\\n\", p->thread_id);\n+\n+\t__instr_dma_ht_many_exec(p, t, ip, 5);\n+}\n+\n+static inline void\n+__instr_dma_ht6_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\tTRACE(\"[Thread %2u] *** The next 6 instructions are fused. ***\\n\", p->thread_id);\n+\n+\t__instr_dma_ht_many_exec(p, t, ip, 6);\n+}\n+\n+static inline void\n+__instr_dma_ht7_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\tTRACE(\"[Thread %2u] *** The next 7 instructions are fused. ***\\n\", p->thread_id);\n+\n+\t__instr_dma_ht_many_exec(p, t, ip, 7);\n+}\n+\n+static inline void\n+__instr_dma_ht8_exec(struct rte_swx_pipeline *p, struct thread *t, const struct instruction *ip)\n+{\n+\tTRACE(\"[Thread %2u] *** The next 8 instructions are fused. ***\\n\", p->thread_id);\n+\n+\t__instr_dma_ht_many_exec(p, t, ip, 8);\n+}\n+\n #endif\n", "prefixes": [ "11/24" ] }