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GET /api/patches/97743/?format=api
{ "id": 97743, "url": "http://patches.dpdk.org/api/patches/97743/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210902021505.17607-18-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210902021505.17607-18-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210902021505.17607-18-ndabilpuram@marvell.com", "date": "2021-09-02T02:14:55", "name": "[17/27] net/cnxk: add cn9k Rx support for security offload", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "273c7023a1b2ac5f693397cf261face2786db8f7", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210902021505.17607-18-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 18612, "url": "http://patches.dpdk.org/api/series/18612/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18612", "date": "2021-09-02T02:14:38", "name": "net/cnxk: support for inline ipsec", "version": 1, "mbox": "http://patches.dpdk.org/series/18612/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/97743/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/97743/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AC906A0C4C;\n\tThu, 2 Sep 2021 04:18:40 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 898DE4115C;\n\tThu, 2 Sep 2021 04:17:39 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 119A340E64\n for <dev@dpdk.org>; Thu, 2 Sep 2021 04:17:37 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 181HQ219011572\n for <dev@dpdk.org>; Wed, 1 Sep 2021 19:17:37 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 3atdwq9htx-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 01 Sep 2021 19:17:37 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Wed, 1 Sep 2021 19:17:34 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Wed, 1 Sep 2021 19:17:34 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 39D0E3F7040;\n Wed, 1 Sep 2021 19:17:32 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=O5xLnMsfttDeYf0KhonOCiqEsUOvjZjI5radC/DcdOc=;\n b=YIH98ST8cVU9vzwczqOHEDZ0vLZUeyiWNTCyiwmBbafUjsmIa7P33nhFSkFvp4OmwHPW\n +AyyiblmfN497YXyfNw5S9f7utWCHLPepugWKHyPAOPAJ5v5DZxERCzWF9GHG6s3lL5H\n XgTCyxbvYNpHVCcDeUPXaGcvAPJocmqta8Eov0SzTrkculfRakZELwzXWb2fYfysFWwv\n iTxQRVrYY4n0QJPXxnJzS0FXg9e4xgxxmnQS1alONx51Up5y3PzValCDkKNQW+lUkGiT\n G1IRtOnkY+WiezDSwPsuUAfQqYAJGiyWUuS8imw1dywTCmRa3x4HweXwqBDocluUQ2BV RA==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Pavan Nikhilesh <pbhagavatula@marvell.com>, Shijith Thotton\n <sthotton@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, <schalla@marvell.com>, <dev@dpdk.org>", "Date": "Thu, 2 Sep 2021 07:44:55 +0530", "Message-ID": "<20210902021505.17607-18-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210902021505.17607-1-ndabilpuram@marvell.com>", "References": "<20210902021505.17607-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "xFHvLSwuE1CQJ7LSxcAi_E9MJ8hO37CM", "X-Proofpoint-GUID": "xFHvLSwuE1CQJ7LSxcAi_E9MJ8hO37CM", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-01_05,2021-09-01_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH 17/27] net/cnxk: add cn9k Rx support for security\n offload", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add support to receive CPT processed packets on Rx.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/event/cnxk/cn9k_eventdev.c | 153 ++++----\n drivers/event/cnxk/cn9k_worker.h | 7 +-\n drivers/event/cnxk/cn9k_worker_deq.c | 2 +-\n drivers/event/cnxk/cn9k_worker_deq_burst.c | 2 +-\n drivers/event/cnxk/cn9k_worker_deq_ca.c | 2 +-\n drivers/event/cnxk/cn9k_worker_deq_tmo.c | 2 +-\n drivers/event/cnxk/cn9k_worker_dual_deq.c | 2 +-\n drivers/event/cnxk/cn9k_worker_dual_deq_burst.c | 2 +-\n drivers/event/cnxk/cn9k_worker_dual_deq_ca.c | 2 +-\n drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c | 2 +-\n drivers/net/cnxk/cn9k_rx.c | 31 +-\n drivers/net/cnxk/cn9k_rx.h | 440 +++++++++++++++++++-----\n drivers/net/cnxk/cn9k_rx_mseg.c | 2 +-\n drivers/net/cnxk/cn9k_rx_vec.c | 2 +-\n drivers/net/cnxk/cn9k_rx_vec_mseg.c | 2 +-\n drivers/net/cnxk/cnxk_ethdev.h | 3 +\n 16 files changed, 461 insertions(+), 195 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex 6601c44..e91234e 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -10,7 +10,8 @@\n #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id)\n \n #define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \\\n-\tdeq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \\\n+\tdeq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)] \\\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \\\n \t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \\\n \t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \\\n \t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \\\n@@ -329,178 +330,184 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n {\n \tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n \t/* Single WS modes */\n-\tconst event_dequeue_t sso_hws_deq[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_##name,\n+\tconst event_dequeue_t sso_hws_deq[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_burst_##name,\n+\tconst event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_##name,\n+\tconst event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t sso_hws_deq_tmo_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_burst_##name,\n+\tconst event_dequeue_burst_t\n+\t\tsso_hws_deq_tmo_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_##name,\n+\tconst event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t sso_hws_deq_ca_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_burst_##name,\n+\tconst event_dequeue_burst_t\n+\t\tsso_hws_deq_ca_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_##name,\n+\tconst event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t sso_hws_deq_seg_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_burst_##name,\n+\tconst event_dequeue_burst_t\n+\t\tsso_hws_deq_seg_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_seg_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_##name,\n+\tconst event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_deq_tmo_seg_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_burst_##name,\n+\t\tsso_hws_deq_tmo_seg_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_tmo_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_##name,\n+\tconst event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_deq_ca_seg_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_burst_##name,\n+\t\tsso_hws_deq_ca_seg_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_deq_ca_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \t/* Dual WS modes */\n-\tconst event_dequeue_t sso_hws_dual_deq[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_##name,\n+\tconst event_dequeue_t sso_hws_dual_deq[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t sso_hws_dual_deq_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_burst_##name,\n+\tconst event_dequeue_burst_t\n+\t\tsso_hws_dual_deq_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_dual_deq_tmo[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_##name,\n+\tconst event_dequeue_t sso_hws_dual_deq_tmo[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_dual_deq_tmo_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_burst_##name,\n+\t\tsso_hws_dual_deq_tmo_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_dual_deq_ca[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_##name,\n+\tconst event_dequeue_t sso_hws_dual_deq_ca[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_dual_deq_ca_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_burst_##name,\n+\t\tsso_hws_dual_deq_ca_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_dual_deq_seg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_##name,\n+\tconst event_dequeue_t sso_hws_dual_deq_seg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_dual_deq_seg_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_burst_##name,\n+\t\tsso_hws_dual_deq_seg_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t\t};\n \n-\tconst event_dequeue_t sso_hws_dual_deq_tmo_seg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_seg_##name,\n+\tconst event_dequeue_t sso_hws_dual_deq_tmo_seg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_dual_deq_tmo_seg_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_tmo_seg_burst_##name,\n+\t\tsso_hws_dual_deq_tmo_seg_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = \\\n+\t\t\tcn9k_sso_hws_dual_deq_tmo_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t\t};\n \n-\tconst event_dequeue_t sso_hws_dual_deq_ca_seg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_seg_##name,\n+\tconst event_dequeue_t sso_hws_dual_deq_ca_seg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_dual_deq_ca_seg_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_deq_ca_seg_burst_##name,\n+\t\tsso_hws_dual_deq_ca_seg_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = \\\n+\t\t\tcn9k_sso_hws_dual_deq_ca_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\ndiff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h\nindex 3e8f214..f1d2e47 100644\n--- a/drivers/event/cnxk/cn9k_worker.h\n+++ b/drivers/event/cnxk/cn9k_worker.h\n@@ -5,6 +5,9 @@\n #ifndef __CN9K_WORKER_H__\n #define __CN9K_WORKER_H__\n \n+#include <rte_eventdev.h>\n+#include <rte_vect.h>\n+\n #include \"cnxk_ethdev.h\"\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n@@ -380,7 +383,7 @@ uint16_t __rte_hot cn9k_sso_hws_ca_enq(void *port, struct rte_event ev[],\n uint16_t __rte_hot cn9k_sso_hws_dual_ca_enq(void *port, struct rte_event ev[],\n \t\t\t\t\t uint16_t nb_events);\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_deq_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks); \\\n \tuint16_t __rte_hot cn9k_sso_hws_deq_burst_##name( \\\n@@ -415,7 +418,7 @@ uint16_t __rte_hot cn9k_sso_hws_dual_ca_enq(void *port, struct rte_event ev[],\n NIX_RX_FASTPATH_MODES\n #undef R\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_deq_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks); \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_deq_burst_##name( \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_deq.c b/drivers/event/cnxk/cn9k_worker_deq.c\nindex 51ccaf4..d65c72a 100644\n--- a/drivers/event/cnxk/cn9k_worker_deq.c\n+++ b/drivers/event/cnxk/cn9k_worker_deq.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_deq_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n \t{ \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_deq_burst.c b/drivers/event/cnxk/cn9k_worker_deq_burst.c\nindex 4e28014..42dc59b 100644\n--- a/drivers/event/cnxk/cn9k_worker_deq_burst.c\n+++ b/drivers/event/cnxk/cn9k_worker_deq_burst.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_deq_burst_##name( \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n \t\tuint64_t timeout_ticks) \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_deq_ca.c b/drivers/event/cnxk/cn9k_worker_deq_ca.c\nindex dde8288..6c5325f 100644\n--- a/drivers/event/cnxk/cn9k_worker_deq_ca.c\n+++ b/drivers/event/cnxk/cn9k_worker_deq_ca.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_deq_ca_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n \t{ \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_deq_tmo.c b/drivers/event/cnxk/cn9k_worker_deq_tmo.c\nindex 9713d1e..b41a590 100644\n--- a/drivers/event/cnxk/cn9k_worker_deq_tmo.c\n+++ b/drivers/event/cnxk/cn9k_worker_deq_tmo.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_deq_tmo_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n \t{ \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_dual_deq.c b/drivers/event/cnxk/cn9k_worker_dual_deq.c\nindex 709fa2d..440b66e 100644\n--- a/drivers/event/cnxk/cn9k_worker_dual_deq.c\n+++ b/drivers/event/cnxk/cn9k_worker_dual_deq.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_deq_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n \t{ \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_dual_deq_burst.c b/drivers/event/cnxk/cn9k_worker_dual_deq_burst.c\nindex d50e1cf..4d913f9 100644\n--- a/drivers/event/cnxk/cn9k_worker_dual_deq_burst.c\n+++ b/drivers/event/cnxk/cn9k_worker_dual_deq_burst.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_deq_burst_##name( \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n \t\tuint64_t timeout_ticks) \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_dual_deq_ca.c b/drivers/event/cnxk/cn9k_worker_dual_deq_ca.c\nindex 26cc60f..74116a9 100644\n--- a/drivers/event/cnxk/cn9k_worker_dual_deq_ca.c\n+++ b/drivers/event/cnxk/cn9k_worker_dual_deq_ca.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_deq_ca_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n \t{ \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c b/drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c\nindex a0508fd..78a4b3d 100644\n--- a/drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c\n+++ b/drivers/event/cnxk/cn9k_worker_dual_deq_tmo.c\n@@ -6,7 +6,7 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_deq_tmo_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n \t{ \\\ndiff --git a/drivers/net/cnxk/cn9k_rx.c b/drivers/net/cnxk/cn9k_rx.c\nindex 7d9f1bd..5c4387e 100644\n--- a/drivers/net/cnxk/cn9k_rx.c\n+++ b/drivers/net/cnxk/cn9k_rx.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_rx.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name(\t \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\n@@ -17,12 +17,13 @@ NIX_RX_FASTPATH_MODES\n \n static inline void\n pick_rx_func(struct rte_eth_dev *eth_dev,\n-\t const eth_rx_burst_t rx_burst[2][2][2][2][2][2])\n+\t const eth_rx_burst_t rx_burst[2][2][2][2][2][2][2])\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n \t/* [TSP] [MARK] [VLAN] [CKSUM] [PTYPE] [RSS] */\n \teth_dev->rx_pkt_burst = rx_burst\n+\t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_SECURITY_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_TSTAMP_F)]\n \t\t[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n@@ -38,33 +39,33 @@ cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_mseg_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_mseg_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_vec_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_vec_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst eth_rx_burst_t nix_eth_rx_vec_burst_mseg[2][2][2][2][2][2] = {\n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_vec_mseg_##name,\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst_mseg[2][2][2][2][2][2][2] = {\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_recv_pkts_vec_mseg_##name,\n \n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n@@ -73,7 +74,7 @@ cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n \t/* Copy multi seg version with no offload for tear down sequence */\n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n \t\tdev->rx_pkt_burst_no_offload =\n-\t\t\tnix_eth_rx_burst_mseg[0][0][0][0][0][0];\n+\t\t\tnix_eth_rx_burst_mseg[0][0][0][0][0][0][0];\n \n \tif (dev->scalar_ena) {\n \t\tif (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\ndiff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h\nindex 59545af..bdedeab 100644\n--- a/drivers/net/cnxk/cn9k_rx.h\n+++ b/drivers/net/cnxk/cn9k_rx.h\n@@ -166,24 +166,104 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,\n \tmbuf->next = NULL;\n }\n \n+static __rte_always_inline uint64_t\n+nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n+\t\t uintptr_t sa_base, uint64_t *rearm_val, uint16_t *len)\n+{\n+\tuintptr_t res_sg0 = ((uintptr_t)cq + ROC_ONF_IPSEC_INB_RES_OFF - 8);\n+\tconst union nix_rx_parse_u *rx =\n+\t\t(const union nix_rx_parse_u *)((const uint64_t *)cq + 1);\n+\tstruct cn9k_inb_priv_data *sa_priv;\n+\tstruct roc_onf_ipsec_inb_sa *sa;\n+\tuint8_t lcptr = rx->lcptr;\n+\tstruct rte_ipv4_hdr *ipv4;\n+\tuint16_t data_off, res;\n+\tuint32_t spi_mask;\n+\tuint32_t spi;\n+\tuintptr_t data;\n+\t__uint128_t dw;\n+\tuint8_t sa_w;\n+\n+\tres = *(uint64_t *)(res_sg0 + 8);\n+\tdata_off = *rearm_val & (BIT_ULL(16) - 1);\n+\tdata = (uintptr_t)m->buf_addr;\n+\tdata += data_off;\n+\n+\trte_prefetch0((void *)data);\n+\n+\tif (unlikely(res != (CPT_COMP_GOOD | ROC_IE_ONF_UCC_SUCCESS << 8)))\n+\t\treturn PKT_RX_SEC_OFFLOAD | PKT_RX_SEC_OFFLOAD_FAILED;\n+\n+\tdata += lcptr;\n+\t/* 20 bits of tag would have the SPI */\n+\tspi = cq->tag & CNXK_ETHDEV_SPI_TAG_MASK;\n+\n+\t/* Get SA */\n+\tsa_w = sa_base & (ROC_NIX_INL_SA_BASE_ALIGN - 1);\n+\tsa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);\n+\tspi_mask = (1ULL << sa_w) - 1;\n+\tsa = roc_nix_inl_onf_ipsec_inb_sa(sa_base, spi & spi_mask);\n+\n+\t/* Update dynamic field with userdata */\n+\tsa_priv = roc_nix_inl_onf_ipsec_inb_sa_sw_rsvd(sa);\n+\tdw = *(__uint128_t *)sa_priv;\n+\t*rte_security_dynfield(m) = (uint64_t)dw;\n+\n+\t/* Get total length from IPv4 header. We can assume only IPv4 */\n+\tipv4 = (struct rte_ipv4_hdr *)(data + ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +\n+\t\t\t\t ROC_ONF_IPSEC_INB_MAX_L2_SZ);\n+\n+\t/* Update data offset */\n+\tdata_off += (ROC_ONF_IPSEC_INB_SPI_SEQ_SZ +\n+\t\t ROC_ONF_IPSEC_INB_MAX_L2_SZ);\n+\t*rearm_val = *rearm_val & ~(BIT_ULL(16) - 1);\n+\t*rearm_val |= data_off;\n+\n+\t*len = rte_be_to_cpu_16(ipv4->total_length) + lcptr;\n+\treturn PKT_RX_SEC_OFFLOAD;\n+}\n+\n static __rte_always_inline void\n cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,\n \t\t struct rte_mbuf *mbuf, const void *lookup_mem,\n-\t\t const uint64_t val, const uint16_t flag)\n+\t\t uint64_t val, const uint16_t flag)\n {\n \tconst union nix_rx_parse_u *rx =\n \t\t(const union nix_rx_parse_u *)((const uint64_t *)cq + 1);\n-\tconst uint16_t len = rx->cn9k.pkt_lenm1 + 1;\n+\tuint16_t len = rx->cn9k.pkt_lenm1 + 1;\n \tconst uint64_t w1 = *(const uint64_t *)rx;\n+\tuint32_t packet_type;\n \tuint64_t ol_flags = 0;\n \n \t/* Mark mempool obj as \"get\" as it is alloc'ed by NIX */\n \t__mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);\n \n \tif (flag & NIX_RX_OFFLOAD_PTYPE_F)\n-\t\tmbuf->packet_type = nix_ptype_get(lookup_mem, w1);\n+\t\tpacket_type = nix_ptype_get(lookup_mem, w1);\n \telse\n-\t\tmbuf->packet_type = 0;\n+\t\tpacket_type = 0;\n+\n+\tif ((flag & NIX_RX_OFFLOAD_SECURITY_F) &&\n+\t cq->cqe_type == NIX_XQE_TYPE_RX_IPSECH) {\n+\t\tuint16_t port = val >> 48;\n+\t\tuintptr_t sa_base;\n+\n+\t\t/* Get SA Base from lookup mem */\n+\t\tsa_base = cnxk_nix_sa_base_get(port, lookup_mem);\n+\n+\t\tol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, sa_base, &val,\n+\t\t\t\t\t\t &len);\n+\n+\t\t/* Only Tunnel inner IPv4 is supported */\n+\t\tpacket_type = (packet_type &\n+\t\t\t ~(RTE_PTYPE_L3_MASK | RTE_PTYPE_TUNNEL_MASK));\n+\t\tpacket_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;\n+\t\tmbuf->packet_type = packet_type;\n+\t\tgoto skip_parse;\n+\t}\n+\n+\tif (flag & NIX_RX_OFFLOAD_PTYPE_F)\n+\t\tmbuf->packet_type = packet_type;\n \n \tif (flag & NIX_RX_OFFLOAD_RSS_F) {\n \t\tmbuf->hash.rss = tag;\n@@ -193,6 +273,7 @@ cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,\n \tif (flag & NIX_RX_OFFLOAD_CHECKSUM_F)\n \t\tol_flags |= nix_rx_olflags_get(lookup_mem, w1);\n \n+skip_parse:\n \tif (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {\n \t\tif (rx->cn9k.vtag0_gone) {\n \t\t\tol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;\n@@ -208,11 +289,12 @@ cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,\n \t\tol_flags =\n \t\t\tnix_update_match_id(rx->cn9k.match_id, ol_flags, mbuf);\n \n-\tmbuf->ol_flags = ol_flags;\n \tmbuf->pkt_len = len;\n \tmbuf->data_len = len;\n \t*(uint64_t *)(&mbuf->rearm_data) = val;\n \n+\tmbuf->ol_flags = ol_flags;\n+\n \tif (flag & NIX_RX_MULTI_SEG_F)\n \t\tnix_cqe_xtract_mseg(rx, mbuf, val, flag);\n \telse\n@@ -670,98 +752,268 @@ cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,\n #define MARK_F\t NIX_RX_OFFLOAD_MARK_UPDATE_F\n #define TS_F\t NIX_RX_OFFLOAD_TSTAMP_F\n #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F\n+#define R_SEC_F NIX_RX_OFFLOAD_SECURITY_F\n \n-/* [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */\n+/* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */\n #define NIX_RX_FASTPATH_MODES\t\t\t\t\t\t \\\n-R(no_offload,\t\t\t0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE)\t \\\n-R(rss,\t\t\t\t0, 0, 0, 0, 0, 1, RSS_F)\t\t \\\n-R(ptype,\t\t\t0, 0, 0, 0, 1, 0, PTYPE_F)\t\t \\\n-R(ptype_rss,\t\t\t0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F)\t \\\n-R(cksum,\t\t\t0, 0, 0, 1, 0, 0, CKSUM_F)\t\t \\\n-R(cksum_rss,\t\t\t0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F)\t \\\n-R(cksum_ptype,\t\t\t0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F)\t \\\n-R(cksum_ptype_rss,\t\t0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \\\n-R(mark,\t\t\t\t0, 0, 1, 0, 0, 0, MARK_F)\t\t \\\n-R(mark_rss,\t\t\t0, 0, 1, 0, 0, 1, MARK_F | RSS_F)\t \\\n-R(mark_ptype,\t\t\t0, 0, 1, 0, 1, 0, MARK_F | PTYPE_F)\t \\\n-R(mark_ptype_rss,\t\t0, 0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \\\n-R(mark_cksum,\t\t\t0, 0, 1, 1, 0, 0, MARK_F | CKSUM_F)\t \\\n-R(mark_cksum_rss,\t\t0, 0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \\\n-R(mark_cksum_ptype,\t\t0, 0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \\\n-R(mark_cksum_ptype_rss,\t\t0, 0, 1, 1, 1, 1,\t\t\t \\\n-\t\t\tMARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(ts,\t\t\t\t0, 1, 0, 0, 0, 0, TS_F)\t\t\t \\\n-R(ts_rss,\t\t\t0, 1, 0, 0, 0, 1, TS_F | RSS_F)\t\t \\\n-R(ts_ptype,\t\t\t0, 1, 0, 0, 1, 0, TS_F | PTYPE_F)\t \\\n-R(ts_ptype_rss,\t\t\t0, 1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \\\n-R(ts_cksum,\t\t\t0, 1, 0, 1, 0, 0, TS_F | CKSUM_F)\t \\\n-R(ts_cksum_rss,\t\t\t0, 1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \\\n-R(ts_cksum_ptype,\t\t0, 1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \\\n-R(ts_cksum_ptype_rss,\t\t0, 1, 0, 1, 1, 1,\t\t\t \\\n-\t\t\tTS_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(ts_mark,\t\t\t0, 1, 1, 0, 0, 0, TS_F | MARK_F)\t \\\n-R(ts_mark_rss,\t\t\t0, 1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F) \\\n-R(ts_mark_ptype,\t\t0, 1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \\\n-R(ts_mark_ptype_rss,\t\t0, 1, 1, 0, 1, 1,\t\t\t \\\n-\t\t\tTS_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n-R(ts_mark_cksum,\t\t0, 1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \\\n-R(ts_mark_cksum_rss,\t\t0, 1, 1, 1, 0, 1,\t\t\t \\\n-\t\t\tTS_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n-R(ts_mark_cksum_ptype,\t\t0, 1, 1, 1, 1, 0,\t\t\t \\\n-\t\t\tTS_F | MARK_F | CKSUM_F | PTYPE_F)\t\t \\\n-R(ts_mark_cksum_ptype_rss,\t0, 1, 1, 1, 1, 1,\t\t\t \\\n-\t\t\tTS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n-R(vlan,\t\t\t\t1, 0, 0, 0, 0, 0, RX_VLAN_F)\t\t \\\n-R(vlan_rss,\t\t\t1, 0, 0, 0, 0, 1, RX_VLAN_F | RSS_F)\t \\\n-R(vlan_ptype,\t\t\t1, 0, 0, 0, 1, 0, RX_VLAN_F | PTYPE_F)\t \\\n-R(vlan_ptype_rss,\t\t1, 0, 0, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F) \\\n-R(vlan_cksum,\t\t\t1, 0, 0, 1, 0, 0, RX_VLAN_F | CKSUM_F)\t \\\n-R(vlan_cksum_rss,\t\t1, 0, 0, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F) \\\n-R(vlan_cksum_ptype,\t\t1, 0, 0, 1, 1, 0,\t\t\t \\\n-\t\t\tRX_VLAN_F | CKSUM_F | PTYPE_F)\t\t\t \\\n-R(vlan_cksum_ptype_rss,\t\t1, 0, 0, 1, 1, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(vlan_mark,\t\t\t1, 0, 1, 0, 0, 0, RX_VLAN_F | MARK_F)\t \\\n-R(vlan_mark_rss,\t\t1, 0, 1, 0, 0, 1, RX_VLAN_F | MARK_F | RSS_F) \\\n-R(vlan_mark_ptype,\t\t1, 0, 1, 0, 1, 0, RX_VLAN_F | MARK_F | PTYPE_F)\\\n-R(vlan_mark_ptype_rss,\t\t1, 0, 1, 0, 1, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n-R(vlan_mark_cksum,\t\t1, 0, 1, 1, 0, 0, RX_VLAN_F | MARK_F | CKSUM_F)\\\n-R(vlan_mark_cksum_rss,\t\t1, 0, 1, 1, 0, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n-R(vlan_mark_cksum_ptype,\t1, 0, 1, 1, 1, 0,\t\t\t \\\n-\t\t\tRX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F)\t\t \\\n-R(vlan_mark_cksum_ptype_rss,\t1, 0, 1, 1, 1, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n-R(vlan_ts,\t\t\t1, 1, 0, 0, 0, 0, RX_VLAN_F | TS_F)\t \\\n-R(vlan_ts_rss,\t\t\t1, 1, 0, 0, 0, 1, RX_VLAN_F | TS_F | RSS_F) \\\n-R(vlan_ts_ptype,\t\t1, 1, 0, 0, 1, 0, RX_VLAN_F | TS_F | PTYPE_F) \\\n-R(vlan_ts_ptype_rss,\t\t1, 1, 0, 0, 1, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | PTYPE_F | RSS_F)\t\t \\\n-R(vlan_ts_cksum,\t\t1, 1, 0, 1, 0, 0, RX_VLAN_F | TS_F | CKSUM_F) \\\n-R(vlan_ts_cksum_rss,\t\t1, 1, 0, 1, 0, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | CKSUM_F | RSS_F)\t\t \\\n-R(vlan_ts_cksum_ptype,\t\t1, 1, 0, 1, 1, 0,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | CKSUM_F | PTYPE_F)\t\t \\\n-R(vlan_ts_cksum_ptype_rss,\t1, 1, 0, 1, 1, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n-R(vlan_ts_mark,\t\t\t1, 1, 1, 0, 0, 0, RX_VLAN_F | TS_F | MARK_F) \\\n-R(vlan_ts_mark_rss,\t\t1, 1, 1, 0, 0, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | MARK_F | RSS_F)\t\t \\\n-R(vlan_ts_mark_ptype,\t\t1, 1, 1, 0, 1, 0,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | MARK_F | PTYPE_F)\t\t \\\n-R(vlan_ts_mark_ptype_rss,\t1, 1, 1, 0, 1, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F)\t \\\n-R(vlan_ts_mark_cksum,\t\t1, 1, 1, 1, 0, 0,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F)\t\t \\\n-R(vlan_ts_mark_cksum_rss,\t1, 1, 1, 1, 0, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F)\t \\\n-R(vlan_ts_mark_cksum_ptype,\t1, 1, 1, 1, 1, 0,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)\t \\\n-R(vlan_ts_mark_cksum_ptype_rss,\t1, 1, 1, 1, 1, 1,\t\t\t \\\n-\t\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+R(no_offload,\t\t\t0, 0, 0, 0, 0, 0, 0,\t\t\t \\\n+\t\tNIX_RX_OFFLOAD_NONE)\t\t\t\t\t \\\n+R(rss,\t\t\t\t0, 0, 0, 0, 0, 0, 1,\t\t\t \\\n+\t\tRSS_F)\t\t\t\t\t\t\t \\\n+R(ptype,\t\t\t0, 0, 0, 0, 0, 1, 0,\t\t\t \\\n+\t\tPTYPE_F)\t\t\t\t\t\t \\\n+R(ptype_rss,\t\t\t0, 0, 0, 0, 0, 1, 1,\t\t\t \\\n+\t\tPTYPE_F | RSS_F)\t\t\t\t\t \\\n+R(cksum,\t\t\t0, 0, 0, 0, 1, 0, 0,\t\t\t \\\n+\t\tCKSUM_F)\t\t\t\t\t\t \\\n+R(cksum_rss,\t\t\t0, 0, 0, 0, 1, 0, 1,\t\t\t \\\n+\t\tCKSUM_F | RSS_F)\t\t\t\t\t \\\n+R(cksum_ptype,\t\t\t0, 0, 0, 0, 1, 1, 0,\t\t\t \\\n+\t\tCKSUM_F | PTYPE_F)\t\t\t\t\t \\\n+R(cksum_ptype_rss,\t\t0, 0, 0, 0, 1, 1, 1,\t\t\t \\\n+\t\tCKSUM_F | PTYPE_F | RSS_F)\t\t\t\t \\\n+R(mark,\t\t\t\t0, 0, 0, 1, 0, 0, 0,\t\t\t \\\n+\t\tMARK_F)\t\t\t\t\t\t\t \\\n+R(mark_rss,\t\t\t0, 0, 0, 1, 0, 0, 1,\t\t\t \\\n+\t\tMARK_F | RSS_F)\t\t\t\t\t\t \\\n+R(mark_ptype,\t\t\t0, 0, 0, 1, 0, 1, 0,\t\t\t \\\n+\t\tMARK_F | PTYPE_F)\t\t\t\t\t \\\n+R(mark_ptype_rss,\t\t0, 0, 0, 1, 0, 1, 1,\t\t\t \\\n+\t\tMARK_F | PTYPE_F | RSS_F)\t\t\t\t \\\n+R(mark_cksum,\t\t\t0, 0, 0, 1, 1, 0, 0,\t\t\t \\\n+\t\tMARK_F | CKSUM_F)\t\t\t\t\t \\\n+R(mark_cksum_rss,\t\t0, 0, 0, 1, 1, 0, 1,\t\t\t \\\n+\t\tMARK_F | CKSUM_F | RSS_F)\t\t\t\t \\\n+R(mark_cksum_ptype,\t\t0, 0, 0, 1, 1, 1, 0,\t\t\t \\\n+\t\tMARK_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n+R(mark_cksum_ptype_rss,\t\t0, 0, 0, 1, 1, 1, 1,\t\t\t \\\n+\t\tMARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(ts,\t\t\t\t0, 0, 1, 0, 0, 0, 0,\t\t\t \\\n+\t\tTS_F)\t\t\t\t\t\t\t \\\n+R(ts_rss,\t\t\t0, 0, 1, 0, 0, 0, 1,\t\t\t \\\n+\t\tTS_F | RSS_F)\t\t\t\t\t\t \\\n+R(ts_ptype,\t\t\t0, 0, 1, 0, 0, 1, 0,\t\t\t \\\n+\t\tTS_F | PTYPE_F)\t\t\t\t\t\t \\\n+R(ts_ptype_rss,\t\t\t0, 0, 1, 0, 0, 1, 1,\t\t\t \\\n+\t\tTS_F | PTYPE_F | RSS_F)\t\t\t\t\t \\\n+R(ts_cksum,\t\t\t0, 0, 1, 0, 1, 0, 0,\t\t\t \\\n+\t\tTS_F | CKSUM_F)\t\t\t\t\t\t \\\n+R(ts_cksum_rss,\t\t\t0, 0, 1, 0, 1, 0, 1,\t\t\t \\\n+\t\tTS_F | CKSUM_F | RSS_F)\t\t\t\t\t \\\n+R(ts_cksum_ptype,\t\t0, 0, 1, 0, 1, 1, 0,\t\t\t \\\n+\t\tTS_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n+R(ts_cksum_ptype_rss,\t\t0, 0, 1, 0, 1, 1, 1,\t\t\t \\\n+\t\tTS_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(ts_mark,\t\t\t0, 0, 1, 1, 0, 0, 0,\t\t\t \\\n+\t\tTS_F | MARK_F)\t\t\t\t\t\t \\\n+R(ts_mark_rss,\t\t\t0, 0, 1, 1, 0, 0, 1,\t\t\t \\\n+\t\tTS_F | MARK_F | RSS_F)\t\t\t\t\t \\\n+R(ts_mark_ptype,\t\t0, 0, 1, 1, 0, 1, 0,\t\t\t \\\n+\t\tTS_F | MARK_F | PTYPE_F)\t\t\t\t \\\n+R(ts_mark_ptype_rss,\t\t0, 0, 1, 1, 0, 1, 1,\t\t\t \\\n+\t\tTS_F | MARK_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(ts_mark_cksum,\t\t0, 0, 1, 1, 1, 0, 0,\t\t\t \\\n+\t\tTS_F | MARK_F | CKSUM_F)\t\t\t\t \\\n+R(ts_mark_cksum_rss,\t\t0, 0, 1, 1, 1, 0, 1,\t\t\t \\\n+\t\tTS_F | MARK_F | CKSUM_F | RSS_F)\t\t\t \\\n+R(ts_mark_cksum_ptype,\t\t0, 0, 1, 1, 1, 1, 0,\t\t\t \\\n+\t\tTS_F | MARK_F | CKSUM_F | PTYPE_F)\t\t\t \\\n+R(ts_mark_cksum_ptype_rss,\t0, 0, 1, 1, 1, 1, 1,\t\t\t \\\n+\t\tTS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n+R(vlan,\t\t\t\t0, 1, 0, 0, 0, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F)\t\t\t\t\t\t \\\n+R(vlan_rss,\t\t\t0, 1, 0, 0, 0, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | RSS_F)\t\t\t\t\t \\\n+R(vlan_ptype,\t\t\t0, 1, 0, 0, 0, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | PTYPE_F)\t\t\t\t\t \\\n+R(vlan_ptype_rss,\t\t0, 1, 0, 0, 0, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | PTYPE_F | RSS_F)\t\t\t\t \\\n+R(vlan_cksum,\t\t\t0, 1, 0, 0, 1, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F | CKSUM_F)\t\t\t\t\t \\\n+R(vlan_cksum_rss,\t\t0, 1, 0, 0, 1, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | CKSUM_F | RSS_F)\t\t\t\t \\\n+R(vlan_cksum_ptype,\t\t0, 1, 0, 0, 1, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n+R(vlan_cksum_ptype_rss,\t\t0, 1, 0, 0, 1, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(vlan_mark,\t\t\t0, 1, 0, 1, 0, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F)\t\t\t\t\t \\\n+R(vlan_mark_rss,\t\t0, 1, 0, 1, 0, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F | RSS_F)\t\t\t\t \\\n+R(vlan_mark_ptype,\t\t0, 1, 0, 1, 0, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F | PTYPE_F)\t\t\t\t \\\n+R(vlan_mark_ptype_rss,\t\t0, 1, 0, 1, 0, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(vlan_mark_cksum,\t\t0, 1, 0, 1, 1, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F | CKSUM_F)\t\t\t\t \\\n+R(vlan_mark_cksum_rss,\t\t0, 1, 0, 1, 1, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F | CKSUM_F | RSS_F)\t\t\t \\\n+R(vlan_mark_cksum_ptype,\t0, 1, 0, 1, 1, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F)\t\t\t \\\n+R(vlan_mark_cksum_ptype_rss,\t0, 1, 0, 1, 1, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n+R(vlan_ts,\t\t\t0, 1, 1, 0, 0, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F)\t\t\t\t\t \\\n+R(vlan_ts_rss,\t\t\t0, 1, 1, 0, 0, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | RSS_F)\t\t\t\t \\\n+R(vlan_ts_ptype,\t\t0, 1, 1, 0, 0, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | PTYPE_F)\t\t\t\t \\\n+R(vlan_ts_ptype_rss,\t\t0, 1, 1, 0, 0, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(vlan_ts_cksum,\t\t0, 1, 1, 0, 1, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | CKSUM_F)\t\t\t\t \\\n+R(vlan_ts_cksum_rss,\t\t0, 1, 1, 0, 1, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | CKSUM_F | RSS_F)\t\t\t \\\n+R(vlan_ts_cksum_ptype,\t\t0, 1, 1, 0, 1, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | CKSUM_F | PTYPE_F)\t\t\t \\\n+R(vlan_ts_cksum_ptype_rss,\t0, 1, 1, 0, 1, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n+R(vlan_ts_mark,\t\t\t0, 1, 1, 1, 0, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F)\t\t\t\t \\\n+R(vlan_ts_mark_rss,\t\t0, 1, 1, 1, 0, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F | RSS_F)\t\t\t \\\n+R(vlan_ts_mark_ptype,\t\t0, 1, 1, 1, 0, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F | PTYPE_F)\t\t\t \\\n+R(vlan_ts_mark_ptype_rss,\t0, 1, 1, 1, 0, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n+R(vlan_ts_mark_cksum,\t\t0, 1, 1, 1, 1, 0, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F)\t\t\t \\\n+R(vlan_ts_mark_cksum_rss,\t0, 1, 1, 1, 1, 0, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n+R(vlan_ts_mark_cksum_ptype,\t0, 1, 1, 1, 1, 1, 0,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)\t\t \\\n+R(vlan_ts_mark_cksum_ptype_rss,\t0, 1, 1, 1, 1, 1, 1,\t\t\t \\\n+\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n+R(sec,\t\t\t\t1, 0, 0, 0, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F)\t\t\t\t\t\t \\\n+R(sec_rss,\t\t\t1, 0, 0, 0, 0, 0, 1,\t\t\t \\\n+\t\tRSS_F)\t\t\t\t\t\t\t \\\n+R(sec_ptype,\t\t\t1, 0, 0, 0, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | PTYPE_F)\t\t\t\t\t \\\n+R(sec_ptype_rss,\t\t1, 0, 0, 0, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | PTYPE_F | RSS_F)\t\t\t\t \\\n+R(sec_cksum,\t\t\t1, 0, 0, 0, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | CKSUM_F)\t\t\t\t\t \\\n+R(sec_cksum_rss,\t\t1, 0, 0, 0, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | CKSUM_F | RSS_F)\t\t\t\t \\\n+R(sec_cksum_ptype,\t\t1, 0, 0, 0, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n+R(sec_cksum_ptype_rss,\t\t1, 0, 0, 0, 1, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(sec_mark,\t\t\t1, 0, 0, 1, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | MARK_F)\t\t\t\t\t \\\n+R(sec_mark_rss,\t\t\t1, 0, 0, 1, 0, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | MARK_F | RSS_F)\t\t\t\t \\\n+R(sec_mark_ptype,\t\t1, 0, 0, 1, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | MARK_F | PTYPE_F)\t\t\t\t \\\n+R(sec_mark_ptype_rss,\t\t1, 0, 0, 1, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | MARK_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(sec_mark_cksum,\t\t1, 0, 0, 1, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | MARK_F | CKSUM_F)\t\t\t\t \\\n+R(sec_mark_cksum_rss,\t\t1, 0, 0, 1, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | MARK_F | CKSUM_F | RSS_F)\t\t\t \\\n+R(sec_mark_cksum_ptype,\t\t1, 0, 0, 1, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | MARK_F | CKSUM_F | PTYPE_F)\t\t\t \\\n+R(sec_mark_cksum_ptype_rss,\t1, 0, 0, 1, 1, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n+R(sec_ts,\t\t\t1, 0, 1, 0, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F)\t\t\t\t\t\t \\\n+R(sec_ts_rss,\t\t\t1, 0, 1, 0, 0, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | RSS_F)\t\t\t\t\t \\\n+R(sec_ts_ptype,\t\t\t1, 0, 1, 0, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F | PTYPE_F)\t\t\t\t \\\n+R(sec_ts_ptype_rss,\t\t1, 0, 1, 0, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(sec_ts_cksum,\t\t\t1, 0, 1, 0, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F | CKSUM_F)\t\t\t\t \\\n+R(sec_ts_cksum_rss,\t\t1, 0, 1, 0, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | CKSUM_F | RSS_F)\t\t\t \\\n+R(sec_ts_cksum_ptype,\t\t1, 0, 1, 0, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F | CKSUM_F | PTYPE_F)\t\t\t \\\n+R(sec_ts_cksum_ptype_rss,\t1, 0, 1, 0, 1, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n+R(sec_ts_mark,\t\t\t1, 0, 1, 1, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F)\t\t\t\t \\\n+R(sec_ts_mark_rss,\t\t1, 0, 1, 1, 0, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F | RSS_F)\t\t\t \\\n+R(sec_ts_mark_ptype,\t\t1, 0, 1, 1, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F | PTYPE_F)\t\t\t \\\n+R(sec_ts_mark_ptype_rss,\t1, 0, 1, 1, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n+R(sec_ts_mark_cksum,\t\t1, 0, 1, 1, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F)\t\t\t \\\n+R(sec_ts_mark_cksum_rss,\t1, 0, 1, 1, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n+R(sec_ts_mark_cksum_ptype,\t1, 0, 1, 1, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)\t\t \\\n+R(sec_ts_mark_cksum_ptype_rss,\t1, 0, 1, 1, 1, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n+R(sec_vlan,\t\t\t1, 1, 0, 0, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F)\t\t\t\t\t \\\n+R(sec_vlan_rss,\t\t\t1, 1, 0, 0, 0, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | RSS_F)\t\t\t\t \\\n+R(sec_vlan_ptype,\t\t1, 1, 0, 0, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | PTYPE_F)\t\t\t\t \\\n+R(sec_vlan_ptype_rss,\t\t1, 1, 0, 0, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F)\t\t\t \\\n+R(sec_vlan_cksum,\t\t1, 1, 0, 0, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | CKSUM_F)\t\t\t\t \\\n+R(sec_vlan_cksum_rss,\t\t1, 1, 0, 0, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F)\t\t\t \\\n+R(sec_vlan_cksum_ptype,\t\t1, 1, 0, 0, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F)\t\t \\\n+R(sec_vlan_cksum_ptype_rss,\t1, 1, 0, 0, 1, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n+R(sec_vlan_mark,\t\t1, 1, 0, 1, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F)\t\t\t\t \\\n+R(sec_vlan_mark_rss,\t\t1, 1, 0, 1, 0, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F | RSS_F)\t\t\t \\\n+R(sec_vlan_mark_ptype,\t\t1, 1, 0, 1, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F)\t\t\t \\\n+R(sec_vlan_mark_ptype_rss,\t1, 1, 0, 1, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n+R(sec_vlan_mark_cksum,\t\t1, 1, 0, 1, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F)\t\t\t \\\n+R(sec_vlan_mark_cksum_rss,\t1, 1, 0, 1, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n+R(sec_vlan_mark_cksum_ptype,\t1, 1, 0, 1, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F)\t \\\n+R(sec_vlan_mark_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+R(sec_vlan_ts,\t\t\t1, 1, 1, 0, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F)\t\t\t\t \\\n+R(sec_vlan_ts_rss,\t\t1, 1, 1, 0, 0, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | RSS_F)\t\t\t \\\n+R(sec_vlan_ts_ptype,\t\t1, 1, 1, 0, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | PTYPE_F)\t\t\t \\\n+R(sec_vlan_ts_ptype_rss,\t1, 1, 1, 0, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F)\t\t \\\n+R(sec_vlan_ts_cksum,\t\t1, 1, 1, 0, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F)\t\t\t \\\n+R(sec_vlan_ts_cksum_rss,\t1, 1, 1, 0, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F)\t\t \\\n+R(sec_vlan_ts_cksum_ptype,\t1, 1, 1, 0, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F)\t\t \\\n+R(sec_vlan_ts_cksum_ptype_rss,\t1, 1, 1, 0, 1, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n+R(sec_vlan_ts_mark,\t\t1, 1, 1, 1, 0, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F)\t\t\t \\\n+R(sec_vlan_ts_mark_rss,\t\t1, 1, 1, 1, 0, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F)\t\t \\\n+R(sec_vlan_ts_mark_ptype,\t1, 1, 1, 1, 0, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F)\t\t \\\n+R(sec_vlan_ts_mark_ptype_rss,\t1, 1, 1, 1, 0, 1, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F)\t \\\n+R(sec_vlan_ts_mark_cksum,\t1, 1, 1, 1, 1, 0, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F)\t\t \\\n+R(sec_vlan_ts_mark_cksum_rss,\t1, 1, 1, 1, 1, 0, 1,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F)\t \\\n+R(sec_vlan_ts_mark_cksum_ptype,\t1, 1, 1, 1, 1, 1, 0,\t\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+R(sec_vlan_ts_mark_cksum_ptype_rss,\t1, 1, 1, 1, 1, 1, 1,\t\t \\\n+\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \\\n \t\t\t\t\t\t\t\t\t \\\ndiff --git a/drivers/net/cnxk/cn9k_rx_mseg.c b/drivers/net/cnxk/cn9k_rx_mseg.c\nindex d7e19b1..06509e8 100644\n--- a/drivers/net/cnxk/cn9k_rx_mseg.c\n+++ b/drivers/net/cnxk/cn9k_rx_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_rx.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\ndiff --git a/drivers/net/cnxk/cn9k_rx_vec.c b/drivers/net/cnxk/cn9k_rx_vec.c\nindex ef5f771..c96f61c 100644\n--- a/drivers/net/cnxk/cn9k_rx_vec.c\n+++ b/drivers/net/cnxk/cn9k_rx_vec.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_rx.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\ndiff --git a/drivers/net/cnxk/cn9k_rx_vec_mseg.c b/drivers/net/cnxk/cn9k_rx_vec_mseg.c\nindex e46d8a4..938b1c0 100644\n--- a/drivers/net/cnxk/cn9k_rx_vec_mseg.c\n+++ b/drivers/net/cnxk/cn9k_rx_vec_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_rx.h\"\n \n-#define R(name, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_mseg_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n \t{ \\\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex 5ae791f..cfdc493 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -130,6 +130,9 @@\n /* Subtype from inline outbound error event */\n #define CNXK_ETHDEV_SEC_OUTB_EV_SUB 0xFFUL\n \n+/* SPI will be in 20 bits of tag */\n+#define CNXK_ETHDEV_SPI_TAG_MASK 0xFFFFFUL\n+\n struct cnxk_fc_cfg {\n \tenum rte_eth_fc_mode mode;\n \tuint8_t rx_pause;\n", "prefixes": [ "17/27" ] }