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GET /api/patches/97693/?format=api
{ "id": 97693, "url": "http://patches.dpdk.org/api/patches/97693/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210901142433.8444-8-venkatkumar.duvvuru@broadcom.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210901142433.8444-8-venkatkumar.duvvuru@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210901142433.8444-8-venkatkumar.duvvuru@broadcom.com", "date": "2021-09-01T14:24:26", "name": "[07/14] net/bnxt: add support for dynamic encap action", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "292da2ab9a4c32cbd0270b05e20e277154df606b", "submitter": { "id": 1635, "url": "http://patches.dpdk.org/api/people/1635/?format=api", "name": "Venkat Duvvuru", "email": "venkatkumar.duvvuru@broadcom.com" }, "delegate": { "id": 1766, "url": "http://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210901142433.8444-8-venkatkumar.duvvuru@broadcom.com/mbox/", "series": [ { "id": 18604, "url": "http://patches.dpdk.org/api/series/18604/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18604", "date": "2021-09-01T14:24:19", "name": "enhancements to host based flow table management", "version": 1, "mbox": "http://patches.dpdk.org/series/18604/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/97693/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/97693/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 08F56A0C45;\n\tWed, 1 Sep 2021 16:25:40 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2EBA54117E;\n\tWed, 1 Sep 2021 16:25:00 +0200 (CEST)", "from relay.smtp-ext.broadcom.com (relay.smtp-ext.broadcom.com\n [192.19.166.231])\n by mails.dpdk.org (Postfix) with ESMTP id 7569C41176\n for <dev@dpdk.org>; Wed, 1 Sep 2021 16:24:58 +0200 (CEST)", "from S60.dhcp.broadcom.net (unknown [10.123.66.170])\n (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n (No client certificate requested)\n by relay.smtp-ext.broadcom.com (Postfix) with ESMTPS id CD8F924AB9;\n Wed, 1 Sep 2021 07:24:56 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com CD8F924AB9", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1630506297;\n bh=AG9ylrgnhHBuYG4GyCaF5kr7C7TdOrgRU6dM8Ycdtnc=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=L3B3ggFXAZZ+nS4bp3xHr2W5i19fmDY8GoEaYhN4xodB7qDdl23gIaVgisCufpfVB\n oKXbRb+b50yPQVKxW6lr1HmbmrT/x3kmRdxCwvpnul2fIpK6BkQH2sTXcXBEIXknAN\n sPd8O1emoh1YDZNtboS6kZWINmaC9+WLzHByVkww=", "From": "Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Kishore Padmanabha <kishore.padmanabha@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>", "Date": "Wed, 1 Sep 2021 19:54:26 +0530", "Message-Id": "<20210901142433.8444-8-venkatkumar.duvvuru@broadcom.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210901142433.8444-1-venkatkumar.duvvuru@broadcom.com>", "References": "<20210901142433.8444-1-venkatkumar.duvvuru@broadcom.com>", "Subject": "[dpdk-dev] [PATCH 07/14] net/bnxt: add support for dynamic encap\n action", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\nThe encapsulation record processing is enhanced to handle data\ndynamically. Different combinations of VXLAN encapsulation using\nno VLAN or single or double VLAN can be supported and also supports\nboth IPv4 and IPv6 versions.\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\n---\n drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 25 +-\n drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c | 2 +\n .../generic_templates/ulp_template_db_enum.h | 44 +-\n .../generic_templates/ulp_template_db_tbl.c | 8 +-\n .../ulp_template_db_thor_act.c | 4 +-\n .../ulp_template_db_thor_class.c | 46 +-\n .../ulp_template_db_wh_plus_act.c | 1700 ++++++++++++-----\n .../ulp_template_db_wh_plus_class.c | 222 +--\n drivers/net/bnxt/tf_ulp/ulp_flow_db.c | 6 +-\n drivers/net/bnxt/tf_ulp/ulp_flow_db.h | 2 +-\n drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c | 2 +-\n drivers/net/bnxt/tf_ulp/ulp_mapper.c | 152 +-\n drivers/net/bnxt/tf_ulp/ulp_mapper.h | 4 +\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 337 ++--\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.h | 2 +\n drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 10 +-\n drivers/net/bnxt/tf_ulp/ulp_utils.c | 73 +-\n drivers/net/bnxt/tf_ulp/ulp_utils.h | 27 +-\n 18 files changed, 1717 insertions(+), 949 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c\nindex dfafd9ff5b..3b86410fb1 100644\n--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c\n+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c\n@@ -830,13 +830,12 @@ ulp_ctx_init(struct bnxt *bp,\n \t\tgoto error_deinit;\n \t}\n \n-\t/* TODO: For now we are overriding to APP:1 on this branch*/\n-\tbp->app_id = 1;\n \trc = bnxt_ulp_cntxt_app_id_set(bp->ulp_ctx, bp->app_id);\n \tif (rc) {\n \t\tBNXT_TF_DBG(ERR, \"Unable to set app_id for ULP init.\\n\");\n \t\tgoto error_deinit;\n \t}\n+\tBNXT_TF_DBG(DEBUG, \"Ulp initialized with app id %d\\n\", bp->app_id);\n \n \trc = bnxt_ulp_cntxt_app_caps_init(bp->ulp_ctx, bp->app_id, devid);\n \tif (rc) {\n@@ -1393,13 +1392,17 @@ bnxt_ulp_port_init(struct bnxt *bp)\n \tuint32_t ulp_flags;\n \tint32_t rc = 0;\n \n-\tif (!bp || !BNXT_TRUFLOW_EN(bp))\n-\t\treturn rc;\n-\n \tif (!BNXT_PF(bp) && !BNXT_VF_IS_TRUSTED(bp)) {\n \t\tBNXT_TF_DBG(ERR,\n \t\t\t \"Skip ulp init for port: %d, not a TVF or PF\\n\",\n-\t\t\tbp->eth_dev->data->port_id);\n+\t\t\t bp->eth_dev->data->port_id);\n+\t\treturn rc;\n+\t}\n+\n+\tif (!BNXT_TRUFLOW_EN(bp)) {\n+\t\tBNXT_TF_DBG(ERR,\n+\t\t\t \"Skip ulp init for port: %d, truflow is not enabled\\n\",\n+\t\t\t bp->eth_dev->data->port_id);\n \t\treturn rc;\n \t}\n \n@@ -1520,9 +1523,6 @@ bnxt_ulp_port_deinit(struct bnxt *bp)\n \tstruct rte_pci_device *pci_dev;\n \tstruct rte_pci_addr *pci_addr;\n \n-\tif (!BNXT_TRUFLOW_EN(bp))\n-\t\treturn;\n-\n \tif (!BNXT_PF(bp) && !BNXT_VF_IS_TRUSTED(bp)) {\n \t\tBNXT_TF_DBG(ERR,\n \t\t\t \"Skip ULP deinit port:%d, not a TVF or PF\\n\",\n@@ -1530,6 +1530,13 @@ bnxt_ulp_port_deinit(struct bnxt *bp)\n \t\treturn;\n \t}\n \n+\tif (!BNXT_TRUFLOW_EN(bp)) {\n+\t\tBNXT_TF_DBG(ERR,\n+\t\t\t \"Skip ULP deinit for port:%d, truflow is not enabled\\n\",\n+\t\t\t bp->eth_dev->data->port_id);\n+\t\treturn;\n+\t}\n+\n \tif (!bp->ulp_ctx) {\n \t\tBNXT_TF_DBG(DEBUG, \"ulp ctx already de-allocated\\n\");\n \t\treturn;\ndiff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\nindex 3daf5942e8..413e4c3b26 100644\n--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c\n@@ -96,7 +96,9 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,\n \tmapper_cparms->act_tid = params->act_tmpl;\n \tmapper_cparms->func_id = params->func_id;\n \tmapper_cparms->hdr_bitmap = ¶ms->hdr_bitmap;\n+\tmapper_cparms->enc_hdr_bitmap = ¶ms->enc_hdr_bitmap;\n \tmapper_cparms->hdr_field = params->hdr_field;\n+\tmapper_cparms->enc_field = params->enc_field;\n \tmapper_cparms->comp_fld = params->comp_fld;\n \tmapper_cparms->act = ¶ms->act_bitmap;\n \tmapper_cparms->act_prop = ¶ms->act_prop;\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\nindex e55d0923a5..9010d9a749 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h\n@@ -3,7 +3,7 @@\n * All rights reserved.\n */\n \n-/* date: Thu May 20 11:56:39 2021 */\n+/* date: Thu May 27 17:35:19 2021 */\n \n #ifndef ULP_TEMPLATE_DB_H_\n #define ULP_TEMPLATE_DB_H_\n@@ -41,7 +41,7 @@\n #define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 89\n #define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 600\n #define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 26\n-#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 619\n+#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 618\n #define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 49\n #define ULP_THOR_CLASS_TMPL_LIST_SIZE 6\n #define ULP_THOR_CLASS_TBL_LIST_SIZE 33\n@@ -53,7 +53,7 @@\n #define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 35\n #define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 2\n #define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 1\n-#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 512\n+#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 527\n #define ULP_WH_PLUS_ACT_COND_LIST_SIZE 39\n #define ULP_THOR_ACT_TMPL_LIST_SIZE 7\n #define ULP_THOR_ACT_TBL_LIST_SIZE 2\n@@ -229,7 +229,9 @@ enum bnxt_ulp_cond_opc {\n \tBNXT_ULP_COND_OPC_ACT_PAT_MATCH = 11,\n \tBNXT_ULP_COND_OPC_EXT_MEM_IS_SET = 12,\n \tBNXT_ULP_COND_OPC_EXT_MEM_NOT_SET = 13,\n-\tBNXT_ULP_COND_OPC_LAST = 14\n+\tBNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET = 14,\n+\tBNXT_ULP_COND_OPC_ENC_HDR_BIT_NOT_SET = 15,\n+\tBNXT_ULP_COND_OPC_LAST = 16\n };\n \n enum bnxt_ulp_critical_resource {\n@@ -257,6 +259,36 @@ enum bnxt_ulp_direction {\n \tBNXT_ULP_DIRECTION_LAST = 2\n };\n \n+enum bnxt_ulp_enc_field {\n+\tBNXT_ULP_ENC_FIELD_ETH_DMAC = 0,\n+\tBNXT_ULP_ENC_FIELD_ETH_SMAC = 1,\n+\tBNXT_ULP_ENC_FIELD_ETH_TYPE = 2,\n+\tBNXT_ULP_ENC_FIELD_O_VLAN_TCI = 3,\n+\tBNXT_ULP_ENC_FIELD_O_VLAN_TYPE = 4,\n+\tBNXT_ULP_ENC_FIELD_I_VLAN_TCI = 5,\n+\tBNXT_ULP_ENC_FIELD_I_VLAN_TYPE = 6,\n+\tBNXT_ULP_ENC_FIELD_IPV4_IHL = 7,\n+\tBNXT_ULP_ENC_FIELD_IPV4_TOS = 8,\n+\tBNXT_ULP_ENC_FIELD_IPV4_PKT_ID = 9,\n+\tBNXT_ULP_ENC_FIELD_IPV4_FRAG = 10,\n+\tBNXT_ULP_ENC_FIELD_IPV4_TTL = 11,\n+\tBNXT_ULP_ENC_FIELD_IPV4_PROTO = 12,\n+\tBNXT_ULP_ENC_FIELD_IPV4_SADDR = 13,\n+\tBNXT_ULP_ENC_FIELD_IPV4_DADDR = 14,\n+\tBNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW = 15,\n+\tBNXT_ULP_ENC_FIELD_IPV6_PROTO = 16,\n+\tBNXT_ULP_ENC_FIELD_IPV6_TTL = 17,\n+\tBNXT_ULP_ENC_FIELD_IPV6_SADDR = 18,\n+\tBNXT_ULP_ENC_FIELD_IPV6_DADDR = 19,\n+\tBNXT_ULP_ENC_FIELD_UDP_SPORT = 20,\n+\tBNXT_ULP_ENC_FIELD_UDP_DPORT = 21,\n+\tBNXT_ULP_ENC_FIELD_VXLAN_FLAGS = 22,\n+\tBNXT_ULP_ENC_FIELD_VXLAN_RSVD0 = 23,\n+\tBNXT_ULP_ENC_FIELD_VXLAN_VNI = 24,\n+\tBNXT_ULP_ENC_FIELD_VXLAN_RSVD1 = 25,\n+\tBNXT_ULP_ENC_FIELD_LAST = 26\n+};\n+\n enum bnxt_ulp_fdb_opc {\n \tBNXT_ULP_FDB_OPC_PUSH_FID = 0,\n \tBNXT_ULP_FDB_OPC_PUSH_RID_REGFILE = 1,\n@@ -304,7 +336,9 @@ enum bnxt_ulp_field_src {\n \tBNXT_ULP_FIELD_SRC_SKIP = 13,\n \tBNXT_ULP_FIELD_SRC_REJECT = 14,\n \tBNXT_ULP_FIELD_SRC_PORT_TABLE = 15,\n-\tBNXT_ULP_FIELD_SRC_LAST = 16\n+\tBNXT_ULP_FIELD_SRC_ENC_HDR_BIT = 16,\n+\tBNXT_ULP_FIELD_SRC_ENC_FIELD = 17,\n+\tBNXT_ULP_FIELD_SRC_LAST = 18\n };\n \n enum bnxt_ulp_func_opc {\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\nindex 58b4dba63c..b5bce6f4c7 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c\n@@ -198,7 +198,9 @@ const struct bnxt_ulp_template_device_tbls ulp_template_thor_tbls[] = {\n struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {\n \t[BNXT_ULP_DEVICE_ID_WH_PLUS] = {\n \t.description = \"Whitney_Plus\",\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.key_byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.result_byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.encap_byte_order = BNXT_ULP_BYTE_ORDER_BE,\n \t.encap_byte_swap = 1,\n \t.int_flow_db_num_entries = 16384,\n \t.ext_flow_db_num_entries = 32768,\n@@ -218,7 +220,9 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {\n \t},\n \t[BNXT_ULP_DEVICE_ID_THOR] = {\n \t.description = \"Thor\",\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.key_byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.result_byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.encap_byte_order = BNXT_ULP_BYTE_ORDER_BE,\n \t.encap_byte_swap = 1,\n \t.int_flow_db_num_entries = 16384,\n \t.ext_flow_db_num_entries = 32768,\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c\nindex ce5a70b0c5..9faf25aaf0 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c\n@@ -3,7 +3,7 @@\n * All rights reserved.\n */\n \n-/* date: Thu May 13 18:15:56 2021 */\n+/* date: Wed May 26 15:11:34 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\n@@ -41,7 +41,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 0,\n \t.result_bit_size = 64,\n \t.result_num_fields = 1\n@@ -62,7 +61,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 1,\n \t.result_bit_size = 128,\n \t.result_num_fields = 17\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\nindex d20c4197fa..ea9b9773a5 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c\n@@ -3,7 +3,7 @@\n * All rights reserved.\n */\n \n-/* date: Thu May 20 11:56:39 2021 */\n+/* date: Wed May 26 15:11:34 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\n@@ -59,7 +59,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 0,\n \t.blob_key_bit_size = 10,\n \t.key_bit_size = 10,\n@@ -82,7 +81,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 1,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -104,7 +102,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 2,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -122,8 +119,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t\t.cond_start_idx = 5,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 1, , table: l2_cntxt_tcam.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -141,7 +137,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 7,\n \t.blob_key_bit_size = 213,\n \t.key_bit_size = 213,\n@@ -166,7 +161,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 28,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -189,7 +183,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 33,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -207,8 +200,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t\t.cond_start_idx = 6,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 1, , table: fkb_select.l3_l4_wm */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -223,7 +215,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,\n \t.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 10,\n \t.result_bit_size = 106,\n \t.result_num_fields = 106\n@@ -246,7 +237,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.pri_operand = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 36,\n \t.blob_key_bit_size = 94,\n \t.key_bit_size = 94,\n@@ -271,7 +261,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 79,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -297,7 +286,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.pri_operand = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_BE,\n \t.key_start_idx = 82,\n \t.blob_key_bit_size = 0,\n \t.key_bit_size = 0,\n@@ -322,7 +310,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 136,\n \t.result_bit_size = 128,\n \t.result_num_fields = 17\n@@ -341,7 +328,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 196,\n \t.blob_key_bit_size = 10,\n \t.key_bit_size = 10,\n@@ -364,7 +350,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 197,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -382,8 +367,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t\t.cond_start_idx = 9,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -403,7 +387,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.pri_operand = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 198,\n \t.blob_key_bit_size = 213,\n \t.key_bit_size = 213,\n@@ -428,7 +411,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 219,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -450,7 +432,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 168,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -468,7 +449,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 169,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -482,8 +462,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n \t\t.cond_start_idx = 10,\n \t\t.cond_nums = 1 },\n-\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP\n \t},\n \t{ /* class_tid: 4, , table: int_full_act_record.egr_0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -501,7 +480,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 170,\n \t.result_bit_size = 128,\n \t.result_num_fields = 17,\n@@ -521,7 +499,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 220,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -539,8 +516,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t\t.cond_start_idx = 11,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -558,7 +534,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 221,\n \t.blob_key_bit_size = 213,\n \t.key_bit_size = 213,\n@@ -582,7 +557,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 193,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -600,7 +574,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 194,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -621,7 +594,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 195,\n \t.result_bit_size = 128,\n \t.result_num_fields = 17,\n@@ -640,7 +612,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,\n \t.tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 212,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -658,7 +629,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,\n \t.tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 213,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -679,7 +649,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 214,\n \t.result_bit_size = 128,\n \t.result_num_fields = 17,\n@@ -701,7 +670,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.record_size = 16,\n \t.result_start_idx = 231,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n@@ -723,7 +692,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 242,\n \t.result_bit_size = 128,\n \t.result_num_fields = 17\ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\nindex de924fe81a..578ede8bba 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_act.c\n@@ -3,7 +3,7 @@\n * All rights reserved.\n */\n \n-/* date: Mon May 17 15:54:03 2021 */\n+/* date: Tue Jun 1 16:05:30 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\n@@ -90,7 +90,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 0,\n \t.blob_key_bit_size = 1,\n \t.key_bit_size = 1,\n@@ -114,14 +113,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 0,\n \t.result_bit_size = 64,\n \t.result_num_fields = 1\n \t},\n \t{ /* act_tid: 1, , table: int_vtag_encap_record.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n-\t.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,\n+\t.resource_type = TF_TBL_TYPE_ACT_ENCAP_8B,\n \t.resource_sub_type =\n \t\tBNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,\n \t.direction = TF_DIR_RX,\n@@ -135,11 +133,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.record_size = 8,\n \t.result_start_idx = 1,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 1, , table: int_full_act_record.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -157,8 +155,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 13,\n+\t.result_start_idx = 12,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n \t.encap_num_fields = 0\n@@ -179,11 +176,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 39,\n+\t.result_start_idx = 38,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 2, , table: control.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,\n@@ -195,8 +191,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t\t.cond_start_idx = 14,\n \t\t.cond_nums = 0 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* act_tid: 2, , table: mirror_tbl.alloc */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -215,8 +210,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 77,\n+\t.result_start_idx = 75,\n \t.result_bit_size = 32,\n \t.result_num_fields = 6\n \t},\n@@ -237,8 +231,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 83,\n+\t.result_start_idx = 81,\n \t.result_bit_size = 64,\n \t.result_num_fields = 1\n \t},\n@@ -259,8 +252,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 84,\n+\t.result_start_idx = 82,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n \t.encap_num_fields = 0\n@@ -282,11 +274,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 110,\n+\t.result_start_idx = 108,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 2, , table: mirror_tbl.wr */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -304,8 +295,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 148,\n+\t.result_start_idx = 145,\n \t.result_bit_size = 32,\n \t.result_num_fields = 6\n \t},\n@@ -324,12 +314,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 1,\n \t.blob_key_bit_size = 1,\n \t.key_bit_size = 1,\n \t.key_num_fields = 1,\n-\t.result_start_idx = 154,\n+\t.result_start_idx = 151,\n \t.result_bit_size = 34,\n \t.result_num_fields = 2\n \t},\n@@ -348,8 +337,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 156,\n+\t.result_start_idx = 153,\n \t.result_bit_size = 64,\n \t.result_num_fields = 1\n \t},\n@@ -368,8 +356,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 157,\n+\t.result_start_idx = 154,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n \t},\n@@ -388,8 +375,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 158,\n+\t.result_start_idx = 155,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n \t},\n@@ -408,11 +394,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,\n \t.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 159,\n+\t.record_size = 16,\n+\t.result_start_idx = 156,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 3, , table: int_full_act_record.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -429,8 +415,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 171,\n+\t.result_start_idx = 167,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26\n \t},\n@@ -449,11 +434,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 197,\n+\t.result_start_idx = 193,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 4, , table: int_flow_counter_tbl.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -470,8 +454,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 235,\n+\t.result_start_idx = 230,\n \t.result_bit_size = 64,\n \t.result_num_fields = 1\n \t},\n@@ -490,11 +473,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 236,\n+\t.record_size = 8,\n+\t.result_start_idx = 231,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 4, , table: int_full_act_record.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -511,8 +494,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 248,\n+\t.result_start_idx = 242,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26\n \t},\n@@ -531,11 +513,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 274,\n+\t.result_start_idx = 268,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 4, , table: ext_full_act_record.one_tag */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -552,11 +533,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 312,\n+\t.result_start_idx = 305,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 5, , table: int_flow_counter_tbl.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -573,8 +553,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 350,\n+\t.result_start_idx = 342,\n \t.result_bit_size = 64,\n \t.result_num_fields = 1\n \t},\n@@ -593,8 +572,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 351,\n+\t.result_start_idx = 343,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n \t},\n@@ -613,8 +591,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 352,\n+\t.result_start_idx = 344,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n \t},\n@@ -633,11 +610,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,\n \t.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 353,\n+\t.record_size = 16,\n+\t.result_start_idx = 345,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 5, , table: int_full_act_record.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -654,8 +631,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 365,\n+\t.result_start_idx = 356,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26\n \t},\n@@ -674,11 +650,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 391,\n+\t.result_start_idx = 382,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* act_tid: 6, , table: int_flow_counter_tbl.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -695,8 +670,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 429,\n+\t.result_start_idx = 419,\n \t.result_bit_size = 64,\n \t.result_num_fields = 1\n \t},\n@@ -715,11 +689,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 430,\n+\t.record_size = 16,\n+\t.result_start_idx = 420,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 3\n+\t.encap_num_fields = 2\n \t},\n \t{ /* act_tid: 6, , table: sp_smac_ipv6.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -736,11 +710,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 433,\n+\t.record_size = 24,\n+\t.result_start_idx = 422,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 3\n+\t.encap_num_fields = 2\n \t},\n \t{ /* act_tid: 6, , table: int_tun_encap_record.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -757,11 +731,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 436,\n+\t.record_size = 64,\n+\t.result_start_idx = 424,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 30\n \t},\n \t{ /* act_tid: 6, , table: int_full_act_record.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -778,8 +752,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 448,\n+\t.result_start_idx = 454,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26\n \t},\n@@ -798,11 +771,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 474,\n+\t.result_start_idx = 480,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 30\n \t}\n };\n \n@@ -1033,22 +1005,26 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t},\n \t/* act_tid: 1, , table: int_vtag_encap_record.0 */\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n \t},\n \t{\n \t.description = \"ecv_l2_en\",\n@@ -1057,26 +1033,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\t1}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n \t.description = \"vtag_tpid\",\n@@ -1088,13 +1060,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \tBNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}\n+\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}\n \t},\n \t{\n \t.description = \"vtag_de\",\n@@ -1103,19 +1075,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 80,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}\n \t},\n \t/* act_tid: 1, , table: int_full_act_record.0 */\n \t{\n@@ -1628,20 +1594,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}\n \t},\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -1649,25 +1617,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.description = \"ecv_l2_en\",\n \t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_L2_EN_YES}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -1678,8 +1644,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -1690,14 +1656,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 0,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2105,20 +2065,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2126,25 +2088,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.description = \"ecv_l2_en\",\n \t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_L2_EN_YES}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2155,8 +2115,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2167,14 +2127,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 0,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2268,20 +2222,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t},\n \t/* act_tid: 3, , table: int_encap_mac_record.0 */\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\t1}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2294,24 +2250,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \tULP_WP_SYM_ECV_L2_EN_YES}\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\t1}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n \t.description = \"vtag_tpid\",\n@@ -2320,8 +2274,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2332,14 +2286,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 80,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2806,20 +2754,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2827,25 +2777,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.description = \"ecv_l2_en\",\n \t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_L2_EN_YES}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2856,8 +2804,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2868,14 +2816,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 0,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -2888,23 +2830,27 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t},\n \t/* act_tid: 4, , table: int_vtag_encap_record.0 */\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\t1}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n+\t},\n \t{\n \t.description = \"ecv_l2_en\",\n \t.field_bit_size = 1,\n@@ -2912,26 +2858,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\t1}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n \t.description = \"vtag_tpid\",\n@@ -2943,13 +2885,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \tBNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}\n+\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}\n \t},\n \t{\n \t.description = \"vtag_de\",\n@@ -2958,19 +2900,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 80,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}\n \t},\n \t/* act_tid: 4, , table: int_full_act_record.0 */\n \t{\n@@ -3350,20 +3286,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}\n \t},\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -3371,25 +3309,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.description = \"ecv_l2_en\",\n \t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_L2_EN_YES}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -3400,8 +3336,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -3412,14 +3348,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 0,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -3620,22 +3550,26 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}\n \t},\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\t1}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n \t},\n \t{\n \t.description = \"ecv_l2_en\",\n@@ -3644,26 +3578,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\t1}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n \t.description = \"vtag_tpid\",\n@@ -3675,13 +3605,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \tBNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}\n+\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}\n \t},\n \t{\n \t.description = \"vtag_de\",\n@@ -3690,19 +3620,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 0,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t(BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}\n \t},\n \t/* act_tid: 5, , table: int_flow_counter_tbl.0 */\n \t{\n@@ -3733,20 +3657,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t},\n \t/* act_tid: 5, , table: int_encap_mac_record.dummy */\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\t1}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -3759,24 +3685,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \tULP_WP_SYM_ECV_L2_EN_YES}\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\t1}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n \t.description = \"vtag_tpid\",\n@@ -3785,8 +3709,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -3797,14 +3721,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 80,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -4271,20 +4189,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -4292,25 +4212,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.description = \"ecv_l2_en\",\n \t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_L2_EN_YES}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -4321,8 +4239,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -4333,14 +4251,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 0,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n@@ -4356,76 +4268,62 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.description = \"smac\",\n \t.field_bit_size = 48,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff}\n+\t(BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,\n+\tBNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}\n \t},\n \t{\n \t.description = \"ipv4_src_addr\",\n \t.field_bit_size = 32,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff}\n-\t},\n-\t{\n-\t.description = \"reserved\",\n-\t.field_bit_size = 48,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t(BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff,\n+\tBNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff}\n \t},\n \t/* act_tid: 6, , table: sp_smac_ipv6.0 */\n \t{\n \t.description = \"smac\",\n \t.field_bit_size = 48,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff}\n+\t(BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,\n+\tBNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}\n \t},\n \t{\n \t.description = \"ipv6_src_addr\",\n \t.field_bit_size = 128,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff}\n-\t},\n-\t{\n-\t.description = \"reserved\",\n-\t.field_bit_size = 16,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t(BNXT_ULP_ENC_FIELD_IPV6_SADDR >> 8) & 0xff,\n+\tBNXT_ULP_ENC_FIELD_IPV6_SADDR & 0xff}\n \t},\n \t/* act_tid: 6, , table: int_tun_encap_record.0 */\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n \t.field_opr1 = {\n-\tULP_WP_SYM_ECV_TUN_TYPE_VXLAN}\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}\n+\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}\n \t},\n \t{\n \t.description = \"ecv_l2_en\",\n@@ -4433,81 +4331,478 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n \t.field_opr1 = {\n-\t1}\n+\tULP_WP_SYM_ECV_L2_EN_YES}\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}\n+\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n \t.field_opr1 = {\n-\t1}\n+\tULP_WP_SYM_ECV_TUN_TYPE_VXLAN}\n \t},\n \t{\n-\t.description = \"encap_l2_dmac\",\n+\t.description = \"enc_eth_dmac\",\n \t.field_bit_size = 48,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff}\n+\t(BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,\n+\tBNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}\n \t},\n \t{\n-\t.description = \"encap_vtag\",\n-\t.field_bit_size = 0,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,\n+\t.description = \"enc_o_vlan_tag\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_o_vlan_type\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_i_vlan_tag\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_i_vlan_type\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_ihl\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_tos\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_pkt_id\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_frag\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_ttl\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_proto\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_daddr\",\n+\t.field_bit_size = 32,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_vtc\",\n+\t.field_bit_size = 32,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_zero\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ZERO,\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t},\n \t{\n-\t.description = \"encap_ip\",\n-\t.field_bit_size = 0,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,\n+\t.description = \"enc_ipv6_proto\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_ttl\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_daddr\",\n+\t.field_bit_size = 128,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_udp_sport\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_udp_dport\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_vxlan_flags\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t},\n \t{\n-\t.description = \"encap_udp\",\n-\t.field_bit_size = 32,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.description = \"enc_vxlan_rsvd0\",\n+\t.field_bit_size = 24,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t},\n \t{\n-\t.description = \"encap_tun\",\n-\t.field_bit_size = 0,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,\n+\t.description = \"enc_vxlan_vni\",\n+\t.field_bit_size = 24,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_vxlan_rsvd1\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t},\n \t/* act_tid: 6, , table: int_full_act_record.0 */\n \t{\n@@ -4857,29 +5152,27 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n \t.field_opr1 = {\n-\tULP_WP_SYM_ECV_TUN_TYPE_VXLAN}\n+\tULP_WP_SYM_ECV_VALID_YES}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}\n+\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}\n \t},\n \t{\n \t.description = \"ecv_l2_en\",\n@@ -4887,79 +5180,478 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n \t.field_opr1 = {\n-\t1}\n+\tULP_WP_SYM_ECV_L2_EN_YES}\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}\n+\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,\n+\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n \t.field_opr1 = {\n-\t1}\n+\tULP_WP_SYM_ECV_TUN_TYPE_VXLAN}\n \t},\n \t{\n-\t.description = \"encap_l2_dmac\",\n+\t.description = \"enc_eth_dmac\",\n \t.field_bit_size = 48,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff}\n+\t(BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,\n+\tBNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}\n \t},\n \t{\n-\t.description = \"encap_vtag\",\n-\t.field_bit_size = 0,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,\n+\t.description = \"enc_o_vlan_tag\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_o_vlan_type\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_i_vlan_tag\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_i_vlan_type\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_ihl\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_tos\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_pkt_id\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_frag\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_ttl\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_proto\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv4_daddr\",\n+\t.field_bit_size = 32,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_vtc\",\n+\t.field_bit_size = 32,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_zero\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ZERO,\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t},\n \t{\n-\t.description = \"encap_ip\",\n-\t.field_bit_size = 0,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,\n+\t.description = \"enc_ipv6_proto\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_ttl\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_ipv6_daddr\",\n+\t.field_bit_size = 128,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_udp_sport\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_udp_dport\",\n+\t.field_bit_size = 16,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_vxlan_flags\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n+\t.field_opr1 = {\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n+\t},\n+\t{\n+\t.description = \"enc_vxlan_rsvd0\",\n+\t.field_bit_size = 24,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,\n-\t\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,\n-\t\tBNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t},\n \t{\n-\t.description = \"encap_udp\",\n-\t.field_bit_size = 32,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.description = \"enc_vxlan_vni\",\n+\t.field_bit_size = 24,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t},\n \t{\n-\t.description = \"encap_tun\",\n-\t.field_bit_size = 80,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,\n+\t.description = \"enc_vxlan_rsvd1\",\n+\t.field_bit_size = 8,\n+\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,\n \t.field_opr1 = {\n-\t(BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,\n-\tBNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff}\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,\n+\t((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,\n+\t(uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},\n+\t.field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,\n+\t.field_opr2 = {\n+\t\t(BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff,\n+\t\tBNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff},\n+\t.field_src3 = BNXT_ULP_FIELD_SRC_SKIP\n \t}\n };\n \ndiff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c\nindex 7b6ee03a4b..7203dcf1fb 100644\n--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c\n+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c\n@@ -3,7 +3,7 @@\n * All rights reserved.\n */\n \n-/* date: Mon May 17 15:54:03 2021 */\n+/* date: Fri May 28 16:46:46 2021 */\n \n #include \"ulp_template_db_enum.h\"\n #include \"ulp_template_db_field.h\"\n@@ -80,7 +80,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 0,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -102,7 +101,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 1,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -120,8 +118,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 2,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 1, , table: l2_cntxt_tcam.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -139,7 +136,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 6,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -164,7 +160,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 19,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -188,7 +183,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 24,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -206,8 +200,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 3,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 1, , table: control.2 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,\n@@ -225,8 +218,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.func_opr1 = BNXT_ULP_RF_IDX_FLOW_SIG_ID,\n \t\t.func_src2 = BNXT_ULP_FUNC_SRC_COMP_FIELD,\n \t\t.func_opr2 = BNXT_ULP_CF_IDX_FLOW_SIG_ID,\n-\t\t.func_dst_opr = BNXT_ULP_RF_IDX_CC },\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t\t.func_dst_opr = BNXT_ULP_RF_IDX_CC }\n \t},\n \t{ /* class_tid: 1, , table: profile_tcam.ipv4 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -244,7 +236,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 27,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n@@ -271,7 +262,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 70,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n@@ -298,7 +288,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 113,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n@@ -324,7 +313,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 156,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -346,7 +334,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 159,\n \t.blob_key_bit_size = 176,\n \t.key_bit_size = 176,\n@@ -368,7 +355,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 169,\n \t.blob_key_bit_size = 448,\n \t.key_bit_size = 448,\n@@ -390,7 +376,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 179,\n \t.blob_key_bit_size = 416,\n \t.key_bit_size = 416,\n@@ -412,7 +397,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 190,\n \t.blob_key_bit_size = 448,\n \t.key_bit_size = 448,\n@@ -434,7 +418,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 201,\n \t.blob_key_bit_size = 200,\n \t.key_bit_size = 200,\n@@ -456,7 +439,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 212,\n \t.blob_key_bit_size = 448,\n \t.key_bit_size = 448,\n@@ -479,7 +461,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 223,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n@@ -497,8 +478,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 25,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 2, , table: l2_cntxt_tcam.1 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -516,7 +496,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 225,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -541,7 +520,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 238,\n \t.blob_key_bit_size = 16,\n \t.key_bit_size = 16,\n@@ -559,8 +537,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n \t\t.cond_start_idx = 26,\n \t\t.cond_nums = 1 },\n-\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP\n \t},\n \t{ /* class_tid: 2, , table: mac_addr_cache.rd */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,\n@@ -576,7 +553,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 240,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -594,8 +570,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 27,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 2, , table: l2_cntxt_tcam.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -613,7 +588,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 245,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -638,7 +612,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 258,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -662,7 +635,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 263,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -680,8 +652,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 28,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 2, , table: profile_tcam.f2 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -701,7 +672,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.pri_operand = 1,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 266,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n@@ -725,7 +695,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 309,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -747,7 +716,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 312,\n \t.blob_key_bit_size = 112,\n \t.key_bit_size = 112,\n@@ -769,7 +737,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 320,\n \t.blob_key_bit_size = 448,\n \t.key_bit_size = 448,\n@@ -792,7 +759,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 328,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -814,7 +780,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 329,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -832,8 +797,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 32,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 3, , table: l2_cntxt_tcam.0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -851,7 +815,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 334,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -876,7 +839,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 347,\n \t.blob_key_bit_size = 73,\n \t.key_bit_size = 73,\n@@ -899,7 +861,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 352,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -917,8 +878,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 33,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 3, , table: control.conflict_check */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,\n@@ -936,8 +896,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.func_opr1 = BNXT_ULP_RF_IDX_FLOW_SIG_ID,\n \t\t.func_src2 = BNXT_ULP_FUNC_SRC_COMP_FIELD,\n \t\t.func_opr2 = BNXT_ULP_CF_IDX_FLOW_SIG_ID,\n-\t\t.func_dst_opr = BNXT_ULP_RF_IDX_CC },\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t\t.func_dst_opr = BNXT_ULP_RF_IDX_CC }\n \t},\n \t{ /* class_tid: 3, , table: profile_tcam.ipv4 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -955,7 +914,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 355,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n@@ -982,7 +940,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 398,\n \t.blob_key_bit_size = 81,\n \t.key_bit_size = 81,\n@@ -1007,7 +964,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 441,\n \t.blob_key_bit_size = 14,\n \t.key_bit_size = 14,\n@@ -1029,7 +985,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 444,\n \t.blob_key_bit_size = 176,\n \t.key_bit_size = 176,\n@@ -1051,7 +1006,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 454,\n \t.blob_key_bit_size = 448,\n \t.key_bit_size = 448,\n@@ -1073,7 +1027,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 464,\n \t.blob_key_bit_size = 416,\n \t.key_bit_size = 416,\n@@ -1095,7 +1048,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 475,\n \t.blob_key_bit_size = 448,\n \t.key_bit_size = 448,\n@@ -1120,7 +1072,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 292,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26\n@@ -1139,7 +1090,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 486,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1157,8 +1107,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 41,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -1178,7 +1127,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.pri_operand = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 487,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -1203,7 +1151,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 500,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1225,7 +1172,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 335,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1243,7 +1189,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 336,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1261,7 +1206,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 337,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1275,8 +1219,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,\n \t\t.cond_start_idx = 42,\n \t\t.cond_nums = 1 },\n-\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP\n \t},\n \t{ /* class_tid: 4, , table: int_full_act_record.egr_vfr */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -1294,7 +1237,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 338,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n@@ -1314,7 +1256,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 501,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1332,8 +1273,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 43,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 4, , table: l2_cntxt_tcam_bypass.egr_vfr */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -1351,7 +1291,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 502,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -1376,7 +1315,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 515,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1399,7 +1337,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 516,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1417,8 +1354,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 44,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -1436,7 +1372,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 517,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -1461,7 +1396,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 530,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1486,7 +1420,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 398,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n@@ -1505,7 +1438,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 424,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1523,7 +1455,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 425,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1541,7 +1472,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,\n \t.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 426,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1562,7 +1492,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 427,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n@@ -1582,7 +1511,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 531,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1600,8 +1528,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 47,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -1619,7 +1546,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 532,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -1644,7 +1570,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 545,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1666,7 +1591,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,\n \t.tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 470,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1684,7 +1608,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,\n \t.tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 471,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1702,7 +1625,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,\n \t.tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 472,\n \t.result_bit_size = 32,\n \t.result_num_fields = 1\n@@ -1723,7 +1645,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.result_start_idx = 473,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26,\n@@ -1746,7 +1667,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.pri_operand = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 546,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -1771,7 +1691,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 559,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1789,8 +1708,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t\t.cond_start_idx = 48,\n \t\t.cond_nums = 1 },\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,\n-\t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE\n+\t.fdb_operand = BNXT_ULP_RF_IDX_RID\n \t},\n \t{ /* class_tid: 5, , table: l2_cntxt_tcam_bypass.vfr_egr0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,\n@@ -1808,7 +1726,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.fdb_operand = BNXT_ULP_RF_IDX_RID,\n \t.pri_opcode = BNXT_ULP_PRI_OPC_CONST,\n \t.pri_operand = 0,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 560,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n@@ -1833,7 +1750,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,\n \t.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 573,\n \t.blob_key_bit_size = 8,\n \t.key_bit_size = 8,\n@@ -1858,11 +1774,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n+\t.record_size = 8,\n \t.result_start_idx = 529,\n \t.result_bit_size = 0,\n \t.result_num_fields = 0,\n-\t.encap_num_fields = 12\n+\t.encap_num_fields = 11\n \t},\n \t{ /* class_tid: 5, , table: int_full_act_record.vfr_egr0 */\n \t.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,\n@@ -1880,8 +1796,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 541,\n+\t.result_start_idx = 540,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26\n \t},\n@@ -1901,8 +1816,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,\n \t.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n-\t.result_start_idx = 567,\n+\t.result_start_idx = 566,\n \t.result_bit_size = 128,\n \t.result_num_fields = 26\n \t},\n@@ -1923,12 +1837,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.pri_operand = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 574,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 593,\n+\t.result_start_idx = 592,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.ident_start_idx = 26,\n@@ -1951,12 +1864,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {\n \t.pri_operand = 0,\n \t.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,\n \t.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,\n-\t.byte_order = BNXT_ULP_BYTE_ORDER_LE,\n \t.key_start_idx = 587,\n \t.blob_key_bit_size = 167,\n \t.key_bit_size = 167,\n \t.key_num_fields = 13,\n-\t.result_start_idx = 606,\n+\t.result_start_idx = 605,\n \t.result_bit_size = 64,\n \t.result_num_fields = 13,\n \t.ident_start_idx = 26,\n@@ -2522,17 +2434,13 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {\n \t\t.description = \"tun_hdr_type\",\n \t\t.field_bit_size = 4,\n \t\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t\t.field_opr1 = {\n-\t\tULP_WP_SYM_TUN_HDR_TYPE_NONE}\n+\t\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t\t},\n \t.field_info_spec = {\n \t\t.description = \"tun_hdr_type\",\n \t\t.field_bit_size = 4,\n \t\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t\t.field_opr1 = {\n-\t\tULP_WP_SYM_TUN_HDR_TYPE_NONE}\n+\t\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t\t}\n \t},\n \t{\n@@ -6207,17 +6115,13 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {\n \t\t.description = \"tun_hdr_type\",\n \t\t.field_bit_size = 4,\n \t\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t\t.field_opr1 = {\n-\t\tULP_WP_SYM_TUN_HDR_TYPE_NONE}\n+\t\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t\t},\n \t.field_info_spec = {\n \t\t.description = \"tun_hdr_type\",\n \t\t.field_bit_size = 4,\n \t\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t\t.field_opr1 = {\n-\t\tULP_WP_SYM_TUN_HDR_TYPE_NONE}\n+\t\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t\t}\n \t},\n \t{\n@@ -8046,17 +7950,13 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {\n \t\t.description = \"tun_hdr_type\",\n \t\t.field_bit_size = 4,\n \t\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t\t.field_opr1 = {\n-\t\tULP_WP_SYM_TUN_HDR_TYPE_NONE}\n+\t\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t\t},\n \t.field_info_spec = {\n \t\t.description = \"tun_hdr_type\",\n \t\t.field_bit_size = 4,\n \t\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t\t.field_opr1 = {\n-\t\tULP_WP_SYM_TUN_HDR_TYPE_NONE}\n+\t\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t\t}\n \t},\n \t{\n@@ -16093,22 +15993,26 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {\n \t},\n \t/* class_tid: 5, , table: int_vtag_encap_record.vfr_egr0 */\n \t{\n-\t.description = \"ecv_tun_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_valid\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\t1}\n \t},\n \t{\n-\t.description = \"ecv_l4_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_custom_en\",\n+\t.field_bit_size = 1,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_l3_type\",\n-\t.field_bit_size = 3,\n+\t.description = \"ecv_vtag_type\",\n+\t.field_bit_size = 4,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n+\t.field_opr1 = {\n+\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n \t},\n \t{\n \t.description = \"ecv_l2_en\",\n@@ -16117,26 +16021,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_vtag_type\",\n-\t.field_bit_size = 4,\n+\t.description = \"ecv_l3_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\tULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_custom_en\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_l4_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"ecv_valid\",\n-\t.field_bit_size = 1,\n+\t.description = \"ecv_tun_type\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CONST,\n-\t.field_opr1 = {\n-\t1}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n \t.description = \"vtag_tpid\",\n@@ -16148,13 +16048,10 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {\n \t\t0x00}\n \t},\n \t{\n-\t.description = \"vtag_vid\",\n-\t.field_bit_size = 12,\n+\t.description = \"vtag_pcp\",\n+\t.field_bit_size = 3,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_CF,\n-\t.field_opr1 = {\n-\t(BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,\n-\tBNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff}\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n \t.description = \"vtag_de\",\n@@ -16163,16 +16060,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {\n \t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n \t},\n \t{\n-\t.description = \"vtag_pcp\",\n-\t.field_bit_size = 3,\n-\t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n-\t},\n-\t{\n-\t.description = \"spare\",\n-\t.field_bit_size = 80,\n+\t.description = \"vtag_vid\",\n+\t.field_bit_size = 12,\n \t.field_opc = BNXT_ULP_FIELD_OPC_SRC1,\n-\t.field_src1 = BNXT_ULP_FIELD_SRC_ZERO\n+\t.field_src1 = BNXT_ULP_FIELD_SRC_CF,\n+\t.field_opr1 = {\n+\t(BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,\n+\tBNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff}\n \t},\n \t/* class_tid: 5, , table: int_full_act_record.vfr_egr0 */\n \t{\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c\nindex 039c9c2a6b..1cb52e9bfa 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.c\n@@ -116,7 +116,7 @@ ulp_flow_db_resource_func_get(struct ulp_fdb_resource_info *res_info)\n \n \tfunc = (((res_info->nxt_resource_idx & ULP_FLOW_DB_RES_FUNC_MASK) >>\n \t\t ULP_FLOW_DB_RES_FUNC_BITS) << ULP_FLOW_DB_RES_FUNC_UPPER);\n-\t/* The reource func is split into upper and lower */\n+\t/* The resource func is split into upper and lower */\n \tif (func & ULP_FLOW_DB_RES_FUNC_NEED_LOWER)\n \t\treturn (func | res_info->resource_func_lower);\n \treturn func;\n@@ -622,7 +622,7 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,\n \n \tif (params->critical_resource && fid_resource->resource_em_handle) {\n \t\tBNXT_TF_DBG(DEBUG, \"Ignore multiple critical resources\\n\");\n-\t\t/* Ignore the multiple criticial resources */\n+\t\t/* Ignore the multiple critical resources */\n \t\tparams->critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO;\n \t}\n \n@@ -674,7 +674,7 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,\n * flow_type [in] Specify it is regular or default flow\n * fid [in] The index to the flow entry\n * params [in/out] The contents to be copied into params.\n- * Onlythe critical_resource needs to be set by the caller.\n+ * Only the critical_resource needs to be set by the caller.\n *\n * Returns 0 on success and negative on failure.\n */\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_flow_db.h b/drivers/net/bnxt/tf_ulp/ulp_flow_db.h\nindex 8680ee8f65..6dbec92745 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_flow_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_flow_db.h\n@@ -18,7 +18,7 @@\n \n /*\n * Structure for the flow database resource information\n- * The below structure is based on the below paritions\n+ * The below structure is based on the below partitions\n * nxt_resource_idx = dir[31],resource_func_upper[30:28],nxt_resource_idx[27:0]\n * If resource_func is EM_TBL then use resource_em_handle.\n * Else the other part of the union is used and\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c b/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c\nindex bc5627ec5b..5f5b5d639e 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_ha_mgr.c\n@@ -185,7 +185,7 @@ ulp_ha_mgr_timer_cb(void *arg __rte_unused)\n \trc = ulp_ha_mgr_state_get(ulp_ctx, &curr_state);\n \tif (rc) {\n \t\t/*\n-\t\t * This shouldn't happen, if it does, resetart the timer\n+\t\t * This shouldn't happen, if it does, reset the timer\n \t\t * and try again next time.\n \t\t */\n \t\tBNXT_TF_DBG(ERR, \"Failed(%d) to get state.\\n\",\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\nindex 6d804c7ef9..2687a545f3 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c\n@@ -1010,7 +1010,7 @@ ulp_mapper_field_src_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t\treturn -EINVAL;\n \t\t}\n \t\tidx = tfp_be_to_cpu_16(idx);\n-\t\tif (idx >= BNXT_ULP_CF_IDX_LAST || bytelen > sizeof(uint32_t)) {\n+\t\tif (idx >= BNXT_ULP_CF_IDX_LAST || bytelen > sizeof(uint64_t)) {\n \t\t\tBNXT_TF_DBG(ERR, \"comp field [%d] read oob %d\\n\", idx,\n \t\t\t\t bytelen);\n \t\t\treturn -EINVAL;\n@@ -1215,8 +1215,47 @@ ulp_mapper_field_src_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t\tBNXT_TF_DBG(ERR, \"field port table failed\\n\");\n \t\t\treturn -EINVAL;\n \t\t}\n+\t\tbreak;\n+\tcase BNXT_ULP_FIELD_SRC_ENC_HDR_BIT:\n+\t\tif (!ulp_operand_read(field_opr,\n+\t\t\t\t (uint8_t *)&lregval, sizeof(uint64_t))) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Header bit read failed\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tlregval = tfp_be_to_cpu_64(lregval);\n+\t\tif (ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits, lregval)) {\n+\t\t\t*val = mapper_fld_one;\n+\t\t\t*value = 1;\n+\t\t} else {\n+\t\t\t*val = mapper_fld_zeros;\n+\t\t}\n+\t\tbreak;\n+\tcase BNXT_ULP_FIELD_SRC_ENC_FIELD:\n+\t\tif (!ulp_operand_read(field_opr,\n+\t\t\t\t (uint8_t *)&idx, sizeof(uint16_t))) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Header field read failed\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tidx = tfp_be_to_cpu_16(idx);\n+\t\t/* get the index from the global field list */\n+\t\tif (idx >= BNXT_ULP_ENC_FIELD_LAST) {\n+\t\t\tBNXT_TF_DBG(ERR, \"invalid encap field tbl idx %d\\n\",\n+\t\t\t\t idx);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tbuffer = parms->enc_field[idx].spec;\n+\t\tfield_size = parms->enc_field[idx].size;\n+\t\tif (bytelen > field_size) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Encap field[%d] size small %u\\n\",\n+\t\t\t\t idx, field_size);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\t*val = &buffer[field_size - bytelen];\n+\t\tbreak;\n \tcase BNXT_ULP_FIELD_SRC_SKIP:\n \t\t/* do nothing */\n+\t\t*val = mapper_fld_zeros;\n+\t\t*val_len = 0;\n \t\tbreak;\n \tcase BNXT_ULP_FIELD_SRC_REJECT:\n \t\treturn -EINVAL;\n@@ -1270,6 +1309,8 @@ static int32_t ulp_mapper_field_blob_write(enum bnxt_ulp_field_src fld_src,\n \t\t\tBNXT_TF_DBG(ERR, \"encap blob push failed\\n\");\n \t\t\treturn -EINVAL;\n \t\t}\n+\t} else if (fld_src == BNXT_ULP_FIELD_SRC_SKIP) {\n+\t\t/* do nothing */\n \t} else {\n \t\tif (!ulp_blob_push(blob, val, val_len)) {\n \t\t\tBNXT_TF_DBG(ERR, \"push of val1 failed\\n\");\n@@ -1465,7 +1506,7 @@ ulp_mapper_field_opc_process(struct bnxt_ulp_mapper_parms *parms,\n \tif (!rc) {\n #ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG\n #ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG_MAPPER\n-\t\tif (fld->field_src1 != BNXT_ULP_FIELD_SRC_ZERO)\n+\t\tif (fld->field_src1 != BNXT_ULP_FIELD_SRC_ZERO && val_len)\n \t\t\tulp_mapper_field_dump(name, fld, blob, write_idx, val,\n \t\t\t\t\t val_len);\n #endif\n@@ -1489,7 +1530,8 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,\n \t\t\t const char *name)\n {\n \tstruct bnxt_ulp_mapper_field_info *dflds;\n-\tuint32_t i, num_flds = 0, encap_flds = 0;\n+\tuint32_t i = 0, num_flds = 0, encap_flds = 0;\n+\tstruct ulp_blob encap_blob;\n \tint32_t rc = 0;\n \n \t/* Get the result field list */\n@@ -1506,33 +1548,60 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,\n \t\treturn -EINVAL;\n \t}\n \n-\t/* process the result fields, loop through them */\n-\tfor (i = 0; i < (num_flds + encap_flds); i++) {\n-\t\t/* set the swap index if encap swap bit is enabled */\n-\t\tif (parms->device_params->encap_byte_swap && encap_flds &&\n-\t\t i == num_flds)\n-\t\t\tulp_blob_encap_swap_idx_set(data);\n-\n-\t\t/* Process the result fields */\n+\t/* process the result fields */\n+\tfor (i = 0; i < num_flds; i++) {\n \t\trc = ulp_mapper_field_opc_process(parms, tbl->direction,\n \t\t\t\t\t\t &dflds[i], data, 0, name);\n \t\tif (rc) {\n-\t\t\tBNXT_TF_DBG(ERR, \"data field failed\\n\");\n+\t\t\tBNXT_TF_DBG(ERR, \"result field processing failed\\n\");\n \t\t\treturn rc;\n \t\t}\n \t}\n \n-\t/* if encap bit swap is enabled perform the bit swap */\n-\tif (parms->device_params->encap_byte_swap && encap_flds) {\n-\t\tulp_blob_perform_encap_swap(data);\n+\t/* process encap fields if any */\n+\tif (encap_flds) {\n+\t\tuint32_t pad = 0;\n+\t\t/* Initialize the encap blob */\n+\t\tif (!tbl->record_size) {\n+\t\t\tBNXT_TF_DBG(ERR, \"Encap tbl record size incorrect\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tif (!ulp_blob_init(&encap_blob,\n+\t\t\t\t ULP_BYTE_2_BITS(tbl->record_size),\n+\t\t\t\t parms->device_params->encap_byte_order)) {\n+\t\t\tBNXT_TF_DBG(ERR, \"blob inits failed.\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tfor (; i < encap_flds; i++) {\n+\t\t\trc = ulp_mapper_field_opc_process(parms, tbl->direction,\n+\t\t\t\t\t\t\t &dflds[i],\n+\t\t\t\t\t\t\t &encap_blob, 0, name);\n+\t\t\tif (rc) {\n+\t\t\t\tBNXT_TF_DBG(ERR,\n+\t\t\t\t\t \"encap field processing failed\\n\");\n+\t\t\t\treturn rc;\n+\t\t\t}\n+\t\t}\n+\t\t/* add the dynamic pad push */\n+\t\tpad = ULP_BYTE_2_BITS(tbl->record_size) -\n+\t\t\tulp_blob_data_len_get(&encap_blob);\n+\t\tulp_blob_pad_push(&encap_blob, pad);\n+\n+\t\t/* perform the 64 bit byte swap */\n+\t\tulp_blob_perform_64B_byte_swap(&encap_blob);\n+\t\t/* Append encap blob to the result blob */\n+\t\trc = ulp_blob_buffer_copy(data, &encap_blob);\n+\t\tif (rc) {\n+\t\t\tBNXT_TF_DBG(ERR, \"encap buffer copy failed\\n\");\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n #ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG\n #ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG_MAPPER\n-\t\tBNXT_TF_DBG(INFO, \"Dump after encap swap\\n\");\n-\t\tulp_mapper_blob_dump(data);\n+\tBNXT_TF_DBG(DEBUG, \"Result dump\\n\");\n+\tulp_mapper_blob_dump(data);\n #endif\n #endif\n-\t}\n-\n \treturn rc;\n }\n \n@@ -1934,11 +2003,14 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n \t\treturn -EINVAL;\n \t}\n \n-\tif (!ulp_blob_init(key, tbl->blob_key_bit_size, tbl->byte_order) ||\n-\t !ulp_blob_init(mask, tbl->blob_key_bit_size, tbl->byte_order) ||\n-\t !ulp_blob_init(&data, tbl->result_bit_size, dparms->byte_order) ||\n+\tif (!ulp_blob_init(key, tbl->blob_key_bit_size,\n+\t\t\t dparms->key_byte_order) ||\n+\t !ulp_blob_init(mask, tbl->blob_key_bit_size,\n+\t\t\t dparms->key_byte_order) ||\n+\t !ulp_blob_init(&data, tbl->result_bit_size,\n+\t\t\t dparms->result_byte_order) ||\n \t !ulp_blob_init(&update_data, tbl->result_bit_size,\n-\t\t\t dparms->byte_order)) {\n+\t\t\t dparms->result_byte_order)) {\n \t\tBNXT_TF_DBG(ERR, \"blob inits failed.\\n\");\n \t\treturn -EINVAL;\n \t}\n@@ -2145,9 +2217,9 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n \n \t/* Initialize the key/result blobs */\n \tif (!ulp_blob_init(&key, tbl->blob_key_bit_size,\n-\t\t\t tbl->byte_order) ||\n+\t\t\t dparms->key_byte_order) ||\n \t !ulp_blob_init(&data, tbl->result_bit_size,\n-\t\t\t tbl->byte_order)) {\n+\t\t\t dparms->result_byte_order)) {\n \t\tBNXT_TF_DBG(ERR, \"blob inits failed.\\n\");\n \t\treturn -EINVAL;\n \t}\n@@ -2336,7 +2408,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n \n \t/* Initialize the blob data */\n \tif (!ulp_blob_init(&data, bit_size,\n-\t\t\t parms->device_params->byte_order)) {\n+\t\t\t parms->device_params->result_byte_order)) {\n \t\tBNXT_TF_DBG(ERR, \"Failed to initialize index table blob\\n\");\n \t\treturn -EINVAL;\n \t}\n@@ -2627,7 +2699,7 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n \ttfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session);\n \t/* Initialize the blob data */\n \tif (!ulp_blob_init(&data, tbl->result_bit_size,\n-\t\t\t parms->device_params->byte_order)) {\n+\t\t\t parms->device_params->result_byte_order)) {\n \t\tBNXT_TF_DBG(ERR, \"Failed initial index table blob\\n\");\n \t\treturn -EINVAL;\n \t}\n@@ -2658,7 +2730,7 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n \tcase BNXT_ULP_IF_TBL_OPC_RD_COMP_FIELD:\n \t\t/* Initialize the result blob */\n \t\tif (!ulp_blob_init(&res_blob, tbl->result_bit_size,\n-\t\t\t\t parms->device_params->byte_order)) {\n+\t\t\t\t parms->device_params->result_byte_order)) {\n \t\t\tBNXT_TF_DBG(ERR, \"Failed initial result blob\\n\");\n \t\t\treturn -EINVAL;\n \t\t}\n@@ -2747,7 +2819,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,\n \t}\n \n \tif (!ulp_blob_init(&key, tbl->key_bit_size,\n-\t\t\t parms->device_params->byte_order)) {\n+\t\t\t parms->device_params->key_byte_order)) {\n \t\tBNXT_TF_DBG(ERR, \"Failed to alloc blob\\n\");\n \t\treturn -EINVAL;\n \t}\n@@ -3252,6 +3324,26 @@ ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms,\n \t\t}\n \t\t*res = (mtype == BNXT_ULP_FLOW_MEM_TYPE_INT) ? 1 : 0;\n \t\tbreak;\n+\tcase BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET:\n+\t\tif (operand < BNXT_ULP_HDR_BIT_LAST) {\n+\t\t\t*res = ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits,\n+\t\t\t\t\t\toperand);\n+\t\t} else {\n+\t\t\tBNXT_TF_DBG(ERR, \"header bit out of bounds %d\\n\",\n+\t\t\t\t operand);\n+\t\t\trc = -EINVAL;\n+\t\t}\n+\t\tbreak;\n+\tcase BNXT_ULP_COND_OPC_ENC_HDR_BIT_NOT_SET:\n+\t\tif (operand < BNXT_ULP_HDR_BIT_LAST) {\n+\t\t\t*res = !ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits,\n+\t\t\t\t\t\t operand);\n+\t\t} else {\n+\t\t\tBNXT_TF_DBG(ERR, \"header bit out of bounds %d\\n\",\n+\t\t\t\t operand);\n+\t\t\trc = -EINVAL;\n+\t\t}\n+\t\tbreak;\n \tdefault:\n \t\tBNXT_TF_DBG(ERR, \"Invalid conditional opcode %d\\n\", opc);\n \t\trc = -EINVAL;\n@@ -3864,8 +3956,10 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,\n \tparms.act_prop = cparms->act_prop;\n \tparms.act_bitmap = cparms->act;\n \tparms.hdr_bitmap = cparms->hdr_bitmap;\n+\tparms.enc_hdr_bitmap = cparms->enc_hdr_bitmap;\n \tparms.regfile = ®file;\n \tparms.hdr_field = cparms->hdr_field;\n+\tparms.enc_field = cparms->enc_field;\n \tparms.fld_bitmap = cparms->fld_bitmap;\n \tparms.comp_fld = cparms->comp_fld;\n \tparms.ulp_ctx = ulp_ctx;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h\nindex d4d6969bb5..4d6ba0f73a 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h\n@@ -44,7 +44,9 @@ struct bnxt_ulp_mapper_parms {\n \tstruct ulp_rte_act_prop\t\t\t*act_prop;\n \tstruct ulp_rte_act_bitmap\t\t*act_bitmap;\n \tstruct ulp_rte_hdr_bitmap\t\t*hdr_bitmap;\n+\tstruct ulp_rte_hdr_bitmap\t\t*enc_hdr_bitmap;\n \tstruct ulp_rte_hdr_field\t\t*hdr_field;\n+\tstruct ulp_rte_hdr_field\t\t*enc_field;\n \tstruct ulp_rte_field_bitmap\t\t*fld_bitmap;\n \tuint64_t\t\t\t\t*comp_fld;\n \tstruct ulp_regfile\t\t\t*regfile;\n@@ -67,7 +69,9 @@ struct bnxt_ulp_mapper_parms {\n struct bnxt_ulp_mapper_create_parms {\n \tuint32_t\t\t\tapp_priority;\n \tstruct ulp_rte_hdr_bitmap\t*hdr_bitmap;\n+\tstruct ulp_rte_hdr_bitmap\t*enc_hdr_bitmap;\n \tstruct ulp_rte_hdr_field\t*hdr_field;\n+\tstruct ulp_rte_hdr_field\t*enc_field;\n \tuint64_t\t\t\t*comp_fld;\n \tstruct ulp_rte_act_bitmap\t*act;\n \tstruct ulp_rte_act_prop\t\t*act_prop;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\nindex fadcd3873c..4e9968e5fa 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n@@ -40,6 +40,18 @@ ulp_rte_item_skip_void(const struct rte_flow_item **item, uint32_t increment)\n \treturn 0;\n }\n \n+/* Utility function to copy field spec items */\n+static struct ulp_rte_hdr_field *\n+ulp_rte_parser_fld_copy(struct ulp_rte_hdr_field *field,\n+\t\t\tconst void *buffer,\n+\t\t\tuint32_t size)\n+{\n+\tfield->size = size;\n+\tmemcpy(field->spec, buffer, field->size);\n+\tfield++;\n+\treturn field;\n+}\n+\n /* Utility function to update the field_bitmap */\n static void\n ulp_rte_parser_field_bitmap_update(struct ulp_rte_parser_params *params,\n@@ -883,7 +895,7 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,\n \t\t\t BNXT_ULP_HDR_BIT_II_VLAN);\n \t\tinner_flag = 1;\n \t} else {\n-\t\tBNXT_TF_DBG(ERR, \"Error Parsing:Vlan hdr found withtout eth\\n\");\n+\t\tBNXT_TF_DBG(ERR, \"Error Parsing:Vlan hdr found without eth\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n \t}\n \t/* Update the field protocol hdr bitmap */\n@@ -1726,6 +1738,184 @@ ulp_rte_rss_act_handler(const struct rte_flow_action *action_item,\n \treturn BNXT_TF_RC_SUCCESS;\n }\n \n+/* Function to handle the parsing of RTE Flow item eth Header. */\n+static void\n+ulp_rte_enc_eth_hdr_handler(struct ulp_rte_parser_params *params,\n+\t\t\t const struct rte_flow_item_eth *eth_spec)\n+{\n+\tstruct ulp_rte_hdr_field *field;\n+\tuint32_t size;\n+\n+\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_ETH_DMAC];\n+\tsize = sizeof(eth_spec->dst.addr_bytes);\n+\tfield = ulp_rte_parser_fld_copy(field, eth_spec->dst.addr_bytes, size);\n+\n+\tsize = sizeof(eth_spec->src.addr_bytes);\n+\tfield = ulp_rte_parser_fld_copy(field, eth_spec->src.addr_bytes, size);\n+\n+\tsize = sizeof(eth_spec->type);\n+\tfield = ulp_rte_parser_fld_copy(field, ð_spec->type, size);\n+\n+\tULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_ETH);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item vlan Header. */\n+static void\n+ulp_rte_enc_vlan_hdr_handler(struct ulp_rte_parser_params *params,\n+\t\t\t const struct rte_flow_item_vlan *vlan_spec,\n+\t\t\t uint32_t inner)\n+{\n+\tstruct ulp_rte_hdr_field *field;\n+\tuint32_t size;\n+\n+\tif (!inner) {\n+\t\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_O_VLAN_TCI];\n+\t\tULP_BITMAP_SET(params->enc_hdr_bitmap.bits,\n+\t\t\t BNXT_ULP_HDR_BIT_OO_VLAN);\n+\t} else {\n+\t\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_I_VLAN_TCI];\n+\t\tULP_BITMAP_SET(params->enc_hdr_bitmap.bits,\n+\t\t\t BNXT_ULP_HDR_BIT_OI_VLAN);\n+\t}\n+\n+\tsize = sizeof(vlan_spec->tci);\n+\tfield = ulp_rte_parser_fld_copy(field, &vlan_spec->tci, size);\n+\n+\tsize = sizeof(vlan_spec->inner_type);\n+\tfield = ulp_rte_parser_fld_copy(field, &vlan_spec->inner_type, size);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item ipv4 Header. */\n+static void\n+ulp_rte_enc_ipv4_hdr_handler(struct ulp_rte_parser_params *params,\n+\t\t\t const struct rte_flow_item_ipv4 *ip)\n+{\n+\tstruct ulp_rte_hdr_field *field;\n+\tuint32_t size;\n+\tuint8_t val8;\n+\n+\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV4_IHL];\n+\tsize = sizeof(ip->hdr.version_ihl);\n+\tif (!ip->hdr.version_ihl)\n+\t\tval8 = RTE_IPV4_VHL_DEF;\n+\telse\n+\t\tval8 = ip->hdr.version_ihl;\n+\tfield = ulp_rte_parser_fld_copy(field, &val8, size);\n+\n+\tsize = sizeof(ip->hdr.type_of_service);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.type_of_service, size);\n+\n+\tsize = sizeof(ip->hdr.packet_id);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.packet_id, size);\n+\n+\tsize = sizeof(ip->hdr.fragment_offset);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.fragment_offset, size);\n+\n+\tsize = sizeof(ip->hdr.time_to_live);\n+\tif (!ip->hdr.time_to_live)\n+\t\tval8 = BNXT_ULP_DEFAULT_TTL;\n+\telse\n+\t\tval8 = ip->hdr.time_to_live;\n+\tfield = ulp_rte_parser_fld_copy(field, &val8, size);\n+\n+\tsize = sizeof(ip->hdr.next_proto_id);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.next_proto_id, size);\n+\n+\tsize = sizeof(ip->hdr.src_addr);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.src_addr, size);\n+\n+\tsize = sizeof(ip->hdr.dst_addr);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.dst_addr, size);\n+\n+\tULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_IPV4);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item ipv6 Header. */\n+static void\n+ulp_rte_enc_ipv6_hdr_handler(struct ulp_rte_parser_params *params,\n+\t\t\t const struct rte_flow_item_ipv6 *ip)\n+{\n+\tstruct ulp_rte_hdr_field *field;\n+\tuint32_t size;\n+\tuint32_t val32;\n+\tuint8_t val8;\n+\n+\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW];\n+\tsize = sizeof(ip->hdr.vtc_flow);\n+\tif (!ip->hdr.vtc_flow)\n+\t\tval32 = rte_cpu_to_be_32(BNXT_ULP_IPV6_DFLT_VER);\n+\telse\n+\t\tval32 = ip->hdr.vtc_flow;\n+\tfield = ulp_rte_parser_fld_copy(field, &val32, size);\n+\n+\tsize = sizeof(ip->hdr.proto);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.proto, size);\n+\n+\tsize = sizeof(ip->hdr.hop_limits);\n+\tif (!ip->hdr.hop_limits)\n+\t\tval8 = BNXT_ULP_DEFAULT_TTL;\n+\telse\n+\t\tval8 = ip->hdr.hop_limits;\n+\tfield = ulp_rte_parser_fld_copy(field, &val8, size);\n+\n+\tsize = sizeof(ip->hdr.src_addr);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.src_addr, size);\n+\n+\tsize = sizeof(ip->hdr.dst_addr);\n+\tfield = ulp_rte_parser_fld_copy(field, &ip->hdr.dst_addr, size);\n+\n+\tULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_IPV6);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item UDP Header. */\n+static void\n+ulp_rte_enc_udp_hdr_handler(struct ulp_rte_parser_params *params,\n+\t\t\t const struct rte_flow_item_udp *udp_spec)\n+{\n+\tstruct ulp_rte_hdr_field *field;\n+\tuint32_t size;\n+\tuint8_t type = IPPROTO_UDP;\n+\n+\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_UDP_SPORT];\n+\tsize = sizeof(udp_spec->hdr.src_port);\n+\tfield = ulp_rte_parser_fld_copy(field, &udp_spec->hdr.src_port, size);\n+\n+\tsize = sizeof(udp_spec->hdr.dst_port);\n+\tfield = ulp_rte_parser_fld_copy(field, &udp_spec->hdr.dst_port, size);\n+\n+\tULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_UDP);\n+\n+\t/* Update thhe ip header protocol */\n+\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV4_PROTO];\n+\tulp_rte_parser_fld_copy(field, &type, sizeof(type));\n+\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV6_PROTO];\n+\tulp_rte_parser_fld_copy(field, &type, sizeof(type));\n+}\n+\n+/* Function to handle the parsing of RTE Flow item vxlan Header. */\n+static void\n+ulp_rte_enc_vxlan_hdr_handler(struct ulp_rte_parser_params *params,\n+\t\t\t struct rte_flow_item_vxlan *vxlan_spec)\n+{\n+\tstruct ulp_rte_hdr_field *field;\n+\tuint32_t size;\n+\n+\tfield = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_VXLAN_FLAGS];\n+\tsize = sizeof(vxlan_spec->flags);\n+\tfield = ulp_rte_parser_fld_copy(field, &vxlan_spec->flags, size);\n+\n+\tsize = sizeof(vxlan_spec->rsvd0);\n+\tfield = ulp_rte_parser_fld_copy(field, &vxlan_spec->rsvd0, size);\n+\n+\tsize = sizeof(vxlan_spec->vni);\n+\tfield = ulp_rte_parser_fld_copy(field, &vxlan_spec->vni, size);\n+\n+\tsize = sizeof(vxlan_spec->rsvd1);\n+\tfield = ulp_rte_parser_fld_copy(field, &vxlan_spec->rsvd1, size);\n+\n+\tULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_T_VXLAN);\n+}\n+\n /* Function to handle the parsing of RTE Flow action vxlan_encap Header. */\n int32_t\n ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n@@ -1733,23 +1923,14 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n {\n \tconst struct rte_flow_action_vxlan_encap *vxlan_encap;\n \tconst struct rte_flow_item *item;\n-\tconst struct rte_flow_item_eth *eth_spec;\n \tconst struct rte_flow_item_ipv4 *ipv4_spec;\n \tconst struct rte_flow_item_ipv6 *ipv6_spec;\n \tstruct rte_flow_item_vxlan vxlan_spec;\n \tuint32_t vlan_num = 0, vlan_size = 0;\n \tuint32_t ip_size = 0, ip_type = 0;\n \tuint32_t vxlan_size = 0;\n-\tuint8_t *buff;\n-\t/* IP header per byte - ver/hlen, TOS, ID, ID, FRAG, FRAG, TTL, PROTO */\n-\tconst uint8_t def_ipv4_hdr[] = {0x45, 0x00, 0x00, 0x01, 0x00,\n-\t\t\t\t 0x00, 0x40, 0x11};\n-\t/* IPv6 header per byte - vtc-flow,flow,zero,nexthdr-ttl */\n-\tconst uint8_t def_ipv6_hdr[] = {0x60, 0x00, 0x00, 0x01, 0x00,\n-\t\t\t\t0x00, 0x11, 0xf6};\n \tstruct ulp_rte_act_bitmap *act = ¶ms->act_bitmap;\n \tstruct ulp_rte_act_prop *ap = ¶ms->act_prop;\n-\tconst uint8_t *tmp_buff;\n \n \tvxlan_encap = action_item->conf;\n \tif (!vxlan_encap) {\n@@ -1771,18 +1952,10 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t\tBNXT_TF_DBG(ERR, \"Parse Error:vxlan encap does not have eth\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n \t}\n-\teth_spec = item->spec;\n-\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC];\n-\tulp_encap_buffer_copy(buff,\n-\t\t\t eth_spec->dst.addr_bytes,\n-\t\t\t BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,\n-\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n \n-\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC];\n-\tulp_encap_buffer_copy(buff,\n-\t\t\t eth_spec->src.addr_bytes,\n-\t\t\t BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,\n-\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n+\t/* Parse the ethernet header */\n+\tif (item->spec)\n+\t\tulp_rte_enc_eth_hdr_handler(params, item->spec);\n \n \t/* Goto the next item */\n \tif (!ulp_rte_item_skip_void(&item, 1))\n@@ -1791,11 +1964,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t/* May have vlan header */\n \tif (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {\n \t\tvlan_num++;\n-\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG];\n-\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t item->spec,\n-\t\t\t\t sizeof(struct rte_flow_item_vlan),\n-\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n+\t\tif (item->spec)\n+\t\t\tulp_rte_enc_vlan_hdr_handler(params, item->spec, 0);\n \n \t\tif (!ulp_rte_item_skip_void(&item, 1))\n \t\t\treturn BNXT_TF_RC_ERROR;\n@@ -1804,13 +1974,13 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t/* may have two vlan headers */\n \tif (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {\n \t\tvlan_num++;\n-\t\tmemcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG +\n-\t\t sizeof(struct rte_flow_item_vlan)],\n-\t\t item->spec,\n-\t\t sizeof(struct rte_flow_item_vlan));\n+\t\tif (item->spec)\n+\t\t\tulp_rte_enc_vlan_hdr_handler(params, item->spec, 1);\n+\n \t\tif (!ulp_rte_item_skip_void(&item, 1))\n \t\t\treturn BNXT_TF_RC_ERROR;\n \t}\n+\n \t/* Update the vlan count and size of more than one */\n \tif (vlan_num) {\n \t\tvlan_size = vlan_num * sizeof(struct rte_flow_item_vlan);\n@@ -1829,49 +1999,6 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t\tipv4_spec = item->spec;\n \t\tip_size = BNXT_ULP_ENCAP_IPV4_SIZE;\n \n-\t\t/* copy the ipv4 details */\n-\t\tif (ulp_buffer_is_empty(&ipv4_spec->hdr.version_ihl,\n-\t\t\t\t\tBNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS)) {\n-\t\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];\n-\t\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t\t def_ipv4_hdr,\n-\t\t\t\t\t BNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS +\n-\t\t\t\t\t BNXT_ULP_ENCAP_IPV4_ID_PROTO,\n-\t\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\t\t} else {\n-\t\t\t/* Total length being ignored in the ip hdr. */\n-\t\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];\n-\t\t\ttmp_buff = (const uint8_t *)&ipv4_spec->hdr.packet_id;\n-\t\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t\t tmp_buff,\n-\t\t\t\t\t BNXT_ULP_ENCAP_IPV4_ID_PROTO,\n-\t\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\t\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +\n-\t\t\t BNXT_ULP_ENCAP_IPV4_ID_PROTO];\n-\t\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t\t &ipv4_spec->hdr.version_ihl,\n-\t\t\t\t\t BNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS,\n-\t\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\t\t}\n-\n-\t\t/* Update the dst ip address in ip encap buffer */\n-\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +\n-\t\t BNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS +\n-\t\t BNXT_ULP_ENCAP_IPV4_ID_PROTO];\n-\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t (const uint8_t *)&ipv4_spec->hdr.dst_addr,\n-\t\t\t\t sizeof(ipv4_spec->hdr.dst_addr),\n-\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\n-\t\t/* Update the src ip address */\n-\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC +\n-\t\t\tBNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC -\n-\t\t\tsizeof(ipv4_spec->hdr.src_addr)];\n-\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t (const uint8_t *)&ipv4_spec->hdr.src_addr,\n-\t\t\t\t sizeof(ipv4_spec->hdr.src_addr),\n-\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\n \t\t/* Update the ip size details */\n \t\tip_size = tfp_cpu_to_be_32(ip_size);\n \t\tmemcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ],\n@@ -1885,6 +2012,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t\t/* update the computed field to notify it is ipv4 header */\n \t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG,\n \t\t\t\t 1);\n+\t\tif (ipv4_spec)\n+\t\t\tulp_rte_enc_ipv4_hdr_handler(params, ipv4_spec);\n \n \t\tif (!ulp_rte_item_skip_void(&item, 1))\n \t\t\treturn BNXT_TF_RC_ERROR;\n@@ -1892,47 +2021,6 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t\tipv6_spec = item->spec;\n \t\tip_size = BNXT_ULP_ENCAP_IPV6_SIZE;\n \n-\t\t/* copy the ipv6 details */\n-\t\ttmp_buff = (const uint8_t *)&ipv6_spec->hdr.vtc_flow;\n-\t\tif (ulp_buffer_is_empty(tmp_buff,\n-\t\t\t\t\tBNXT_ULP_ENCAP_IPV6_VTC_FLOW)) {\n-\t\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];\n-\t\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t\t def_ipv6_hdr,\n-\t\t\t\t\t sizeof(def_ipv6_hdr),\n-\t\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\t\t} else {\n-\t\t\t/* The payload length being ignored in the ip hdr. */\n-\t\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];\n-\t\t\ttmp_buff = (const uint8_t *)&ipv6_spec->hdr.proto;\n-\t\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t\t tmp_buff,\n-\t\t\t\t\t BNXT_ULP_ENCAP_IPV6_PROTO_TTL,\n-\t\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\t\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +\n-\t\t\t\tBNXT_ULP_ENCAP_IPV6_PROTO_TTL +\n-\t\t\t\tBNXT_ULP_ENCAP_IPV6_DO];\n-\t\t\ttmp_buff = (const uint8_t *)&ipv6_spec->hdr.vtc_flow;\n-\t\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t\t tmp_buff,\n-\t\t\t\t\t BNXT_ULP_ENCAP_IPV6_VTC_FLOW,\n-\t\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\t\t}\n-\t\t/* Update the dst ip address in ip encap buffer */\n-\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +\n-\t\t\tsizeof(def_ipv6_hdr)];\n-\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t (const uint8_t *)ipv6_spec->hdr.dst_addr,\n-\t\t\t\t sizeof(ipv6_spec->hdr.dst_addr),\n-\t\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n-\n-\t\t/* Update the src ip address */\n-\t\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC];\n-\t\tulp_encap_buffer_copy(buff,\n-\t\t\t\t (const uint8_t *)ipv6_spec->hdr.src_addr,\n-\t\t\t\t sizeof(ipv6_spec->hdr.src_addr),\n-\t\t\t\t ULP_BUFFER_ALIGN_16_BYTE);\n-\n \t\t/* Update the ip size details */\n \t\tip_size = tfp_cpu_to_be_32(ip_size);\n \t\tmemcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ],\n@@ -1946,6 +2034,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t\t/* update the computed field to notify it is ipv6 header */\n \t\tULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG,\n \t\t\t\t 1);\n+\t\tif (ipv6_spec)\n+\t\t\tulp_rte_enc_ipv6_hdr_handler(params, ipv6_spec);\n \n \t\tif (!ulp_rte_item_skip_void(&item, 1))\n \t\t\treturn BNXT_TF_RC_ERROR;\n@@ -1959,10 +2049,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t\tBNXT_TF_DBG(ERR, \"vxlan encap does not have udp\\n\");\n \t\treturn BNXT_TF_RC_ERROR;\n \t}\n-\t/* copy the udp details */\n-\tulp_encap_buffer_copy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP],\n-\t\t\t item->spec, BNXT_ULP_ENCAP_UDP_SIZE,\n-\t\t\t ULP_BUFFER_ALIGN_8_BYTE);\n+\tif (item->spec)\n+\t\tulp_rte_enc_udp_hdr_handler(params, item->spec);\n \n \tif (!ulp_rte_item_skip_void(&item, 1))\n \t\treturn BNXT_TF_RC_ERROR;\n@@ -1976,21 +2064,12 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,\n \t/* copy the vxlan details */\n \tmemcpy(&vxlan_spec, item->spec, vxlan_size);\n \tvxlan_spec.flags = 0x08;\n-\tbuff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN];\n-\tif (ip_type == rte_cpu_to_be_32(BNXT_ULP_ETH_IPV4)) {\n-\t\tulp_encap_buffer_copy(buff, (const uint8_t *)&vxlan_spec,\n-\t\t\t\t vxlan_size, ULP_BUFFER_ALIGN_8_BYTE);\n-\t} else {\n-\t\tulp_encap_buffer_copy(buff, (const uint8_t *)&vxlan_spec,\n-\t\t\t\t vxlan_size / 2, ULP_BUFFER_ALIGN_8_BYTE);\n-\t\tulp_encap_buffer_copy(buff + (vxlan_size / 2),\n-\t\t\t\t (const uint8_t *)&vxlan_spec.vni,\n-\t\t\t\t vxlan_size / 2, ULP_BUFFER_ALIGN_8_BYTE);\n-\t}\n \tvxlan_size = tfp_cpu_to_be_32(vxlan_size);\n \tmemcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ],\n \t &vxlan_size, sizeof(uint32_t));\n \n+\tulp_rte_enc_vxlan_hdr_handler(params, &vxlan_spec);\n+\n \t/* update the hdr_bitmap with vxlan */\n \tULP_BITMAP_SET(act->bits, BNXT_ULP_ACT_BIT_VXLAN_ENCAP);\n \treturn BNXT_TF_RC_SUCCESS;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\nindex 673172c811..e14f86278a 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\n@@ -33,8 +33,10 @@\n #define\tBNXT_ULP_GET_IPV6_FLOWLABEL(vtcf)\t\\\n \t\t\t((vtcf) & BNXT_ULP_PARSER_IPV6_FLOW_LABEL)\n #define\tBNXT_ULP_PARSER_IPV6_VER_MASK\t\t0xf0000000\n+#define BNXT_ULP_IPV6_DFLT_VER\t\t\t0x60000000\n #define\tBNXT_ULP_PARSER_IPV6_TC\t\t\t0x0ff00000\n #define\tBNXT_ULP_PARSER_IPV6_FLOW_LABEL\t\t0x000fffff\n+#define BNXT_ULP_DEFAULT_TTL\t\t\t64\n \n enum bnxt_ulp_prsr_action {\n \tULP_PRSR_ACT_DEFAULT = 0,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\nindex 2685e63432..904763f27d 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n@@ -30,6 +30,7 @@\n #define BNXT_ULP_PROTO_HDR_GRE_NUM\t6\n #define BNXT_ULP_PROTO_HDR_ICMP_NUM\t5\n #define BNXT_ULP_PROTO_HDR_MAX\t\t128\n+#define BNXT_ULP_PROTO_HDR_ENCAP_MAX\t64\n #define BNXT_ULP_PROTO_HDR_FIELD_SVIF_IDX\t1\n \n /* Direction attributes */\n@@ -64,12 +65,13 @@ struct ulp_rte_act_prop {\n \n /* Structure to be used for passing all the parser functions */\n struct ulp_rte_parser_params {\n-\tSTAILQ_ENTRY(ulp_rte_parser_params) next;\n \tstruct ulp_rte_hdr_bitmap\thdr_bitmap;\n+\tstruct ulp_rte_hdr_bitmap\tenc_hdr_bitmap;\n \tstruct ulp_rte_hdr_bitmap\thdr_fp_bit;\n \tstruct ulp_rte_field_bitmap\tfld_bitmap;\n \tstruct ulp_rte_field_bitmap\tfld_s_bitmap;\n \tstruct ulp_rte_hdr_field\thdr_field[BNXT_ULP_PROTO_HDR_MAX];\n+\tstruct ulp_rte_hdr_field\tenc_field[BNXT_ULP_PROTO_HDR_ENCAP_MAX];\n \tuint64_t\t\t\tcomp_fld[BNXT_ULP_CF_IDX_LAST];\n \tuint32_t\t\t\tfield_idx;\n \tstruct ulp_rte_act_bitmap\tact_bitmap;\n@@ -207,7 +209,9 @@ struct bnxt_ulp_template_device_tbls {\n /* Device specific parameters */\n struct bnxt_ulp_device_params {\n \tuint8_t\t\t\t\tdescription[16];\n-\tenum bnxt_ulp_byte_order\tbyte_order;\n+\tenum bnxt_ulp_byte_order\tkey_byte_order;\n+\tenum bnxt_ulp_byte_order\tresult_byte_order;\n+\tenum bnxt_ulp_byte_order\tencap_byte_order;\n \tuint8_t\t\t\t\tencap_byte_swap;\n \tuint8_t\t\t\t\tnum_phy_ports;\n \tuint32_t\t\t\tmark_db_lfid_entries;\n@@ -254,7 +258,6 @@ struct bnxt_ulp_mapper_tbl_info {\n \tuint8_t\t\t\t\tdirection;\n \tenum bnxt_ulp_pri_opc\t\tpri_opcode;\n \tuint32_t\t\t\tpri_operand;\n-\tenum bnxt_ulp_byte_order\tbyte_order;\n \n \t/* conflict resolution opcode */\n \tenum bnxt_ulp_accept_opc\taccept_opcode;\n@@ -267,6 +270,7 @@ struct bnxt_ulp_mapper_tbl_info {\n \tuint16_t\tkey_num_fields;\n \t/* Size of the blob that holds the key */\n \tuint16_t\tblob_key_bit_size;\n+\tuint16_t\trecord_size;\n \n \t/* Information for accessing the ulp_class_result_field_list */\n \tuint32_t\tresult_start_idx;\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.c b/drivers/net/bnxt/tf_ulp/ulp_utils.c\nindex 1649e157f2..fc4f435c97 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_utils.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.c\n@@ -62,7 +62,7 @@ ulp_regfile_read(struct ulp_regfile *regfile,\n * data [in] The value is written into this variable. It is going to be in the\n * same byte order as it was written.\n *\n- * size [in] The size in bytes of the value beingritten into this\n+ * size [in] The size in bytes of the value being written into this\n * variable.\n *\n * returns 0 on success\n@@ -295,7 +295,7 @@ ulp_blob_push(struct ulp_blob *blob,\n \t\t\t\t datalen,\n \t\t\t\t data);\n \tif (!rc) {\n-\t\tBNXT_TF_DBG(ERR, \"Failed ro write blob\\n\");\n+\t\tBNXT_TF_DBG(ERR, \"Failed to write blob\\n\");\n \t\treturn 0;\n \t}\n \tblob->write_idx += datalen;\n@@ -355,7 +355,7 @@ ulp_blob_insert(struct ulp_blob *blob, uint32_t offset,\n \t\t\t\t datalen,\n \t\t\t\t data);\n \tif (!rc) {\n-\t\tBNXT_TF_DBG(ERR, \"Failed ro write blob\\n\");\n+\t\tBNXT_TF_DBG(ERR, \"Failed to write blob\\n\");\n \t\treturn 0;\n \t}\n \t/* copy the previously stored data */\n@@ -409,7 +409,7 @@ ulp_blob_push_64(struct ulp_blob *blob,\n *\n * data [in] 32-bit value to be added to the blob.\n *\n- * datalen [in] The number of bits to be added ot the blob.\n+ * datalen [in] The number of bits to be added to the blob.\n *\n * The offset of the data is updated after each push of data.\n * NULL returned on error, pointer pushed value otherwise.\n@@ -987,6 +987,33 @@ ulp_blob_append(struct ulp_blob *dst, struct ulp_blob *src,\n \treturn 0;\n }\n \n+/*\n+ * Perform the blob buffer copy.\n+ * This api makes the src blob merged to the dst blob.\n+ *\n+ * dst [in] The destination blob, the blob to be merged.\n+ * src [in] The src blob.\n+ *\n+ * returns 0 on success.\n+ */\n+int32_t\n+ulp_blob_buffer_copy(struct ulp_blob *dst, struct ulp_blob *src)\n+{\n+\tif ((dst->write_idx + src->write_idx) > dst->bitlen) {\n+\t\tBNXT_TF_DBG(ERR, \"source buffer too large\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tif (ULP_BITS_IS_BYTE_NOT_ALIGNED(dst->write_idx) ||\n+\t ULP_BITS_IS_BYTE_NOT_ALIGNED(src->write_idx)) {\n+\t\tBNXT_TF_DBG(ERR, \"source buffer is not aligned\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tmemcpy(&dst->data[ULP_BITS_2_BYTE_NR(dst->write_idx)],\n+\t src->data, ULP_BITS_2_BYTE_NR(src->write_idx));\n+\tdst->write_idx += src->write_idx;\n+\treturn 0;\n+}\n+\n /*\n * Read data from the operand\n *\n@@ -1012,44 +1039,6 @@ ulp_operand_read(uint8_t *operand,\n \treturn bytes;\n }\n \n-/*\n- * copy the buffer in the encap format which is 2 bytes.\n- * The MSB of the src is placed at the LSB of dst.\n- *\n- * dst [out] The destination buffer\n- * src [in] The source buffer dst\n- * size[in] size of the buffer.\n- * align[in] The alignment is either 8 or 16.\n- */\n-void\n-ulp_encap_buffer_copy(uint8_t *dst,\n-\t\t const uint8_t *src,\n-\t\t uint16_t size,\n-\t\t uint16_t align)\n-{\n-\tuint16_t\tidx, tmp_size = 0;\n-\n-\tdo {\n-\t\tdst += tmp_size;\n-\t\tsrc += tmp_size;\n-\t\tidx = 0;\n-\t\tif (size > align) {\n-\t\t\ttmp_size = align;\n-\t\t\tsize -= align;\n-\t\t} else {\n-\t\t\ttmp_size = size;\n-\t\t\tsize = 0;\n-\t\t}\n-\t\t/* copy 2 bytes at a time. Write MSB to LSB */\n-\t\twhile ((idx + sizeof(uint16_t)) <= tmp_size) {\n-\t\t\tmemcpy(&dst[idx],\n-\t\t\t &src[tmp_size - idx - sizeof(uint16_t)],\n-\t\t\t sizeof(uint16_t));\n-\t\t\tidx += sizeof(uint16_t);\n-\t\t}\n-\t} while (size);\n-}\n-\n /*\n * Check the buffer is empty\n *\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.h b/drivers/net/bnxt/tf_ulp/ulp_utils.h\nindex e1b0e773f3..68a537fa0a 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_utils.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.h\n@@ -475,6 +475,18 @@ int32_t\n ulp_blob_append(struct ulp_blob *dst, struct ulp_blob *src,\n \t\tuint16_t src_offset, uint16_t src_len);\n \n+/*\n+ * Perform the blob buffer copy.\n+ * This api makes the src blob merged to the dst blob.\n+ *\n+ * dst [in] The destination blob, the blob to be merged.\n+ * src [in] The src blob.\n+ *\n+ * returns 0 on success.\n+ */\n+int32_t\n+ulp_blob_buffer_copy(struct ulp_blob *dst, struct ulp_blob *src);\n+\n /*\n * Read data from the operand\n *\n@@ -491,21 +503,6 @@ ulp_operand_read(uint8_t *operand,\n \t\t uint8_t *val,\n \t\t uint16_t bitlen);\n \n-/*\n- * copy the buffer in the encap format which is 2 bytes.\n- * The MSB of the src is placed at the LSB of dst.\n- *\n- * dst [out] The destination buffer\n- * src [in] The source buffer dst\n- * size[in] size of the buffer.\n- * align[in] The alignment is either 8 or 16.\n- */\n-void\n-ulp_encap_buffer_copy(uint8_t *dst,\n-\t\t const uint8_t *src,\n-\t\t uint16_t size,\n-\t\t uint16_t align);\n-\n /*\n * Check the buffer is empty\n *\n", "prefixes": [ "07/14" ] }