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GET /api/patches/97124/?format=api
{ "id": 97124, "url": "http://patches.dpdk.org/api/patches/97124/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1629407410-28822-2-git-send-email-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1629407410-28822-2-git-send-email-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1629407410-28822-2-git-send-email-nicolas.chautru@intel.com", "date": "2021-08-19T21:10:05", "name": "[v2,1/6] bbdev: add capability for CRC16 check", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c8ca77ba02ccad947f2957b6e381244d89835646", "submitter": { "id": 1314, "url": "http://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1629407410-28822-2-git-send-email-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 18359, "url": "http://patches.dpdk.org/api/series/18359/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18359", "date": "2021-08-19T21:10:04", "name": "bbdev update related to CRC usage", "version": 2, "mbox": "http://patches.dpdk.org/series/18359/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/97124/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/97124/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AD10FA0C4B;\n\tThu, 19 Aug 2021 23:10:31 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A69F54121B;\n\tThu, 19 Aug 2021 23:10:23 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id 4BB044013F\n for <dev@dpdk.org>; Thu, 19 Aug 2021 23:10:17 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 19 Aug 2021 14:10:16 -0700", "from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245])\n by FMSMGA003.fm.intel.com with ESMTP; 19 Aug 2021 14:10:14 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10081\"; a=\"203799149\"", "E=Sophos;i=\"5.84,335,1620716400\"; d=\"scan'208\";a=\"203799149\"", "E=Sophos;i=\"5.84,335,1620716400\"; d=\"scan'208\";a=\"522606834\"" ], "X-ExtLoop1": "1", "From": "Nicolas Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\tgakhil@marvell.com", "Cc": "thomas@monjalon.net, trix@redhat.com, hemant.agrawal@nxp.com,\n mingshan.zhang@intel.com, arun.joshi@intel.com,\n Nicolas Chautru <nicolas.chautru@intel.com>", "Date": "Thu, 19 Aug 2021 14:10:05 -0700", "Message-Id": "<1629407410-28822-2-git-send-email-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1629407410-28822-1-git-send-email-nicolas.chautru@intel.com>", "References": "<1629407410-28822-1-git-send-email-nicolas.chautru@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 1/6] bbdev: add capability for CRC16 check", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Adding a missing operation when CRC16\nis being used for TB CRC check.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n app/test-bbdev/test_bbdev_vector.c | 2 ++\n doc/guides/prog_guide/bbdev.rst | 3 +++\n doc/guides/rel_notes/release_21_11.rst | 1 +\n lib/bbdev/rte_bbdev_op.h | 34 ++++++++++++++++++----------------\n 4 files changed, 24 insertions(+), 16 deletions(-)", "diff": "diff --git a/app/test-bbdev/test_bbdev_vector.c b/app/test-bbdev/test_bbdev_vector.c\nindex 614dbd1..8d796b1 100644\n--- a/app/test-bbdev/test_bbdev_vector.c\n+++ b/app/test-bbdev/test_bbdev_vector.c\n@@ -167,6 +167,8 @@\n \t\t*op_flag_value = RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK;\n \telse if (!strcmp(token, \"RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP\"))\n \t\t*op_flag_value = RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP;\n+\telse if (!strcmp(token, \"RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK\"))\n+\t\t*op_flag_value = RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK;\n \telse if (!strcmp(token, \"RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS\"))\n \t\t*op_flag_value = RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS;\n \telse if (!strcmp(token, \"RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE\"))\ndiff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst\nindex 9619280..8bd7cba 100644\n--- a/doc/guides/prog_guide/bbdev.rst\n+++ b/doc/guides/prog_guide/bbdev.rst\n@@ -891,6 +891,9 @@ given below.\n |RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP |\n | Set to drop the last CRC bits decoding output |\n +--------------------------------------------------------------------+\n+|RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK |\n+| Set for code block CRC-16 checking |\n++--------------------------------------------------------------------+\n |RTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS |\n | Set for bit-level de-interleaver bypass on input stream |\n +--------------------------------------------------------------------+\ndiff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst\nindex d707a55..69dd518 100644\n--- a/doc/guides/rel_notes/release_21_11.rst\n+++ b/doc/guides/rel_notes/release_21_11.rst\n@@ -84,6 +84,7 @@ API Changes\n Also, make sure to start the actual text at the margin.\n =======================================================\n \n+* bbdev: Added capability related to more comprehensive CRC options.\n \n ABI Changes\n -----------\ndiff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h\nindex f946842..7c44ddd 100644\n--- a/lib/bbdev/rte_bbdev_op.h\n+++ b/lib/bbdev/rte_bbdev_op.h\n@@ -142,51 +142,53 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks {\n \tRTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK = (1ULL << 1),\n \t/** Set to drop the last CRC bits decoding output */\n \tRTE_BBDEV_LDPC_CRC_TYPE_24B_DROP = (1ULL << 2),\n+\t/** Set for transport block CRC-16 checking */\n+\tRTE_BBDEV_LDPC_CRC_TYPE_16_CHECK = (1ULL << 3),\n \t/** Set for bit-level de-interleaver bypass on Rx stream. */\n-\tRTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS = (1ULL << 3),\n+\tRTE_BBDEV_LDPC_DEINTERLEAVER_BYPASS = (1ULL << 4),\n \t/** Set for HARQ combined input stream enable. */\n-\tRTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE = (1ULL << 4),\n+\tRTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE = (1ULL << 5),\n \t/** Set for HARQ combined output stream enable. */\n-\tRTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE = (1ULL << 5),\n+\tRTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE = (1ULL << 6),\n \t/** Set for LDPC decoder bypass.\n \t * RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE must be set.\n \t */\n-\tRTE_BBDEV_LDPC_DECODE_BYPASS = (1ULL << 6),\n+\tRTE_BBDEV_LDPC_DECODE_BYPASS = (1ULL << 7),\n \t/** Set for soft-output stream enable */\n-\tRTE_BBDEV_LDPC_SOFT_OUT_ENABLE = (1ULL << 7),\n+\tRTE_BBDEV_LDPC_SOFT_OUT_ENABLE = (1ULL << 8),\n \t/** Set for Rate-Matching bypass on soft-out stream. */\n-\tRTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS = (1ULL << 8),\n+\tRTE_BBDEV_LDPC_SOFT_OUT_RM_BYPASS = (1ULL << 9),\n \t/** Set for bit-level de-interleaver bypass on soft-output stream. */\n-\tRTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS = (1ULL << 9),\n+\tRTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS = (1ULL << 10),\n \t/** Set for iteration stopping on successful decode condition\n \t * i.e. a successful syndrome check.\n \t */\n-\tRTE_BBDEV_LDPC_ITERATION_STOP_ENABLE = (1ULL << 10),\n+\tRTE_BBDEV_LDPC_ITERATION_STOP_ENABLE = (1ULL << 11),\n \t/** Set if a device supports decoder dequeue interrupts. */\n-\tRTE_BBDEV_LDPC_DEC_INTERRUPTS = (1ULL << 11),\n+\tRTE_BBDEV_LDPC_DEC_INTERRUPTS = (1ULL << 12),\n \t/** Set if a device supports scatter-gather functionality. */\n-\tRTE_BBDEV_LDPC_DEC_SCATTER_GATHER = (1ULL << 12),\n+\tRTE_BBDEV_LDPC_DEC_SCATTER_GATHER = (1ULL << 13),\n \t/** Set if a device supports input/output HARQ compression. */\n-\tRTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION = (1ULL << 13),\n+\tRTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION = (1ULL << 14),\n \t/** Set if a device supports input LLR compression. */\n-\tRTE_BBDEV_LDPC_LLR_COMPRESSION = (1ULL << 14),\n+\tRTE_BBDEV_LDPC_LLR_COMPRESSION = (1ULL << 15),\n \t/** Set if a device supports HARQ input from\n \t * device's internal memory.\n \t */\n-\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE = (1ULL << 15),\n+\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE = (1ULL << 16),\n \t/** Set if a device supports HARQ output to\n \t * device's internal memory.\n \t */\n-\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE = (1ULL << 16),\n+\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE = (1ULL << 17),\n \t/** Set if a device supports loop-back access to\n \t * HARQ internal memory. Intended for troubleshooting.\n \t */\n-\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK = (1ULL << 17),\n+\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK = (1ULL << 18),\n \t/** Set if a device includes LLR filler bits in the circular buffer\n \t * for HARQ memory. If not set, it is assumed the filler bits are not\n \t * in HARQ memory and handled directly by the LDPC decoder.\n \t */\n-\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18)\n+\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19)\n };\n \n /** Flags for LDPC encoder operation and capability structure */\n", "prefixes": [ "v2", "1/6" ] }