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GET /api/patches/96987/?format=api
{ "id": 96987, "url": "http://patches.dpdk.org/api/patches/96987/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1629207767-262-3-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1629207767-262-3-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1629207767-262-3-git-send-email-anoobj@marvell.com", "date": "2021-08-17T13:42:44", "name": "[2/5] common/cnxk: support lifetime configuration", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "aa49916f8ef43ae9d971db92f4326566ad91a056", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1629207767-262-3-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 18313, "url": "http://patches.dpdk.org/api/series/18313/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18313", "date": "2021-08-17T13:42:42", "name": "Add SA lifetime in security", "version": 1, "mbox": "http://patches.dpdk.org/series/18313/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/96987/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/96987/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2E7F5A0548;\n\tTue, 17 Aug 2021 15:43:25 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9E2B9411A9;\n\tTue, 17 Aug 2021 15:43:22 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id A02DC40DF5\n for <dev@dpdk.org>; Tue, 17 Aug 2021 15:43:20 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.0.43) with SMTP id\n 17H9x7Oj030293;\n Tue, 17 Aug 2021 06:43:20 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 3agay2gtk1-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 17 Aug 2021 06:43:20 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 17 Aug 2021 06:43:18 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 17 Aug 2021 06:43:18 -0700", "from HY-LT1002.marvell.com (unknown [10.193.70.144])\n by maili.marvell.com (Postfix) with ESMTP id CA4453F7045;\n Tue, 17 Aug 2021 06:43:12 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=/fcJZCbtearGlOVwwTkh/sAv7/jO7gPQKZ4EHI3PYt0=;\n b=LAtMKHjv41eXCDQcTy3S6KrxfS7U2V/VIQxjz2i3LRDPyTVyn2qcXf69D1UAAU8YY+Q0\n 7YhMsgZAu/x4nvyx9GK5jbdRMwDRJXpcBIff7ux7QFmgGxC1pZTC0xEGQl7WVtkO+AIg\n w1QOY1t0mdhkW0mdSELyEnjeY/YxQRIJ0mMZciM+zXxMuKh5KdR/Ubn0vTMF5eegrbhC\n 6vXsuMTR43pUokjfPR8l9aGPgfGEznuoPsncB22Fl4fuxUEB90AU3joVpFG8oKQCv1ve\n jk3bF/jjVzwopW7FO+iRf11h72JIwqY7oX2GwwCOQVRNqHF2cwf7O4RbhZiMWmKElu/P vQ==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Declan Doherty\n <declan.doherty@intel.com>, Fan Zhang <roy.fan.zhang@intel.com>,\n \"Konstantin Ananyev\" <konstantin.ananyev@intel.com>", "CC": "Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Archana Muniganti <marchana@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, Hemant Agrawal <hemant.agrawal@nxp.com>, \"Radu\n Nicolau\" <radu.nicolau@intel.com>,\n Ciara Power <ciara.power@intel.com>, <dev@dpdk.org>", "Date": "Tue, 17 Aug 2021 19:12:44 +0530", "Message-ID": "<1629207767-262-3-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1629207767-262-1-git-send-email-anoobj@marvell.com>", "References": "<1629207767-262-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "OguhZtTKKSjF4TDlQLLQYvk_kbJIYvP_", "X-Proofpoint-ORIG-GUID": "OguhZtTKKSjF4TDlQLLQYvk_kbJIYvP_", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-08-17_04,2021-08-17_02,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH 2/5] common/cnxk: support lifetime configuration", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add support for SA lifetime configuration. Expiry can\nbe either in units of octets or packets.\n\nAlso, updated cryptodev dequeue path to update crypto op result to\nindicate soft expiry.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/common/cnxk/cnxk_security.c | 70 +++++++++++++++++++++++++++++++\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 48 ++++++++++++++++-----\n 2 files changed, 107 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c\nindex 6c6728f..d9d4283 100644\n--- a/drivers/common/cnxk/cnxk_security.c\n+++ b/drivers/common/cnxk/cnxk_security.c\n@@ -99,6 +99,26 @@ ot_ipsec_sa_common_param_fill(union roc_ot_ipsec_sa_word2 *w2,\n \t\treturn -EINVAL;\n \t}\n \n+\tif (ipsec_xfrm->life.packets_soft_limit != 0 ||\n+\t ipsec_xfrm->life.packets_hard_limit != 0) {\n+\t\tif (ipsec_xfrm->life.bytes_soft_limit != 0 ||\n+\t\t ipsec_xfrm->life.bytes_hard_limit != 0) {\n+\t\t\tplt_err(\"Expiry tracking with both packets & bytes is not supported\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tw2->s.life_unit = ROC_IE_OT_SA_LIFE_UNIT_PKTS;\n+\t}\n+\n+\tif (ipsec_xfrm->life.bytes_soft_limit != 0 ||\n+\t ipsec_xfrm->life.bytes_hard_limit != 0) {\n+\t\tif (ipsec_xfrm->life.packets_soft_limit != 0 ||\n+\t\t ipsec_xfrm->life.packets_hard_limit != 0) {\n+\t\t\tplt_err(\"Expiry tracking with both packets & bytes is not supported\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tw2->s.life_unit = ROC_IE_OT_SA_LIFE_UNIT_OCTETS;\n+\t}\n+\n \treturn 0;\n }\n \n@@ -173,6 +193,31 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,\n \t\t ROC_CTX_UNIT_128B) -\n \t\t1;\n \n+\t/**\n+\t * CPT MC triggers expiry when counter value changes from 2 to 1. To\n+\t * mitigate this behaviour add 1 to the life counter values provided.\n+\t */\n+\n+\tif (ipsec_xfrm->life.bytes_soft_limit) {\n+\t\tsa->ctx.soft_life = ipsec_xfrm->life.bytes_soft_limit + 1;\n+\t\tsa->w0.s.soft_life_dec = 1;\n+\t}\n+\n+\tif (ipsec_xfrm->life.packets_soft_limit) {\n+\t\tsa->ctx.soft_life = ipsec_xfrm->life.packets_soft_limit + 1;\n+\t\tsa->w0.s.soft_life_dec = 1;\n+\t}\n+\n+\tif (ipsec_xfrm->life.bytes_hard_limit) {\n+\t\tsa->ctx.hard_life = ipsec_xfrm->life.bytes_hard_limit + 1;\n+\t\tsa->w0.s.hard_life_dec = 1;\n+\t}\n+\n+\tif (ipsec_xfrm->life.packets_hard_limit) {\n+\t\tsa->ctx.hard_life = ipsec_xfrm->life.packets_hard_limit + 1;\n+\t\tsa->w0.s.hard_life_dec = 1;\n+\t}\n+\n \t/* There are two words of CPT_CTX_HW_S for ucode to skip */\n \tsa->w0.s.ctx_hdr_size = 1;\n \tsa->w0.s.aop_valid = 1;\n@@ -296,6 +341,31 @@ cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,\n \t/* IPID gen */\n \tsa->w2.s.ipid_gen = 1;\n \n+\t/**\n+\t * CPT MC triggers expiry when counter value changes from 2 to 1. To\n+\t * mitigate this behaviour add 1 to the life counter values provided.\n+\t */\n+\n+\tif (ipsec_xfrm->life.bytes_soft_limit) {\n+\t\tsa->ctx.soft_life = ipsec_xfrm->life.bytes_soft_limit + 1;\n+\t\tsa->w0.s.soft_life_dec = 1;\n+\t}\n+\n+\tif (ipsec_xfrm->life.packets_soft_limit) {\n+\t\tsa->ctx.soft_life = ipsec_xfrm->life.packets_soft_limit + 1;\n+\t\tsa->w0.s.soft_life_dec = 1;\n+\t}\n+\n+\tif (ipsec_xfrm->life.bytes_hard_limit) {\n+\t\tsa->ctx.hard_life = ipsec_xfrm->life.bytes_hard_limit + 1;\n+\t\tsa->w0.s.hard_life_dec = 1;\n+\t}\n+\n+\tif (ipsec_xfrm->life.packets_hard_limit) {\n+\t\tsa->ctx.hard_life = ipsec_xfrm->life.packets_hard_limit + 1;\n+\t\tsa->w0.s.hard_life_dec = 1;\n+\t}\n+\n \t/* There are two words of CPT_CTX_HW_S for ucode to skip */\n \tsa->w0.s.ctx_hdr_size = 1;\n \tsa->w0.s.aop_valid = 1;\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 2e1a739..ac8179b 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -291,12 +291,44 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n \t\t\t struct cpt_inflight_req *infl_req)\n {\n \tstruct cpt_cn10k_res_s *res = (struct cpt_cn10k_res_s *)&infl_req->res;\n+\tconst uint8_t uc_compcode = res->uc_compcode;\n+\tconst uint8_t compcode = res->compcode;\n \tunsigned int sz;\n \n-\tif (likely(res->compcode == CPT_COMP_GOOD ||\n-\t\t res->compcode == CPT_COMP_WARN)) {\n-\t\tif (unlikely(res->uc_compcode)) {\n-\t\t\tif (res->uc_compcode == ROC_SE_ERR_GC_ICV_MISCOMPARE)\n+\tcop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n+\n+\tif (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC &&\n+\t cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n+\t\tif (likely(compcode == CPT_COMP_WARN)) {\n+\t\t\tif (unlikely(uc_compcode != ROC_IE_OT_UCC_SUCCESS)) {\n+\t\t\t\t/* Success with additional info */\n+\t\t\t\tswitch (uc_compcode) {\n+\t\t\t\tcase ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST:\n+\t\t\t\t\tcop->aux_flags =\n+\t\t\t\t\t\tRTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;\n+\t\t\t\t\tbreak;\n+\t\t\t\tdefault:\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t\tcn10k_cpt_sec_post_process(cop, infl_req);\n+\t\t} else {\n+\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\n+\t\t\tplt_dp_info(\"HW completion code 0x%x\", res->compcode);\n+\t\t\tif (compcode == CPT_COMP_GOOD) {\n+\t\t\t\tplt_dp_info(\n+\t\t\t\t\t\"Request failed with microcode error\");\n+\t\t\t\tplt_dp_info(\"MC completion code 0x%x\",\n+\t\t\t\t\t uc_compcode);\n+\t\t\t}\n+\t\t}\n+\n+\t\treturn;\n+\t}\n+\n+\tif (likely(compcode == CPT_COMP_GOOD || compcode == CPT_COMP_WARN)) {\n+\t\tif (unlikely(uc_compcode)) {\n+\t\t\tif (uc_compcode == ROC_SE_ERR_GC_ICV_MISCOMPARE)\n \t\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n \t\t\telse\n \t\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\n@@ -307,13 +339,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n \t\t\tgoto temp_sess_free;\n \t\t}\n \n-\t\tcop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n \t\tif (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n-\t\t\tif (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n-\t\t\t\tcn10k_cpt_sec_post_process(cop, infl_req);\n-\t\t\t\treturn;\n-\t\t\t}\n-\n \t\t\t/* Verify authentication data if required */\n \t\t\tif (unlikely(infl_req->op_flags &\n \t\t\t\t CPT_OP_FLAGS_AUTH_VERIFY)) {\n@@ -335,7 +361,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n \t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\n \t\tplt_dp_info(\"HW completion code 0x%x\", res->compcode);\n \n-\t\tswitch (res->compcode) {\n+\t\tswitch (compcode) {\n \t\tcase CPT_COMP_INSTERR:\n \t\t\tplt_dp_err(\"Request failed with instruction error\");\n \t\t\tbreak;\n", "prefixes": [ "2/5" ] }