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GET /api/patches/96802/?format=api
{ "id": 96802, "url": "http://patches.dpdk.org/api/patches/96802/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210811140418.393264-1-xuemingl@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210811140418.393264-1-xuemingl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210811140418.393264-1-xuemingl@nvidia.com", "date": "2021-08-11T14:04:03", "name": "[v2,01/15] ethdev: introduce shared Rx queue", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0a9e273db9c24be60fe69ff1f26c0d0c63ad550a", "submitter": { "id": 1904, "url": "http://patches.dpdk.org/api/people/1904/?format=api", "name": "Xueming Li", "email": "xuemingl@nvidia.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210811140418.393264-1-xuemingl@nvidia.com/mbox/", "series": [ { "id": 18256, "url": "http://patches.dpdk.org/api/series/18256/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18256", "date": "2021-08-11T14:04:03", "name": "[v2,01/15] ethdev: introduce shared Rx queue", "version": 2, "mbox": "http://patches.dpdk.org/series/18256/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/96802/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/96802/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 14329A0C47;\n\tWed, 11 Aug 2021 16:04:52 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9AAB740C35;\n\tWed, 11 Aug 2021 16:04:51 +0200 (CEST)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2051.outbound.protection.outlook.com [40.107.243.51])\n by mails.dpdk.org (Postfix) with ESMTP id 9B15E40042\n for <dev@dpdk.org>; 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dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Xueming Li <xuemingl@nvidia.com>", "To": "", "CC": "<dev@dpdk.org>, <xuemingl@nvidia.com>, Jerin Jacob\n <jerinjacobk@gmail.com>, Ferruh Yigit <ferruh.yigit@intel.com>, \"Thomas\n Monjalon\" <thomas@monjalon.net>, Andrew Rybchenko\n <andrew.rybchenko@oktetlabs.ru>", "Date": "Wed, 11 Aug 2021 17:04:03 +0300", "Message-ID": "<20210811140418.393264-1-xuemingl@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20210727034204.20649-1-xuemingl@nvidia.com>", "References": "<20210727034204.20649-1-xuemingl@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL107.nvidia.com (172.20.187.13) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "23d88f49-da04-43a8-06e2-08d95cd0fa65", "X-MS-TrafficTypeDiagnostic": "MN2PR12MB4048:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <MN2PR12MB4048ECDDC8B8A46F14758CECA1F89@MN2PR12MB4048.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:8882;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n dp/AOPqgFFAs40/OrsJ+9WIpyaSihAIbt2+4y2plpb3ZsLkGsu9EBM0DMQBcdU0GCoRiiyc+J5NwjRCAK6fVkqEMvYKAf8QaR/nqhPBrpfWS7tvH7LKp7bmc6j85ulMfKYpTmvXVWFC9dolkxH9ylhXXz44soKWlfnx83VuR4fIOGwwTu4UMAx2fUXxp0PId5MuJ9/rWyWtWu3MVYof1uR+YZdJ7QUCLCNfyVGgBGkUM7ciLtcCnX90XEaU9JM5YWEYZLBgFGnlIaseHbIg7asYZ7iyaPvKKWciB3FVq2tz5vOgHVyINXgwe/osd5+IJ0L0KwE6QveJybNQVxdX7qFYHM+gLoH3E0nwASaOBLweeWul5NtggQTyvrHYrRX16EDVslh7AP8L+wADwaBA+wTfx3U7xBDKlwpUVu6bGtbYtAFCej7Fkk96hemSJDCXs4/3r8UVfH9k9LMPP+NiCQIAgfdGhlCyZVhlvkW8JOKw3kbJMRynPKKoINFrcqHyi7DdLNzvbncbdUisauxSgm0ImNTk/jh7D7MRHatussSdHDn3USUwYTbHS8+Ek+ZSp6VFwSt0NTXaC3zPRsacpZLNLv3boNF2ZqbTxVyRNgV475WcwBq/OiG1QAOv4yoPqlMxvy4xcAPDodl6n1XnB6gstykF2+YTetyjSkZMsnwyJCYt7VJx8MwC0YEl1dVFOqvRhRE2ji++NJ4JqapqS5ySFMhWyHZSByWfnITUp+EsVhv1uFr8FsYCSEx37oZelq7vwQpsOvzo/Cpm3YkGOvdvDDwu8mMAae9yIvj50gT29A9Y/G2Thj8YxEQPrfiFtzB95amfo6WoFgScsh8rBJg==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(136003)(396003)(39860400002)(346002)(376002)(36840700001)(46966006)(83380400001)(2906002)(336012)(36906005)(82310400003)(7696005)(36756003)(316002)(6286002)(47076005)(26005)(2616005)(966005)(1076003)(55016002)(5660300002)(478600001)(6666004)(7636003)(70206006)(8676002)(4326008)(426003)(82740400003)(356005)(186003)(16526019)(54906003)(70586007)(36860700001)(109986005)(86362001)(8936002)(266003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "11 Aug 2021 14:04:47.1534 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 23d88f49-da04-43a8-06e2-08d95cd0fa65", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT015.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR12MB4048", "Subject": "[dpdk-dev] [PATCH v2 01/15] ethdev: introduce shared Rx queue", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "In current DPDK framework, each RX queue is pre-loaded with mbufs for\nincoming packets. When number of representors scale out in a switch\ndomain, the memory consumption became significant. Most important,\npolling all ports leads to high cache miss, high latency and low\nthroughput.\n\nThis patch introduces shared RX queue. Ports with same configuration in\na switch domain could share RX queue set by specifying sharing group.\nPolling any queue using same shared RX queue receives packets from all\nmember ports. Source port is identified by mbuf->port.\n\nPort queue number in a shared group should be identical. Queue index is\n1:1 mapped in shared group.\n\nShare RX queue must be polled on single thread or core.\n\nMultiple groups is supported by group ID.\n\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\nCc: Jerin Jacob <jerinjacobk@gmail.com>\n---\nRx queue object could be used as shared Rx queue object, it's important\nto clear all queue control callback api that using queue object:\n https://mails.dpdk.org/archives/dev/2021-July/215574.html\n---\n doc/guides/nics/features.rst | 11 +++++++++++\n doc/guides/nics/features/default.ini | 1 +\n doc/guides/prog_guide/switch_representation.rst | 10 ++++++++++\n lib/ethdev/rte_ethdev.c | 1 +\n lib/ethdev/rte_ethdev.h | 7 +++++++\n 5 files changed, 30 insertions(+)", "diff": "diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst\nindex a96e12d155..2e2a9b1554 100644\n--- a/doc/guides/nics/features.rst\n+++ b/doc/guides/nics/features.rst\n@@ -624,6 +624,17 @@ Supports inner packet L4 checksum.\n ``tx_offload_capa,tx_queue_offload_capa:DEV_TX_OFFLOAD_OUTER_UDP_CKSUM``.\n \n \n+.. _nic_features_shared_rx_queue:\n+\n+Shared Rx queue\n+---------------\n+\n+Supports shared Rx queue for ports in same switch domain.\n+\n+* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:RTE_ETH_RX_OFFLOAD_SHARED_RXQ``.\n+* **[provides] mbuf**: ``mbuf.port``.\n+\n+\n .. _nic_features_packet_type_parsing:\n \n Packet type parsing\ndiff --git a/doc/guides/nics/features/default.ini b/doc/guides/nics/features/default.ini\nindex 754184ddd4..ebeb4c1851 100644\n--- a/doc/guides/nics/features/default.ini\n+++ b/doc/guides/nics/features/default.ini\n@@ -19,6 +19,7 @@ Free Tx mbuf on demand =\n Queue start/stop =\n Runtime Rx queue setup =\n Runtime Tx queue setup =\n+Shared Rx queue =\n Burst mode info =\n Power mgmt address monitor =\n MTU update =\ndiff --git a/doc/guides/prog_guide/switch_representation.rst b/doc/guides/prog_guide/switch_representation.rst\nindex ff6aa91c80..45bf5a3a10 100644\n--- a/doc/guides/prog_guide/switch_representation.rst\n+++ b/doc/guides/prog_guide/switch_representation.rst\n@@ -123,6 +123,16 @@ thought as a software \"patch panel\" front-end for applications.\n .. [1] `Ethernet switch device driver model (switchdev)\n <https://www.kernel.org/doc/Documentation/networking/switchdev.txt>`_\n \n+- Memory usage of representors is huge when number of representor grows,\n+ because PMD always allocate mbuf for each descriptor of Rx queue.\n+ Polling the large number of ports brings more CPU load, cache miss and\n+ latency. Shared Rx queue can be used to share Rx queue between PF and\n+ representors in same switch domain. ``RTE_ETH_RX_OFFLOAD_SHARED_RXQ``\n+ is present in Rx offloading capability of device info. Setting the\n+ offloading flag in device Rx mode or Rx queue configuration to enable\n+ shared Rx queue. Polling any member port of shared Rx queue can return\n+ packets of all ports in group, port ID is saved in ``mbuf.port``.\n+\n Basic SR-IOV\n ------------\n \ndiff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c\nindex 193f0d8295..058f5c88d9 100644\n--- a/lib/ethdev/rte_ethdev.c\n+++ b/lib/ethdev/rte_ethdev.c\n@@ -127,6 +127,7 @@ static const struct {\n \tRTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),\n \tRTE_RX_OFFLOAD_BIT2STR(RSS_HASH),\n \tRTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),\n+\tRTE_ETH_RX_OFFLOAD_BIT2STR(SHARED_RXQ),\n };\n \n #undef RTE_RX_OFFLOAD_BIT2STR\ndiff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h\nindex d2b27c351f..a578c9db9d 100644\n--- a/lib/ethdev/rte_ethdev.h\n+++ b/lib/ethdev/rte_ethdev.h\n@@ -1047,6 +1047,7 @@ struct rte_eth_rxconf {\n \tuint8_t rx_drop_en; /**< Drop packets if no descriptors are available. */\n \tuint8_t rx_deferred_start; /**< Do not start queue with rte_eth_dev_start(). */\n \tuint16_t rx_nseg; /**< Number of descriptions in rx_seg array. */\n+\tuint32_t shared_group; /**< Shared port group index in switch domain. */\n \t/**\n \t * Per-queue Rx offloads to be set using DEV_RX_OFFLOAD_* flags.\n \t * Only offloads set on rx_queue_offload_capa or rx_offload_capa\n@@ -1373,6 +1374,12 @@ struct rte_eth_conf {\n #define DEV_RX_OFFLOAD_OUTER_UDP_CKSUM 0x00040000\n #define DEV_RX_OFFLOAD_RSS_HASH\t\t0x00080000\n #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT 0x00100000\n+/**\n+ * Rx queue is shared among ports in same switch domain to save memory,\n+ * avoid polling each port. Any port in group can be used to receive packets.\n+ * Real source port number saved in mbuf->port field.\n+ */\n+#define RTE_ETH_RX_OFFLOAD_SHARED_RXQ 0x00200000\n \n #define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \\\n \t\t\t\t DEV_RX_OFFLOAD_UDP_CKSUM | \\\n", "prefixes": [ "v2", "01/15" ] }