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GET /api/patches/96584/?format=api
{ "id": 96584, "url": "http://patches.dpdk.org/api/patches/96584/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210803083817.1243796-7-wenjun1.wu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210803083817.1243796-7-wenjun1.wu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210803083817.1243796-7-wenjun1.wu@intel.com", "date": "2021-08-03T08:38:01", "name": "[06/22] net/ice/base: support checking double VLAN mode", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "3241a53c739f95da1ee013afc1db252adda4dc23", "submitter": { "id": 2083, "url": "http://patches.dpdk.org/api/people/2083/?format=api", "name": "Wenjun Wu", "email": "wenjun1.wu@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210803083817.1243796-7-wenjun1.wu@intel.com/mbox/", "series": [ { "id": 18158, "url": "http://patches.dpdk.org/api/series/18158/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18158", "date": "2021-08-03T08:37:55", "name": "backport feature support to DPDK 20.11", "version": 1, "mbox": "http://patches.dpdk.org/series/18158/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/96584/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/96584/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BC1E4A0C41;\n\tTue, 3 Aug 2021 10:57:44 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2DB0D411DC;\n\tTue, 3 Aug 2021 10:57:19 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id AD51A411BC\n for <dev@dpdk.org>; Tue, 3 Aug 2021 10:57:12 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 03 Aug 2021 01:56:55 -0700", "from wuwenjun.sh.intel.com ([10.67.110.197])\n by fmsmga008.fm.intel.com with ESMTP; 03 Aug 2021 01:56:54 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10064\"; a=\"211764384\"", "E=Sophos;i=\"5.84,291,1620716400\"; d=\"scan'208\";a=\"211764384\"", "E=Sophos;i=\"5.84,291,1620716400\"; d=\"scan'208\";a=\"479396576\"" ], "X-ExtLoop1": "1", "From": "Wenjun Wu <wenjun1.wu@intel.com>", "To": "dev@dpdk.org", "Date": "Tue, 3 Aug 2021 16:38:01 +0800", "Message-Id": "<20210803083817.1243796-7-wenjun1.wu@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210803083817.1243796-1-wenjun1.wu@intel.com>", "References": "<20210803083817.1243796-1-wenjun1.wu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 06/22] net/ice/base: support checking double VLAN\n mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Qi Zhang <qi.z.zhang@intel.com>\n\n[ upstream commit 67285599c9f413c59118379d1f7162031ea6acdc ]\n\nIf a driver wants to configure double VLAN mode (DVM) it needs to\nfirst check if the DDP supports DVM. To do this the driver needs to read\nthe package metadata section via the upload section AQ (0x04C1).\n\nIf the DDP doesn't support configuring double VLAN mode (DVM), then\nthere is nothing to do regarding configuring the VLAN mode of the\ndevice.\n\nThe set_svm() or set_dvm() ops should only be called if the current\nconfiguration supports configuring the VLAN mode of the device.\n\nSuggested-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Dan Nowlin <dan.nowlin@intel.com>\nSigned-off-by: Brett Creeley <brett.creeley@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_bitops.h | 45 ++++++++++++++++\n drivers/net/ice/base/ice_flex_pipe.c | 63 +++++++++++++++++++++-\n drivers/net/ice/base/ice_flex_pipe.h | 11 ++++\n drivers/net/ice/base/ice_flex_type.h | 26 ++++++++++\n drivers/net/ice/base/ice_vlan_mode.c | 78 ++++++++++++++++++++++++++++\n 5 files changed, 221 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h\nindex 39548967cc..b786bf7a18 100644\n--- a/drivers/net/ice/base/ice_bitops.h\n+++ b/drivers/net/ice/base/ice_bitops.h\n@@ -449,4 +449,49 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)\n \treturn true;\n }\n \n+/**\n+ * ice_bitmap_from_array32 - copies u32 array source into bitmap destination\n+ * @dst: the destination bitmap\n+ * @src: the source u32 array\n+ * @size: size of the bitmap (in bits)\n+ *\n+ * This function copies the src bitmap stored in an u32 array into the dst\n+ * bitmap stored as an ice_bitmap_t.\n+ */\n+static inline void\n+ice_bitmap_from_array32(ice_bitmap_t *dst, u32 *src, u16 size)\n+{\n+\tu32 remaining_bits, i;\n+\n+#define BITS_PER_U32\t(sizeof(u32) * BITS_PER_BYTE)\n+\t/* clear bitmap so we only have to set when iterating */\n+\tice_zero_bitmap(dst, size);\n+\n+\tfor (i = 0; i < (u32)(size / BITS_PER_U32); i++) {\n+\t\tu32 bit_offset = i * BITS_PER_U32;\n+\t\tu32 entry = src[i];\n+\t\tu32 j;\n+\n+\t\tfor (j = 0; j < BITS_PER_U32; j++) {\n+\t\t\tif (entry & BIT(j))\n+\t\t\t\tice_set_bit((u16)(j + bit_offset), dst);\n+\t\t}\n+\t}\n+\n+\t/* still need to check the leftover bits (i.e. if size isn't evenly\n+\t * divisible by BITS_PER_U32\n+\t **/\n+\tremaining_bits = size % BITS_PER_U32;\n+\tif (remaining_bits) {\n+\t\tu32 bit_offset = i * BITS_PER_U32;\n+\t\tu32 entry = src[i];\n+\t\tu32 j;\n+\n+\t\tfor (j = 0; j < remaining_bits; j++) {\n+\t\t\tif (entry & BIT(j))\n+\t\t\t\tice_set_bit((u16)(j + bit_offset), dst);\n+\t\t}\n+\t}\n+}\n+\n #endif /* _ICE_BITOPS_H_ */\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex 6c7f83899d..e511b50a00 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -807,6 +807,28 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,\n \treturn status;\n }\n \n+/**\n+ * ice_aq_upload_section\n+ * @hw: pointer to the hardware structure\n+ * @pkg_buf: the package buffer which will receive the section\n+ * @buf_size: the size of the package buffer\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Upload Section (0x0C41)\n+ */\n+enum ice_status\n+ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,\n+\t\t u16 buf_size, struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aq_desc desc;\n+\n+\tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_upload_section);\n+\tdesc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);\n+\n+\treturn ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);\n+}\n+\n /**\n * ice_aq_update_pkg\n * @hw: pointer to the hardware structure\n@@ -1800,7 +1822,7 @@ void ice_init_prof_result_bm(struct ice_hw *hw)\n *\n * Frees a package buffer\n */\n-static void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)\n+void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)\n {\n \tice_free(hw, bld);\n }\n@@ -1899,6 +1921,43 @@ ice_pkg_buf_alloc_section(struct ice_buf_build *bld, u32 type, u16 size)\n \treturn NULL;\n }\n \n+/**\n+ * ice_pkg_buf_alloc_single_section\n+ * @hw: pointer to the HW structure\n+ * @type: the section type value\n+ * @size: the size of the section to reserve (in bytes)\n+ * @section: returns pointer to the section\n+ *\n+ * Allocates a package buffer with a single section.\n+ * Note: all package contents must be in Little Endian form.\n+ */\n+struct ice_buf_build *\n+ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,\n+\t\t\t\t void **section)\n+{\n+\tstruct ice_buf_build *buf;\n+\n+\tif (!section)\n+\t\treturn NULL;\n+\n+\tbuf = ice_pkg_buf_alloc(hw);\n+\tif (!buf)\n+\t\treturn NULL;\n+\n+\tif (ice_pkg_buf_reserve_section(buf, 1))\n+\t\tgoto ice_pkg_buf_alloc_single_section_err;\n+\n+\t*section = ice_pkg_buf_alloc_section(buf, type, size);\n+\tif (!*section)\n+\t\tgoto ice_pkg_buf_alloc_single_section_err;\n+\n+\treturn buf;\n+\n+ice_pkg_buf_alloc_single_section_err:\n+\tice_pkg_buf_free(hw, buf);\n+\treturn NULL;\n+}\n+\n /**\n * ice_pkg_buf_get_active_sections\n * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc())\n@@ -1926,7 +1985,7 @@ static u16 ice_pkg_buf_get_active_sections(struct ice_buf_build *bld)\n *\n * Return a pointer to the buffer's header\n */\n-static struct ice_buf *ice_pkg_buf(struct ice_buf_build *bld)\n+struct ice_buf *ice_pkg_buf(struct ice_buf_build *bld)\n {\n \tif (!bld)\n \t\treturn NULL;\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h\nindex 214c7a2837..d4679cc940 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.h\n+++ b/drivers/net/ice/base/ice_flex_pipe.h\n@@ -38,6 +38,12 @@ ice_init_prof_result_bm(struct ice_hw *hw);\n enum ice_status\n ice_get_sw_fv_list(struct ice_hw *hw, u8 *prot_ids, u16 ids_cnt,\n \t\t ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list);\n+enum ice_status\n+ice_pkg_buf_unreserve_section(struct ice_buf_build *bld, u16 count);\n+u16 ice_pkg_buf_get_free_space(struct ice_buf_build *bld);\n+enum ice_status\n+ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,\n+\t\t u16 buf_size, struct ice_sq_cd *cd);\n bool\n ice_get_open_tunnel_port(struct ice_hw *hw, enum ice_tunnel_type type,\n \t\t\t u16 *port);\n@@ -75,6 +81,11 @@ void ice_clear_hw_tbls(struct ice_hw *hw);\n void ice_free_hw_tbls(struct ice_hw *hw);\n enum ice_status\n ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id);\n+struct ice_buf_build *\n+ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,\n+\t\t\t\t void **section);\n+struct ice_buf *ice_pkg_buf(struct ice_buf_build *bld);\n+void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld);\n \n enum ice_status\n ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,\ndiff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h\nindex 1dd57baccd..169476369b 100644\n--- a/drivers/net/ice/base/ice_flex_type.h\n+++ b/drivers/net/ice/base/ice_flex_type.h\n@@ -786,4 +786,30 @@ enum ice_prof_type {\n \tICE_PROF_TUN_ALL = 0xE,\n \tICE_PROF_ALL = 0xFF,\n };\n+\n+/* Number of bits/bytes contained in meta init entry. Note, this should be a\n+ * multiple of 32 bits.\n+ */\n+#define ICE_META_INIT_BITS\t192\n+#define ICE_META_INIT_DW_CNT\t(ICE_META_INIT_BITS / (sizeof(__le32) * \\\n+\t\t\t\t BITS_PER_BYTE))\n+\n+/* The meta init Flag field starts at this bit */\n+#define ICE_META_FLAGS_ST\t\t123\n+\n+/* The entry and bit to check for Double VLAN Mode (DVM) support */\n+#define ICE_META_VLAN_MODE_ENTRY\t0\n+#define ICE_META_FLAG_VLAN_MODE\t\t60\n+#define ICE_META_VLAN_MODE_BIT\t\t(ICE_META_FLAGS_ST + \\\n+\t\t\t\t\t ICE_META_FLAG_VLAN_MODE)\n+\n+struct ice_meta_init_entry {\n+\t__le32 bm[ICE_META_INIT_DW_CNT];\n+};\n+\n+struct ice_meta_init_section {\n+\t__le16 count;\n+\t__le16 offset;\n+\tstruct ice_meta_init_entry entry[1];\n+};\n #endif /* _ICE_FLEX_TYPE_H_ */\ndiff --git a/drivers/net/ice/base/ice_vlan_mode.c b/drivers/net/ice/base/ice_vlan_mode.c\nindex 603de74e25..c4e7a40295 100644\n--- a/drivers/net/ice/base/ice_vlan_mode.c\n+++ b/drivers/net/ice/base/ice_vlan_mode.c\n@@ -5,6 +5,81 @@\n #include \"ice_vlan_mode.h\"\n #include \"ice_common.h\"\n \n+/**\n+ * ice_pkg_get_supported_vlan_mode - chk if DDP supports Double VLAN mode (DVM)\n+ * @hw: pointer to the HW struct\n+ * @dvm: output variable to determine if DDP supports DVM(true) or SVM(false)\n+ */\n+static enum ice_status\n+ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm)\n+{\n+\tu16 meta_init_size = sizeof(struct ice_meta_init_section);\n+\tstruct ice_meta_init_section *sect;\n+\tstruct ice_buf_build *bld;\n+\tenum ice_status status;\n+\n+\t/* if anything fails, we assume there is no DVM support */\n+\t*dvm = false;\n+\n+\tbld = ice_pkg_buf_alloc_single_section(hw,\n+\t\t\t\t\t ICE_SID_RXPARSER_METADATA_INIT,\n+\t\t\t\t\t meta_init_size, (void **)§);\n+\tif (!bld)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\t/* only need to read a single section */\n+\tsect->count = CPU_TO_LE16(1);\n+\tsect->offset = CPU_TO_LE16(ICE_META_VLAN_MODE_ENTRY);\n+\n+\tstatus = ice_aq_upload_section(hw,\n+\t\t\t\t (struct ice_buf_hdr *)ice_pkg_buf(bld),\n+\t\t\t\t ICE_PKG_BUF_SIZE, NULL);\n+\tif (!status) {\n+\t\tice_declare_bitmap(entry, ICE_META_INIT_BITS);\n+\t\tu32 arr[ICE_META_INIT_DW_CNT];\n+\t\tu16 i;\n+\n+\t\t/* convert to host bitmap format */\n+\t\tfor (i = 0; i < ICE_META_INIT_DW_CNT; i++)\n+\t\t\tarr[i] = LE32_TO_CPU(sect->entry[0].bm[i]);\n+\n+\t\tice_bitmap_from_array32(entry, arr, (u16)ICE_META_INIT_BITS);\n+\n+\t\t/* check if DVM is supported */\n+\t\t*dvm = ice_is_bit_set(entry, ICE_META_VLAN_MODE_BIT);\n+\t}\n+\n+\tice_pkg_buf_free(hw, bld);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * ice_is_dvm_supported - check if double VLAN mode is supported based on DDP\n+ * @hw: pointer to the hardware structure\n+ *\n+ * Returns true if DVM is supported and false if only SVM is supported. This\n+ * function should only be called while the global config lock is held and after\n+ * the package has been successfully downloaded.\n+ */\n+static bool ice_is_dvm_supported(struct ice_hw *hw)\n+{\n+\tenum ice_status status;\n+\tbool pkg_supports_dvm;\n+\n+\tstatus = ice_pkg_get_supported_vlan_mode(hw, &pkg_supports_dvm);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_PKG, \"Failed to get supported VLAN mode, err %d\\n\",\n+\t\t\t status);\n+\t\treturn false;\n+\t}\n+\n+\tif (!pkg_supports_dvm)\n+\t\treturn false;\n+\n+\treturn true;\n+}\n+\n /**\n * ice_set_svm - set single VLAN mode\n * @hw: pointer to the HW structure\n@@ -34,6 +109,9 @@ enum ice_status ice_set_vlan_mode(struct ice_hw *hw)\n {\n \tenum ice_status status = ICE_ERR_NOT_IMPL;\n \n+\tif (!ice_is_dvm_supported(hw))\n+\t\treturn ICE_SUCCESS;\n+\n \tif (hw->vlan_mode_ops.set_dvm)\n \t\tstatus = hw->vlan_mode_ops.set_dvm(hw);\n \n", "prefixes": [ "06/22" ] }