get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/9633/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 9633,
    "url": "http://patches.dpdk.org/api/patches/9633/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1450856233-11825-3-git-send-email-shaopeng.he@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1450856233-11825-3-git-send-email-shaopeng.he@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1450856233-11825-3-git-send-email-shaopeng.he@intel.com",
    "date": "2015-12-23T07:37:09",
    "name": "[dpdk-dev,v5,2/6] fm10k: setup rx queue interrupts for PF and VF",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d7db9fd4b258edd5d82365c8c6cd920bc3c1f0fb",
    "submitter": {
        "id": 226,
        "url": "http://patches.dpdk.org/api/people/226/?format=api",
        "name": "He, Shaopeng",
        "email": "shaopeng.he@intel.com"
    },
    "delegate": {
        "id": 10,
        "url": "http://patches.dpdk.org/api/users/10/?format=api",
        "username": "bruce",
        "first_name": "Bruce",
        "last_name": "Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1450856233-11825-3-git-send-email-shaopeng.he@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/9633/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/9633/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 492408D93;\n\tWed, 23 Dec 2015 08:37:29 +0100 (CET)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 74CAE5A71\n\tfor <dev@dpdk.org>; Wed, 23 Dec 2015 08:37:26 +0100 (CET)",
            "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga102.jf.intel.com with ESMTP; 22 Dec 2015 23:37:25 -0800",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga003.jf.intel.com with ESMTP; 22 Dec 2015 23:37:24 -0800",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id tBN7bM4Z015528;\n\tWed, 23 Dec 2015 15:37:22 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid tBN7bKh1011874; Wed, 23 Dec 2015 15:37:22 +0800",
            "(from heshaope@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tBN7bKOp011870; \n\tWed, 23 Dec 2015 15:37:20 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.20,467,1444719600\"; d=\"scan'208\";a=\"713342313\"",
        "From": "Shaopeng He <shaopeng.he@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Wed, 23 Dec 2015 15:37:09 +0800",
        "Message-Id": "<1450856233-11825-3-git-send-email-shaopeng.he@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1450856233-11825-1-git-send-email-shaopeng.he@intel.com>",
        "References": "<1450693192-14500-1-git-send-email-shaopeng.he@intel.com>\n\t<1450856233-11825-1-git-send-email-shaopeng.he@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v5 2/6] fm10k: setup rx queue interrupts for PF\n\tand VF",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "In interrupt mode, each rx queue can have one interrupt to notify the up\nlayer application when packets are available in that queue. Some queues\nalso can share one interrupt.\nCurrently, fm10k needs one separate interrupt for mailbox. So, only those\ndrivers which support multiple interrupt vectors e.g. vfio-pci can work\nin fm10k interrupt mode.\nThis patch uses the RXINT/INT_MAP registers to map interrupt causes\n(rx queue and other events) to vectors, and enable these interrupts\nthrough kernel drivers like vfio-pci.\n\nv5 changes:\n  - add more clean up when memory allocation fails\n  - split line over 80 characters to 2 lines\n  - update interrupt mode limitation in fm10k.rst\n\nv4 change:\n  - update release note inside the patch\n\nv3 change:\n  - macro renaming according to the EAL change\n\nv2 changes:\n  - split one big patch into three smaller ones\n  - reword some comments and commit messages\n\nSigned-off-by: Shaopeng He <shaopeng.he@intel.com>\n---\n doc/guides/nics/fm10k.rst            |   7 +++\n doc/guides/rel_notes/release_2_3.rst |   2 +\n drivers/net/fm10k/fm10k.h            |   3 +\n drivers/net/fm10k/fm10k_ethdev.c     | 105 +++++++++++++++++++++++++++++++----\n 4 files changed, 106 insertions(+), 11 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/fm10k.rst b/doc/guides/nics/fm10k.rst\nindex 4206b7f..dc5cb6e 100644\n--- a/doc/guides/nics/fm10k.rst\n+++ b/doc/guides/nics/fm10k.rst\n@@ -65,3 +65,10 @@ The FM10000 family of NICS support a maximum of a 15K jumbo frame. The value\n is fixed and cannot be changed. So, even when the ``rxmode.max_rx_pkt_len``\n member of ``struct rte_eth_conf`` is set to a value lower than 15364, frames\n up to 15364 bytes can still reach the host interface.\n+\n+Interrupt mode\n+~~~~~~~~~~~~~~~~~~~~~\n+\n+The FM10000 family of NICS need one separate interrupt for mailbox. So only\n+drivers which support multiple interrupt vectors e.g. vfio-pci can work\n+for fm10k interrupt mode.\ndiff --git a/doc/guides/rel_notes/release_2_3.rst b/doc/guides/rel_notes/release_2_3.rst\nindex 99de186..2cb5ebd 100644\n--- a/doc/guides/rel_notes/release_2_3.rst\n+++ b/doc/guides/rel_notes/release_2_3.rst\n@@ -4,6 +4,8 @@ DPDK Release 2.3\n New Features\n ------------\n \n+* **Added fm10k Rx interrupt support.**\n+\n \n Resolved Issues\n ---------------\ndiff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h\nindex e2f677a..770d6ba 100644\n--- a/drivers/net/fm10k/fm10k.h\n+++ b/drivers/net/fm10k/fm10k.h\n@@ -129,6 +129,9 @@\n #define RTE_FM10K_TX_MAX_FREE_BUF_SZ    64\n #define RTE_FM10K_DESCS_PER_LOOP    4\n \n+#define FM10K_MISC_VEC_ID               RTE_INTR_VEC_ZERO_OFFSET\n+#define FM10K_RX_VEC_START              RTE_INTR_VEC_RXTX_OFFSET\n+\n #define FM10K_SIMPLE_TX_FLAG ((uint32_t)ETH_TXQ_FLAGS_NOMULTSEGS | \\\n \t\t\t\tETH_TXQ_FLAGS_NOOFFLOADS)\n \ndiff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c\nindex d39c33b..583335a 100644\n--- a/drivers/net/fm10k/fm10k_ethdev.c\n+++ b/drivers/net/fm10k/fm10k_ethdev.c\n@@ -54,6 +54,8 @@\n /* Number of chars per uint32 type */\n #define CHARS_PER_UINT32 (sizeof(uint32_t))\n #define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)\n+/* default 1:1 map from queue ID to interrupt vector ID */\n+#define Q2V(dev, queue_id) (dev->pci_dev->intr_handle.intr_vec[queue_id])\n \n static void fm10k_close_mbx_service(struct fm10k_hw *hw);\n static void fm10k_dev_promiscuous_enable(struct rte_eth_dev *dev);\n@@ -109,6 +111,8 @@ struct fm10k_xstats_name_off fm10k_hw_stats_tx_q_strings[] = {\n \n #define FM10K_NB_XSTATS (FM10K_NB_HW_XSTATS + FM10K_MAX_QUEUES_PF * \\\n \t\t(FM10K_NB_RX_Q_XSTATS + FM10K_NB_TX_Q_XSTATS))\n+static int\n+fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev);\n \n static void\n fm10k_mbx_initlock(struct fm10k_hw *hw)\n@@ -687,6 +691,7 @@ static int\n fm10k_dev_rx_init(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n \tint i, ret;\n \tstruct fm10k_rx_queue *rxq;\n \tuint64_t base_addr;\n@@ -694,10 +699,25 @@ fm10k_dev_rx_init(struct rte_eth_dev *dev)\n \tuint32_t rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;\n \tuint16_t buf_size;\n \n-\t/* Disable RXINT to avoid possible interrupt */\n-\tfor (i = 0; i < hw->mac.max_queues; i++)\n+\t/* enable RXINT for interrupt mode */\n+\ti = 0;\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tfor (; i < dev->data->nb_rx_queues; i++) {\n+\t\t\tFM10K_WRITE_REG(hw, FM10K_RXINT(i), Q2V(dev, i));\n+\t\t\tif (hw->mac.type == fm10k_mac_pf)\n+\t\t\t\tFM10K_WRITE_REG(hw, FM10K_ITR(Q2V(dev, i)),\n+\t\t\t\t\tFM10K_ITR_AUTOMASK |\n+\t\t\t\t\tFM10K_ITR_MASK_CLEAR);\n+\t\t\telse\n+\t\t\t\tFM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(dev, i)),\n+\t\t\t\t\tFM10K_ITR_AUTOMASK |\n+\t\t\t\t\tFM10K_ITR_MASK_CLEAR);\n+\t\t}\n+\t}\n+\t/* Disable other RXINT to avoid possible interrupt */\n+\tfor (; i < hw->mac.max_queues; i++)\n \t\tFM10K_WRITE_REG(hw, FM10K_RXINT(i),\n-\t\t\t\t3 << FM10K_RXINT_TIMER_SHIFT);\n+\t\t\t3 << FM10K_RXINT_TIMER_SHIFT);\n \n \t/* Setup RX queues */\n \tfor (i = 0; i < dev->data->nb_rx_queues; ++i) {\n@@ -1053,6 +1073,9 @@ fm10k_dev_start(struct rte_eth_dev *dev)\n \t\treturn diag;\n \t}\n \n+\tif (fm10k_dev_rxq_interrupt_setup(dev))\n+\t\treturn -EIO;\n+\n \tdiag = fm10k_dev_rx_init(dev);\n \tif (diag) {\n \t\tPMD_INIT_LOG(ERR, \"RX init failed: %d\", diag);\n@@ -2072,7 +2095,7 @@ fm10k_dev_enable_intr_pf(struct rte_eth_dev *dev)\n \tuint32_t int_map = FM10K_INT_MAP_IMMEDIATE;\n \n \t/* Bind all local non-queue interrupt to vector 0 */\n-\tint_map |= 0;\n+\tint_map |= FM10K_MISC_VEC_ID;\n \n \tFM10K_WRITE_REG(hw, FM10K_INT_MAP(fm10k_int_Mailbox), int_map);\n \tFM10K_WRITE_REG(hw, FM10K_INT_MAP(fm10k_int_PCIeFault), int_map);\n@@ -2103,7 +2126,7 @@ fm10k_dev_disable_intr_pf(struct rte_eth_dev *dev)\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t int_map = FM10K_INT_MAP_DISABLE;\n \n-\tint_map |= 0;\n+\tint_map |= FM10K_MISC_VEC_ID;\n \n \tFM10K_WRITE_REG(hw, FM10K_INT_MAP(fm10k_int_Mailbox), int_map);\n \tFM10K_WRITE_REG(hw, FM10K_INT_MAP(fm10k_int_PCIeFault), int_map);\n@@ -2134,7 +2157,7 @@ fm10k_dev_enable_intr_vf(struct rte_eth_dev *dev)\n \tuint32_t int_map = FM10K_INT_MAP_IMMEDIATE;\n \n \t/* Bind all local non-queue interrupt to vector 0 */\n-\tint_map |= 0;\n+\tint_map |= FM10K_MISC_VEC_ID;\n \n \t/* Only INT 0 available, other 15 are reserved. */\n \tFM10K_WRITE_REG(hw, FM10K_VFINT_MAP, int_map);\n@@ -2151,7 +2174,7 @@ fm10k_dev_disable_intr_vf(struct rte_eth_dev *dev)\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t int_map = FM10K_INT_MAP_DISABLE;\n \n-\tint_map |= 0;\n+\tint_map |= FM10K_MISC_VEC_ID;\n \n \t/* Only INT 0 available, other 15 are reserved. */\n \tFM10K_WRITE_REG(hw, FM10K_VFINT_MAP, int_map);\n@@ -2162,6 +2185,66 @@ fm10k_dev_disable_intr_vf(struct rte_eth_dev *dev)\n }\n \n static int\n+fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)\n+{\n+\tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tuint32_t intr_vector, vec;\n+\tuint16_t queue_id;\n+\tint result = 0;\n+\n+\t/* fm10k needs one separate interrupt for mailbox,\n+\t * so only drivers which support multiple interrupt vectors\n+\t * e.g. vfio-pci can work for fm10k interrupt mode\n+\t */\n+\tif (!rte_intr_cap_multiple(intr_handle) ||\n+\t\t\tdev->data->dev_conf.intr_conf.rxq == 0)\n+\t\treturn result;\n+\n+\tintr_vector = dev->data->nb_rx_queues;\n+\n+\t/* disable interrupt first */\n+\trte_intr_disable(&dev->pci_dev->intr_handle);\n+\tif (hw->mac.type == fm10k_mac_pf)\n+\t\tfm10k_dev_disable_intr_pf(dev);\n+\telse\n+\t\tfm10k_dev_disable_intr_vf(dev);\n+\n+\tif (rte_intr_efd_enable(intr_handle, intr_vector)) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to init event fd\");\n+\t\tresult = -EIO;\n+\t}\n+\n+\tif (rte_intr_dp_is_en(intr_handle) && !result) {\n+\t\tintr_handle->intr_vec =\trte_zmalloc(\"intr_vec\",\n+\t\t\tdev->data->nb_rx_queues * sizeof(int), 0);\n+\t\tif (intr_handle->intr_vec) {\n+\t\t\tfor (queue_id = 0, vec = FM10K_RX_VEC_START;\n+\t\t\t\t\tqueue_id < dev->data->nb_rx_queues;\n+\t\t\t\t\tqueue_id++) {\n+\t\t\t\tintr_handle->intr_vec[queue_id] = vec;\n+\t\t\t\tif (vec < intr_handle->nb_efd - 1\n+\t\t\t\t\t\t+ FM10K_RX_VEC_START)\n+\t\t\t\t\tvec++;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n+\t\t\t\t\" intr_vec\", dev->data->nb_rx_queues);\n+\t\t\trte_intr_efd_disable(intr_handle);\n+\t\t\tresult = -ENOMEM;\n+\t\t}\n+\t}\n+\n+\tif (hw->mac.type == fm10k_mac_pf)\n+\t\tfm10k_dev_enable_intr_pf(dev);\n+\telse\n+\t\tfm10k_dev_enable_intr_vf(dev);\n+\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\thw->mac.ops.update_int_moderator(hw);\n+\treturn result;\n+}\n+\n+static int\n fm10k_dev_handle_fault(struct fm10k_hw *hw, uint32_t eicr)\n {\n \tstruct fm10k_fault fault;\n@@ -2531,7 +2614,7 @@ static int\n eth_fm10k_dev_init(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tint diag;\n+\tint diag, i;\n \tstruct fm10k_macvlan_filter_info *macvlan;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -2637,7 +2720,7 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)\n \t\tfm10k_dev_enable_intr_vf(dev);\n \t}\n \n-\t/* Enable uio intr after callback registered */\n+\t/* Enable intr after callback registered */\n \trte_intr_enable(&(dev->pci_dev->intr_handle));\n \n \thw->mac.ops.update_int_moderator(hw);\n@@ -2645,7 +2728,6 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)\n \t/* Make sure Switch Manager is ready before going forward. */\n \tif (hw->mac.type == fm10k_mac_pf) {\n \t\tint switch_ready = 0;\n-\t\tint i;\n \n \t\tfor (i = 0; i < MAX_QUERY_SWITCH_STATE_TIMES; i++) {\n \t\t\tfm10k_mbx_lock(hw);\n@@ -2752,7 +2834,8 @@ static struct eth_driver rte_pmd_fm10k = {\n \t.pci_drv = {\n \t\t.name = \"rte_pmd_fm10k\",\n \t\t.id_table = pci_id_fm10k_map,\n-\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,\n+\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |\n+\t\t\tRTE_PCI_DRV_DETACHABLE,\n \t},\n \t.eth_dev_init = eth_fm10k_dev_init,\n \t.eth_dev_uninit = eth_fm10k_dev_uninit,\n",
    "prefixes": [
        "dpdk-dev",
        "v5",
        "2/6"
    ]
}