Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/95914/?format=api
{ "id": 95914, "url": "http://patches.dpdk.org/api/patches/95914/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210715164126.54073-9-shirik@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210715164126.54073-9-shirik@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210715164126.54073-9-shirik@nvidia.com", "date": "2021-07-15T16:41:18", "name": "[v8,08/16] crypto/mlx5: create login object using DevX", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "6baeb9d680f657829f6d449f5e1b911a678ecf30", "submitter": { "id": 1894, "url": "http://patches.dpdk.org/api/people/1894/?format=api", "name": "Shiri Kuzin", "email": "shirik@nvidia.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210715164126.54073-9-shirik@nvidia.com/mbox/", "series": [ { "id": 17843, "url": "http://patches.dpdk.org/api/series/17843/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=17843", "date": "2021-07-15T16:41:10", "name": "drivers: introduce mlx5 crypto PMD", "version": 8, "mbox": "http://patches.dpdk.org/series/17843/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/95914/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/95914/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DA38AA0C41;\n\tThu, 15 Jul 2021 18:43:03 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3E16141275;\n\tThu, 15 Jul 2021 18:42:24 +0200 (CEST)", "from NAM12-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam12on2087.outbound.protection.outlook.com [40.107.237.87])\n by mails.dpdk.org (Postfix) with ESMTP id 7102D41314\n for <dev@dpdk.org>; Thu, 15 Jul 2021 18:42:19 +0200 (CEST)", "from MW4P221CA0016.NAMP221.PROD.OUTLOOK.COM (2603:10b6:303:8b::21)\n by DM6PR12MB3132.namprd12.prod.outlook.com (2603:10b6:5:3c::27) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4308.23; Thu, 15 Jul\n 2021 16:42:17 +0000", "from CO1NAM11FT015.eop-nam11.prod.protection.outlook.com\n (2603:10b6:303:8b:cafe::11) by MW4P221CA0016.outlook.office365.com\n (2603:10b6:303:8b::21) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4331.21 via Frontend\n Transport; Thu, 15 Jul 2021 16:42:17 +0000", "from mail.nvidia.com (216.228.112.34) by\n CO1NAM11FT015.mail.protection.outlook.com (10.13.175.130) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4331.21 via Frontend Transport; Thu, 15 Jul 2021 16:42:17 +0000", "from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com\n (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 15 Jul\n 2021 16:42:12 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=ADhz/ZNiX2Y3Qp9AUf7t5NUDJL8v/F4lBiitRsil3V6+/DdlRYilSy/EGU5ScPINihomNA+e62Mmw5+yAS2yoy2Eo5sz81xOea4B2vfYRtkVeokKYnCahy2csl7UsJk+UhJKGvDeJGYJA3IB+6PbaVsO7HgPhwxBVpv6gQzUy6168AplHuDlYmYR6LbGVLstDM8bQg9tD91pnoufv48619Q3GmfCe9/Smm0+3t0lQgDc2gKh0LXtGvUG6slwz994dOHzCDl36w0rBbMX3rTRZZwA7GTZaPthrUWWk8Puz//slOpoWdbYZxeH8cLgfUmyLHpLaEF8f7g4l4g62FC4qQ==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=uwcnV+38iIzlgyAZ2ajKk8JPMWkwROpON9kr1/u/PZ0=;\n b=CofZ9SP2z8LF3exIz32eQh03xpg2hheKdrwFAKSf50/7KvPe/8iWbSz637zWHbjHKc3lBz1tpmQ+RSLsJtiuc1PcaRtErQUz9S/g+75ttholvfG8jvoJe8m7Wpl01wSfSeDeUnreghUYyaBQUph4+ljElhLVLV4W1eiQsQXaqIPlTstEl2v+7GMC4g0Jl4D5WkAFf+9Y8Rf/U6TQ47L+LXt659Hqehq+R/orx9sP05s3STyfe6A1yBTQgMx4CHRRtSvOqe0Q0myHXrFaae7vTVBAmzVr5EMH1jT23ZZhX5TUMSIr4EH1yjzzviJeNVBKEYsjINil4bPfsfBByc/Qow==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=redhat.com smtp.mailfrom=nvidia.com;\n dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=uwcnV+38iIzlgyAZ2ajKk8JPMWkwROpON9kr1/u/PZ0=;\n b=fxSTxMSf8TCPrcxP+2feO+PJ5c9J6qkx7XSpLusnV9o3h8HoJG/fDYRmWcLoOz+6bw1dPRaioPLE51/J9ZZJZEBLdBnaw0J0wj64mwuJBmYQD7om4ZY6ICGkmxHJcyKkzMwG+8OxW2VvD+v5dUOBP81Sag7Ve9JS/40ag0312L0HgicVTGeXVizTCAhs4wL3Vc1aFnJ1f0S7LwCanO8avCt8x4f8EJjBUuA5mBjnNhgvdLlWs2GKjBwAzYyVzRuzXEtPBjqmELXjejJGwmqoepVddG2To0Enyp4SBbBmwQZzklT7SN+DvxAXCrDH75FfDlMqtnioFVGpKRK5S5mf3g==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; redhat.com; dkim=none (message not signed)\n header.d=none;redhat.com; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Shiri Kuzin <shirik@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<matan@nvidia.com>, <gakhil@marvell.com>, <suanmingm@nvidia.com>,\n <david.marchand@redhat.com>", "Date": "Thu, 15 Jul 2021 19:41:18 +0300", "Message-ID": "<20210715164126.54073-9-shirik@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20210715164126.54073-1-shirik@nvidia.com>", "References": "<20210715150817.51485-1-shirik@nvidia.com>\n <20210715164126.54073-1-shirik@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL105.nvidia.com (172.20.187.12) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "506e01b3-61bf-4f45-d8ac-08d947af8225", "X-MS-TrafficTypeDiagnostic": "DM6PR12MB3132:", "X-Microsoft-Antispam-PRVS": "\n <DM6PR12MB3132ED8544C54F5C8FB9E93AAA129@DM6PR12MB3132.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:117;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n d14i4WNiB7hitHwbHtL3tYND4xb9ek3SHasQc0K+aifYr0Ezrv2tBgvlQ1i4wC7yCWBgWYhgr8Lkf0/0yR31K/9869t+5JtWftUi9SXQaqQR58q+Bkfw1kCPuY7VHGxgYTyQsPJE4uwjUpDJL6nFwB7A8VDS4Uo/HSmlFFU1x14jmltVdwhwcq17jnQoRcuRCTZVJhb8K4Re4ZzR8JOssEpq6wryUD3eAD6B5nu5+DZfCjilcZLMzveBzS7+Xk9JkQlRvIfF6Sx/RQOBGXSP45wsJ0WS0SxLgyoc4CkbjVEBg6Yo8NucQZ/3odcZ5yVMK2FrivjqBpGQXgbqMEuDclXbq4kyHd7s+kvE20b2tATjlGVw5ge0oF0iyn9+FBgXgAI/MzfTXk2lERZsEARSYCjpecch9U3Kpuu8CNNepYsbl0TSt3yHH3i56tbga41ArYGfN4z+zfl8Gp9/NDVWA5VstUEGhFepsZrcyLjnlcY7lCxoLiMC/Yr4fBcCvBBBPQwKq6CWjW7UUfcyJlMTBCD1RYv8TTTLti/Mzbcw4n7WnZeXh8KfXA8ROS382KOu7xz044NESBPS2dNOZL+fO+LADxvZjAPUPe+qeJw+6Dv/Dp4hJtnDBJZlYpAl9xo3iggIW7RlUdn0xrMmsq839KKdco1B652r9s4u1n3rOEfcgvdN0lBoYH24HnVs7de2gZRrmH+ISUwxF6+BsUAhcbvP6kdmjUxvhIWCP6XBpEA=", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(39860400002)(396003)(346002)(136003)(376002)(46966006)(36840700001)(82310400003)(426003)(2616005)(86362001)(26005)(54906003)(316002)(36860700001)(34020700004)(6916009)(356005)(7636003)(82740400003)(478600001)(55016002)(1076003)(8676002)(47076005)(70586007)(186003)(4326008)(70206006)(2906002)(36756003)(36906005)(16526019)(336012)(6286002)(83380400001)(7696005)(5660300002)(8936002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "15 Jul 2021 16:42:17.7113 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 506e01b3-61bf-4f45-d8ac-08d947af8225", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT015.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB3132", "Subject": "[dpdk-dev] [PATCH v8 08/16] crypto/mlx5: create login object using\n DevX", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "To work with crypto engines that are marked with wrapped_import_method,\na login session is required.\nA crypto login object needs to be created using DevX.\n\nThe crypto login object contains:\n\t- The credential pointer.\n\t- The import_KEK pointer to be used for all secured information\n\t communicated in crypto commands (key fields), including the\n\t provided credential in this command.\n\t- The credential secret, wrapped by the import_KEK indicated in\n\t this command. Size includes 8 bytes IV for wrapping.\n\nAdded devargs for the required login values:\n\t- wcs_file - path to the file containing the credential.\n\t- import_kek_id - the import KEK pointer.\n\t- credential_id - the credential pointer.\n\nCreate the login DevX object in pci_probe function and destroy it in\npci_remove.\nDestroying the crypto login object means logout.\n\nSigned-off-by: Shiri Kuzin <shirik@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n doc/guides/cryptodevs/mlx5.rst | 60 +++++++++++++++++\n drivers/crypto/mlx5/mlx5_crypto.c | 103 ++++++++++++++++++++++++++++++\n drivers/crypto/mlx5/mlx5_crypto.h | 7 ++\n 3 files changed, 170 insertions(+)", "diff": "diff --git a/doc/guides/cryptodevs/mlx5.rst b/doc/guides/cryptodevs/mlx5.rst\nindex ece881220e..6cae5affbd 100644\n--- a/doc/guides/cryptodevs/mlx5.rst\n+++ b/doc/guides/cryptodevs/mlx5.rst\n@@ -44,6 +44,51 @@ To get the best performances:\n Enabling librte_crypto_mlx5 causes DPDK applications to be linked against\n libibverbs.\n \n+In order to move the device to crypto operational mode, credential and KEK\n+(Key Encrypting Key) should be set as the first step.\n+The credential will be used by the software in order to perform crypto login, and the KEK is\n+the AES Key Wrap Algorithm (rfc3394) key that will be used for sensitive data\n+wrapping.\n+The credential and the AES-XTS keys should be provided to the hardware, as ciphertext\n+encrypted by the KEK.\n+\n+When crypto engines are defined to work in wrapped import method, they come out\n+of the factory in Commissioning mode, and thus, cannot be used for crypto operations\n+yet. A dedicated tool is used for changing the mode from Commissioning to\n+Operational, while setting the first import_KEK and credential in plaintext.\n+The mlxreg dedicated tool should be used as follows:\n+\n+- Set CRYPTO_OPERATIONAL register to set the device in crypto operational mode.\n+\n+ The input to this tool is:\n+ The first credential in plaintext, 40B.\n+ The first import_KEK in plaintext: kek size 0 for 16B or 1 for 32B, kek data.\n+\n+ Example:\n+ mlxreg -d /dev/mst/mt4123_pciconf0 --reg_name CRYPTO_OPERATIONAL --get\n+\n+ The \"wrapped_crypto_operational\" value will be \"0x00000000\".\n+ The command to set the register should be executed only once, and all the\n+ values mentioned above should be specified in the same command.\n+\n+ Example:\n+ mlxreg -d /dev/mst/mt4123_pciconf0 --reg_name CRYPTO_OPERATIONAL\n+ --set \"credential[0]=0x10000000, credential[1]=0x10000000, kek[0]=0x00000000\"\n+\n+ All values not specified will remain 0.\n+ \"wrapped_crypto_going_to_commissioning\" and \"wrapped_crypto_operational\"\n+ should not be specified.\n+\n+ All the device ports should set it in order to move to operational mode.\n+\n+- Query CRYPTO_OPERATIONAL register to make sure the device is in Operational\n+ mode.\n+\n+ Example:\n+ mlxreg -d /dev/mst/mt4123_pciconf0 --reg_name CRYPTO_OPERATIONAL --get\n+ The \"wrapped_crypto_operational\" value will be \"0x00000001\" if the mode was\n+ successfully changed to operational mode.\n+\n \n Driver options\n --------------\n@@ -53,6 +98,21 @@ Driver options\n Select the class of the driver that should probe the device.\n `crypto` for the mlx5 crypto driver.\n \n+- ``wcs_file`` parameter [string] - mandatory\n+\n+ File path including only the wrapped credential in string format of hexadecimal\n+ numbers, represent 48 bytes (8 bytes IV added by the AES key wrap algorithm).\n+\n+- ``import_kek_id`` parameter [int]\n+\n+ The identifier of the KEK, default value is 0 represents the operational\n+ register import_kek..\n+\n+- ``credential_id`` parameter [int]\n+\n+ The identifier of the credential, default value is 0 represents the operational\n+ register credential.\n+\n \n Supported NICs\n --------------\ndiff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c\nindex 38008dcb28..cbaa2e52ff 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.c\n+++ b/drivers/crypto/mlx5/mlx5_crypto.c\n@@ -457,6 +457,101 @@ mlx5_crypto_hw_global_prepare(struct mlx5_crypto_priv *priv)\n \treturn 0;\n }\n \n+\n+static int\n+mlx5_crypto_args_check_handler(const char *key, const char *val, void *opaque)\n+{\n+\tstruct mlx5_crypto_devarg_params *devarg_prms = opaque;\n+\tstruct mlx5_devx_crypto_login_attr *attr = &devarg_prms->login_attr;\n+\tunsigned long tmp;\n+\tFILE *file;\n+\tint ret;\n+\tint i;\n+\n+\tif (strcmp(key, \"class\") == 0)\n+\t\treturn 0;\n+\tif (strcmp(key, \"wcs_file\") == 0) {\n+\t\tfile = fopen(val, \"rb\");\n+\t\tif (file == NULL) {\n+\t\t\trte_errno = ENOTSUP;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tfor (i = 0 ; i < MLX5_CRYPTO_CREDENTIAL_SIZE ; i++) {\n+\t\t\tret = fscanf(file, \"%02hhX\", &attr->credential[i]);\n+\t\t\tif (ret <= 0) {\n+\t\t\t\tfclose(file);\n+\t\t\t\tDRV_LOG(ERR,\n+\t\t\t\t\t\"Failed to read credential from file.\");\n+\t\t\t\trte_errno = EINVAL;\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\t\t}\n+\t\tfclose(file);\n+\t\tdevarg_prms->login_devarg = true;\n+\t\treturn 0;\n+\t}\n+\terrno = 0;\n+\ttmp = strtoul(val, NULL, 0);\n+\tif (errno) {\n+\t\tDRV_LOG(WARNING, \"%s: \\\"%s\\\" is an invalid integer.\", key, val);\n+\t\treturn -errno;\n+\t}\n+\tif (strcmp(key, \"import_kek_id\") == 0)\n+\t\tattr->session_import_kek_ptr = (uint32_t)tmp;\n+\telse if (strcmp(key, \"credential_id\") == 0)\n+\t\tattr->credential_pointer = (uint32_t)tmp;\n+\telse\n+\t\tDRV_LOG(WARNING, \"Invalid key %s.\", key);\n+\treturn 0;\n+}\n+\n+static struct mlx5_devx_obj *\n+mlx5_crypto_config_login(struct rte_devargs *devargs,\n+\t\t\t struct ibv_context *ctx)\n+{\n+\t/*\n+\t * Set credential pointer and session import KEK pointer to a default\n+\t * value of 0.\n+\t */\n+\tstruct mlx5_crypto_devarg_params login = {\n+\t\t\t.login_devarg = false,\n+\t\t\t.login_attr = {\n+\t\t\t\t\t.credential_pointer = 0,\n+\t\t\t\t\t.session_import_kek_ptr = 0,\n+\t\t\t}\n+\t};\n+\tstruct rte_kvargs *kvlist;\n+\n+\tif (devargs == NULL) {\n+\t\tDRV_LOG(ERR,\n+\t\"No login devargs in order to enable crypto operations in the device.\");\n+\t\trte_errno = EINVAL;\n+\t\treturn NULL;\n+\t}\n+\tkvlist = rte_kvargs_parse(devargs->args, NULL);\n+\tif (kvlist == NULL) {\n+\t\tDRV_LOG(ERR, \"Failed to parse devargs.\");\n+\t\trte_errno = EINVAL;\n+\t\treturn NULL;\n+\t}\n+\tif (rte_kvargs_process(kvlist, NULL, mlx5_crypto_args_check_handler,\n+\t\t\t &login) != 0) {\n+\t\tDRV_LOG(ERR, \"Devargs handler function Failed.\");\n+\t\trte_kvargs_free(kvlist);\n+\t\trte_errno = EINVAL;\n+\t\treturn NULL;\n+\t}\n+\trte_kvargs_free(kvlist);\n+\tif (login.login_devarg == false) {\n+\t\tDRV_LOG(ERR,\n+\t\"No login credential devarg in order to enable crypto operations \"\n+\t\"in the device.\");\n+\t\trte_errno = EINVAL;\n+\t\treturn NULL;\n+\t}\n+\treturn mlx5_devx_cmd_create_crypto_login_obj(ctx, &login.login_attr);\n+}\n+\n /**\n * Callback for memory event.\n *\n@@ -512,6 +607,7 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n \tstruct ibv_device *ibv;\n \tstruct rte_cryptodev *crypto_dev;\n \tstruct ibv_context *ctx;\n+\tstruct mlx5_devx_obj *login;\n \tstruct mlx5_crypto_priv *priv;\n \tstruct mlx5_hca_attr attr = { 0 };\n \tstruct rte_cryptodev_pmd_init_params init_params = {\n@@ -550,6 +646,11 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n \t\trte_errno = ENOTSUP;\n \t\treturn -ENOTSUP;\n \t}\n+\tlogin = mlx5_crypto_config_login(pci_dev->device.devargs, ctx);\n+\tif (login == NULL) {\n+\t\tDRV_LOG(ERR, \"Failed to configure login.\");\n+\t\treturn -rte_errno;\n+\t}\n \tcrypto_dev = rte_cryptodev_pmd_create(ibv->name, &pci_dev->device,\n \t\t\t\t\t&init_params);\n \tif (crypto_dev == NULL) {\n@@ -566,6 +667,7 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n \tcrypto_dev->driver_id = mlx5_crypto_driver_id;\n \tpriv = crypto_dev->data->dev_private;\n \tpriv->ctx = ctx;\n+\tpriv->login_obj = login;\n \tpriv->pci_dev = pci_dev;\n \tpriv->crypto_dev = crypto_dev;\n \tif (mlx5_crypto_hw_global_prepare(priv) != 0) {\n@@ -614,6 +716,7 @@ mlx5_crypto_pci_remove(struct rte_pci_device *pdev)\n \t\tmlx5_mr_release_cache(&priv->mr_scache);\n \t\tmlx5_crypto_hw_global_release(priv);\n \t\trte_cryptodev_pmd_destroy(priv->crypto_dev);\n+\t\tclaim_zero(mlx5_devx_cmd_destroy(priv->login_obj));\n \t\tclaim_zero(mlx5_glue->close_device(priv->ctx));\n \t}\n \treturn 0;\ndiff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h\nindex a9fbc0aa82..b98c621c23 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.h\n+++ b/drivers/crypto/mlx5/mlx5_crypto.h\n@@ -29,6 +29,7 @@ struct mlx5_crypto_priv {\n \tstruct mlx5_hlist *dek_hlist; /* Dek hash list. */\n \tstruct rte_cryptodev_config dev_config;\n \tstruct mlx5_mr_share_cache mr_scache; /* Global shared MR cache. */\n+\tstruct mlx5_devx_obj *login_obj;\n };\n \n struct mlx5_crypto_qp {\n@@ -48,6 +49,12 @@ struct mlx5_crypto_dek {\n \tbool size_is_48; /* Whether the key\\data size is 48 bytes or not. */\n } __rte_cache_aligned;\n \n+\n+struct mlx5_crypto_devarg_params {\n+\tbool login_devarg;\n+\tstruct mlx5_devx_crypto_login_attr login_attr;\n+};\n+\n int\n mlx5_crypto_dek_destroy(struct mlx5_crypto_priv *priv,\n \t\t\tstruct mlx5_crypto_dek *dek);\n", "prefixes": [ "v8", "08/16" ] }