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GET /api/patches/94941/?format=api
{ "id": 94941, "url": "http://patches.dpdk.org/api/patches/94941/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1624933761-20884-2-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1624933761-20884-2-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1624933761-20884-2-git-send-email-wenzhuo.lu@intel.com", "date": "2021-06-29T02:29:20", "name": "[v3,1/2] net/ice: add Tx AVX2 offload path", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "2e2f6a328d2ec4a729d36bd09ec6fdfcf003ffe4", "submitter": { "id": 258, "url": "http://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1624933761-20884-2-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 17509, "url": "http://patches.dpdk.org/api/series/17509/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=17509", "date": "2021-06-29T02:29:19", "name": "add Rx/Tx offload paths for ICE AVX2", "version": 3, "mbox": "http://patches.dpdk.org/series/17509/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/94941/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/94941/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 54781A0A0C;\n\tTue, 29 Jun 2021 04:29:38 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 056E641166;\n\tTue, 29 Jun 2021 04:29:38 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 9F81F4068A\n for <dev@dpdk.org>; Tue, 29 Jun 2021 04:29:32 +0200 (CEST)", "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 28 Jun 2021 19:29:32 -0700", "from dpdk-wenzhuo-haswell.sh.intel.com ([10.67.110.186])\n by orsmga007.jf.intel.com with ESMTP; 28 Jun 2021 19:29:30 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10029\"; a=\"293708436\"", "E=Sophos;i=\"5.83,307,1616482800\"; d=\"scan'208\";a=\"293708436\"", "E=Sophos;i=\"5.83,307,1616482800\"; d=\"scan'208\";a=\"446847040\"" ], "X-ExtLoop1": "1", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "Date": "Tue, 29 Jun 2021 10:29:20 +0800", "Message-Id": "<1624933761-20884-2-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1624933761-20884-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1622600462-39088-1-git-send-email-wenzhuo.lu@intel.com>\n <1624933761-20884-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 1/2] net/ice: add Tx AVX2 offload path", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add a specific path for TX AVX2.\nIn this path, support the HW offload features, like,\nchecksum insertion, VLAN insertion.\nThis path is chosen automatically according to the\nconfiguration.\n\n'inline' is used, then the duplicate code is generated\nby the compiler.\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\n---\n drivers/net/ice/ice_rxtx.c | 37 ++++++++++++++++---------\n drivers/net/ice/ice_rxtx.h | 2 ++\n drivers/net/ice/ice_rxtx_vec_avx2.c | 54 ++++++++++++++++++++++++++-----------\n 3 files changed, 65 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex fc9bb5a..5419047 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -3288,7 +3288,7 @@\n #ifdef RTE_ARCH_X86\n \tstruct ice_tx_queue *txq;\n \tint i;\n-\tint tx_check_ret = 0;\n+\tint tx_check_ret = -1;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n \t\tad->tx_use_avx2 = false;\n@@ -3307,13 +3307,14 @@\n \t\t\tPMD_DRV_LOG(NOTICE,\n \t\t\t\t\"AVX512 is not supported in build env\");\n #endif\n-\t\t\tif (!ad->tx_use_avx512 && tx_check_ret == ICE_VECTOR_PATH &&\n-\t\t\t(rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||\n-\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&\n-\t\t\trte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)\n+\t\t\tif (!ad->tx_use_avx512 &&\n+\t\t\t\t(rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||\n+\t\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&\n+\t\t\t\trte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)\n \t\t\t\tad->tx_use_avx2 = true;\n \n-\t\t\tif (!ad->tx_use_avx512 && tx_check_ret == ICE_VECTOR_OFFLOAD_PATH)\n+\t\t\tif (!ad->tx_use_avx2 && !ad->tx_use_avx512 &&\n+\t\t\t\ttx_check_ret == ICE_VECTOR_OFFLOAD_PATH)\n \t\t\t\tad->tx_vec_allowed = false;\n \n \t\t\tif (ad->tx_vec_allowed) {\n@@ -3331,6 +3332,7 @@\n \t}\n \n \tif (ad->tx_vec_allowed) {\n+\t\tdev->tx_pkt_prepare = NULL;\n \t\tif (ad->tx_use_avx512) {\n #ifdef CC_AVX512_SUPPORT\n \t\t\tif (tx_check_ret == ICE_VECTOR_OFFLOAD_PATH) {\n@@ -3339,6 +3341,7 @@\n \t\t\t\t\t dev->data->port_id);\n \t\t\t\tdev->tx_pkt_burst =\n \t\t\t\t\tice_xmit_pkts_vec_avx512_offload;\n+\t\t\t\tdev->tx_pkt_prepare = ice_prep_pkts;\n \t\t\t} else {\n \t\t\t\tPMD_DRV_LOG(NOTICE,\n \t\t\t\t\t \"Using AVX512 Vector Tx (port %d).\",\n@@ -3347,14 +3350,22 @@\n \t\t\t}\n #endif\n \t\t} else {\n-\t\t\tPMD_DRV_LOG(DEBUG, \"Using %sVector Tx (port %d).\",\n-\t\t\t\t ad->tx_use_avx2 ? \"avx2 \" : \"\",\n-\t\t\t\t dev->data->port_id);\n-\t\t\tdev->tx_pkt_burst = ad->tx_use_avx2 ?\n-\t\t\t\t\t ice_xmit_pkts_vec_avx2 :\n-\t\t\t\t\t ice_xmit_pkts_vec;\n+\t\t\tif (tx_check_ret == ICE_VECTOR_OFFLOAD_PATH) {\n+\t\t\t\tPMD_DRV_LOG(NOTICE,\n+\t\t\t\t\t \"Using AVX2 OFFLOAD Vector Tx (port %d).\",\n+\t\t\t\t\t dev->data->port_id);\n+\t\t\t\tdev->tx_pkt_burst =\n+\t\t\t\t\tice_xmit_pkts_vec_avx2_offload;\n+\t\t\t\tdev->tx_pkt_prepare = ice_prep_pkts;\n+\t\t\t} else {\n+\t\t\t\tPMD_DRV_LOG(DEBUG, \"Using %sVector Tx (port %d).\",\n+\t\t\t\t\t ad->tx_use_avx2 ? \"avx2 \" : \"\",\n+\t\t\t\t\t dev->data->port_id);\n+\t\t\t\tdev->tx_pkt_burst = ad->tx_use_avx2 ?\n+\t\t\t\t\t\t ice_xmit_pkts_vec_avx2 :\n+\t\t\t\t\t\t ice_xmit_pkts_vec;\n+\t\t\t}\n \t\t}\n-\t\tdev->tx_pkt_prepare = NULL;\n \n \t\treturn;\n \t}\ndiff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h\nindex 86b6f3d..f0536f7 100644\n--- a/drivers/net/ice/ice_rxtx.h\n+++ b/drivers/net/ice/ice_rxtx.h\n@@ -255,6 +255,8 @@ uint16_t ice_recv_scattered_pkts_vec_avx2(void *rx_queue,\n \t\t\t\t\t uint16_t nb_pkts);\n uint16_t ice_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t\tuint16_t nb_pkts);\n+uint16_t ice_xmit_pkts_vec_avx2_offload(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t\t\tuint16_t nb_pkts);\n uint16_t ice_recv_pkts_vec_avx512(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t\t\t uint16_t nb_pkts);\n uint16_t ice_recv_pkts_vec_avx512_offload(void *rx_queue,\ndiff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c\nindex 165bc1b..b72946b 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx2.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c\n@@ -769,30 +769,32 @@\n \t\t\t\trx_pkts + retval, nb_pkts);\n }\n \n-static inline void\n+static __rte_always_inline void\n ice_vtx1(volatile struct ice_tx_desc *txdp,\n-\t struct rte_mbuf *pkt, uint64_t flags)\n+\t struct rte_mbuf *pkt, uint64_t flags, bool offload)\n {\n \tuint64_t high_qw =\n \t\t(ICE_TX_DESC_DTYPE_DATA |\n \t\t ((uint64_t)flags << ICE_TXD_QW1_CMD_S) |\n \t\t ((uint64_t)pkt->data_len << ICE_TXD_QW1_TX_BUF_SZ_S));\n+\tif (offload)\n+\t\tice_txd_enable_offload(pkt, &high_qw);\n \n \t__m128i descriptor = _mm_set_epi64x(high_qw,\n \t\t\t\tpkt->buf_iova + pkt->data_off);\n \t_mm_store_si128((__m128i *)txdp, descriptor);\n }\n \n-static inline void\n+static __rte_always_inline void\n ice_vtx(volatile struct ice_tx_desc *txdp,\n-\tstruct rte_mbuf **pkt, uint16_t nb_pkts, uint64_t flags)\n+\tstruct rte_mbuf **pkt, uint16_t nb_pkts, uint64_t flags, bool offload)\n {\n \tconst uint64_t hi_qw_tmpl = (ICE_TX_DESC_DTYPE_DATA |\n \t\t\t((uint64_t)flags << ICE_TXD_QW1_CMD_S));\n \n \t/* if unaligned on 32-bit boundary, do one to align */\n \tif (((uintptr_t)txdp & 0x1F) != 0 && nb_pkts != 0) {\n-\t\tice_vtx1(txdp, *pkt, flags);\n+\t\tice_vtx1(txdp, *pkt, flags, offload);\n \t\tnb_pkts--, txdp++, pkt++;\n \t}\n \n@@ -802,18 +804,26 @@\n \t\t\thi_qw_tmpl |\n \t\t\t((uint64_t)pkt[3]->data_len <<\n \t\t\t ICE_TXD_QW1_TX_BUF_SZ_S);\n+\t\tif (offload)\n+\t\t\tice_txd_enable_offload(pkt[3], &hi_qw3);\n \t\tuint64_t hi_qw2 =\n \t\t\thi_qw_tmpl |\n \t\t\t((uint64_t)pkt[2]->data_len <<\n \t\t\t ICE_TXD_QW1_TX_BUF_SZ_S);\n+\t\tif (offload)\n+\t\t\tice_txd_enable_offload(pkt[2], &hi_qw2);\n \t\tuint64_t hi_qw1 =\n \t\t\thi_qw_tmpl |\n \t\t\t((uint64_t)pkt[1]->data_len <<\n \t\t\t ICE_TXD_QW1_TX_BUF_SZ_S);\n+\t\tif (offload)\n+\t\t\tice_txd_enable_offload(pkt[1], &hi_qw1);\n \t\tuint64_t hi_qw0 =\n \t\t\thi_qw_tmpl |\n \t\t\t((uint64_t)pkt[0]->data_len <<\n \t\t\t ICE_TXD_QW1_TX_BUF_SZ_S);\n+\t\tif (offload)\n+\t\t\tice_txd_enable_offload(pkt[0], &hi_qw0);\n \n \t\t__m256i desc2_3 =\n \t\t\t_mm256_set_epi64x\n@@ -833,14 +843,14 @@\n \n \t/* do any last ones */\n \twhile (nb_pkts) {\n-\t\tice_vtx1(txdp, *pkt, flags);\n+\t\tice_vtx1(txdp, *pkt, flags, offload);\n \t\ttxdp++, pkt++, nb_pkts--;\n \t}\n }\n \n-static inline uint16_t\n+static __rte_always_inline uint16_t\n ice_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n-\t\t\t uint16_t nb_pkts)\n+\t\t\t uint16_t nb_pkts, bool offload)\n {\n \tstruct ice_tx_queue *txq = (struct ice_tx_queue *)tx_queue;\n \tvolatile struct ice_tx_desc *txdp;\n@@ -869,11 +879,11 @@\n \tif (nb_commit >= n) {\n \t\tice_tx_backlog_entry(txep, tx_pkts, n);\n \n-\t\tice_vtx(txdp, tx_pkts, n - 1, flags);\n+\t\tice_vtx(txdp, tx_pkts, n - 1, flags, offload);\n \t\ttx_pkts += (n - 1);\n \t\ttxdp += (n - 1);\n \n-\t\tice_vtx1(txdp, *tx_pkts++, rs);\n+\t\tice_vtx1(txdp, *tx_pkts++, rs, offload);\n \n \t\tnb_commit = (uint16_t)(nb_commit - n);\n \n@@ -887,7 +897,7 @@\n \n \tice_tx_backlog_entry(txep, tx_pkts, nb_commit);\n \n-\tice_vtx(txdp, tx_pkts, nb_commit, flags);\n+\tice_vtx(txdp, tx_pkts, nb_commit, flags, offload);\n \n \ttx_id = (uint16_t)(tx_id + nb_commit);\n \tif (tx_id > txq->tx_next_rs) {\n@@ -905,9 +915,9 @@\n \treturn nb_pkts;\n }\n \n-uint16_t\n-ice_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n-\t\t uint16_t nb_pkts)\n+static __rte_always_inline uint16_t\n+ice_xmit_pkts_vec_avx2_common(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t uint16_t nb_pkts, bool offload)\n {\n \tuint16_t nb_tx = 0;\n \tstruct ice_tx_queue *txq = (struct ice_tx_queue *)tx_queue;\n@@ -917,7 +927,7 @@\n \n \t\tnum = (uint16_t)RTE_MIN(nb_pkts, txq->tx_rs_thresh);\n \t\tret = ice_xmit_fixed_burst_vec_avx2(tx_queue, &tx_pkts[nb_tx],\n-\t\t\t\t\t\t num);\n+\t\t\t\t\t\t num, offload);\n \t\tnb_tx += ret;\n \t\tnb_pkts -= ret;\n \t\tif (ret < num)\n@@ -926,3 +936,17 @@\n \n \treturn nb_tx;\n }\n+\n+uint16_t\n+ice_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t uint16_t nb_pkts)\n+{\n+\treturn ice_xmit_pkts_vec_avx2_common(tx_queue, tx_pkts, nb_pkts, false);\n+}\n+\n+uint16_t\n+ice_xmit_pkts_vec_avx2_offload(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t uint16_t nb_pkts)\n+{\n+\treturn ice_xmit_pkts_vec_avx2_common(tx_queue, tx_pkts, nb_pkts, true);\n+}\n", "prefixes": [ "v3", "1/2" ] }