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GET /api/patches/93624/?format=api
{ "id": 93624, "url": "http://patches.dpdk.org/api/patches/93624/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210531141027.13289-2-arkadiuszx.kusztal@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210531141027.13289-2-arkadiuszx.kusztal@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210531141027.13289-2-arkadiuszx.kusztal@intel.com", "date": "2021-05-31T14:10:13", "name": "[01/15] common/qat: rework qp per service function", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3ed6cb4c55e74fe5b2b4c27ce6b887744f2859a8", "submitter": { "id": 452, "url": "http://patches.dpdk.org/api/people/452/?format=api", "name": "Arkadiusz Kusztal", "email": "arkadiuszx.kusztal@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210531141027.13289-2-arkadiuszx.kusztal@intel.com/mbox/", "series": [ { "id": 17172, "url": "http://patches.dpdk.org/api/series/17172/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=17172", "date": "2021-05-31T14:10:12", "name": "Add support for fourth generation of Intel QuickAssist Technology devices", "version": 1, "mbox": "http://patches.dpdk.org/series/17172/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/93624/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/93624/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 07BECA0524;\n\tMon, 31 May 2021 16:10:54 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6F73840E32;\n\tMon, 31 May 2021 16:10:49 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id 2EBC94003F\n for <dev@dpdk.org>; Mon, 31 May 2021 16:10:46 +0200 (CEST)", "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 31 May 2021 07:10:44 -0700", "from silpixa00400308.ir.intel.com ([10.237.214.61])\n by orsmga004.jf.intel.com with ESMTP; 31 May 2021 07:10:43 -0700" ], "IronPort-SDR": [ "\n sIOln6XY/6B+b3FqKkgsXg0my2RD2Hi151Yf4jsCMGig5ksdJzfqNAfAXjBr7Y7Ii+lAs7T37j\n y+2l7KtzBBbQ==", "\n 50j9qnt1RntzLfJ3s6XWNcWeBY+z67VOu+aQ6tSHAlAfzzK2xOTejxt2rZVo2EfGGQPtKKTyXx\n R7Sidbii2k4w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10001\"; a=\"201492202\"", "E=Sophos;i=\"5.83,237,1616482800\"; d=\"scan'208\";a=\"201492202\"", "E=Sophos;i=\"5.83,237,1616482800\"; d=\"scan'208\";a=\"548760052\"" ], "X-ExtLoop1": "1", "From": "Arek Kusztal <arkadiuszx.kusztal@intel.com>", "To": "dev@dpdk.org", "Cc": "gakhil@marvell.com, fiona.trahe@intel.com, roy.fan.zhang@intel.com,\n Arek Kusztal <arkadiuszx.kusztal@intel.com>", "Date": "Mon, 31 May 2021 15:10:13 +0100", "Message-Id": "<20210531141027.13289-2-arkadiuszx.kusztal@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210531141027.13289-1-arkadiuszx.kusztal@intel.com>", "References": "<20210531141027.13289-1-arkadiuszx.kusztal@intel.com>", "Subject": "[dpdk-dev] [PATCH 01/15] common/qat: rework qp per service function", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Different generations of Intel QuickAssist Technology devices may\ndiffer in approach to allocate queues. Queue pair number function\ntherefore needs to be more generic.\n\nSigned-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>\n---\n drivers/common/qat/qat_qp.c | 15 ++++++++++-----\n drivers/common/qat/qat_qp.h | 2 +-\n drivers/compress/qat/qat_comp_pmd.c | 9 ++++-----\n drivers/crypto/qat/qat_asym_pmd.c | 9 ++++-----\n drivers/crypto/qat/qat_sym_pmd.c | 9 ++++-----\n 5 files changed, 23 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c\nindex 4a8078541c..aa64d2e168 100644\n--- a/drivers/common/qat/qat_qp.c\n+++ b/drivers/common/qat/qat_qp.c\n@@ -145,14 +145,19 @@ static void adf_queue_arb_disable(struct qat_queue *txq, void *base_addr,\n \trte_spinlock_t *lock);\n \n \n-int qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,\n+int qat_qps_per_service(struct qat_pci_device *qat_dev,\n \t\tenum qat_service_type service)\n {\n-\tint i, count;\n-\n-\tfor (i = 0, count = 0; i < ADF_MAX_QPS_ON_ANY_SERVICE; i++)\n-\t\tif (qp_hw_data[i].service_type == service)\n+\tint i = 0, count = 0, max_ops_per_srv = 0;\n+\tconst struct qat_qp_hw_data*\n+\t\tsym_hw_qps = qat_gen_config[qat_dev->qat_dev_gen]\n+\t\t\t\t\t\t.qp_hw_data[service];\n+\n+\tmax_ops_per_srv = ADF_MAX_QPS_ON_ANY_SERVICE;\n+\tfor (; i < max_ops_per_srv; i++)\n+\t\tif (sym_hw_qps[i].service_type == service)\n \t\t\tcount++;\n+\n \treturn count;\n }\n \ndiff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h\nindex 74f7e7daee..d353e8552b 100644\n--- a/drivers/common/qat/qat_qp.h\n+++ b/drivers/common/qat/qat_qp.h\n@@ -98,7 +98,7 @@ qat_qp_setup(struct qat_pci_device *qat_dev,\n \t\tstruct qat_qp_config *qat_qp_conf);\n \n int\n-qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,\n+qat_qps_per_service(struct qat_pci_device *qat_dev,\n \t\t\tenum qat_service_type service);\n \n int\ndiff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c\nindex 8de41f6b6e..6eb1ae3a21 100644\n--- a/drivers/compress/qat/qat_comp_pmd.c\n+++ b/drivers/compress/qat/qat_comp_pmd.c\n@@ -106,6 +106,7 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,\n \tstruct qat_qp **qp_addr =\n \t\t\t(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);\n \tstruct qat_comp_dev_private *qat_private = dev->data->dev_private;\n+\tstruct qat_pci_device *qat_dev = qat_private->qat_dev;\n \tconst struct qat_qp_hw_data *comp_hw_qps =\n \t\t\tqat_gen_config[qat_private->qat_dev->qat_dev_gen]\n \t\t\t\t .qp_hw_data[QAT_SERVICE_COMPRESSION];\n@@ -117,7 +118,7 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \t}\n-\tif (qp_id >= qat_qps_per_service(comp_hw_qps,\n+\tif (qp_id >= qat_qps_per_service(qat_dev,\n \t\t\t\t\t QAT_SERVICE_COMPRESSION)) {\n \t\tQAT_LOG(ERR, \"qp_id %u invalid for this device\", qp_id);\n \t\treturn -EINVAL;\n@@ -592,13 +593,11 @@ qat_comp_dev_info_get(struct rte_compressdev *dev,\n \t\t\tstruct rte_compressdev_info *info)\n {\n \tstruct qat_comp_dev_private *comp_dev = dev->data->dev_private;\n-\tconst struct qat_qp_hw_data *comp_hw_qps =\n-\t\tqat_gen_config[comp_dev->qat_dev->qat_dev_gen]\n-\t\t\t .qp_hw_data[QAT_SERVICE_COMPRESSION];\n+\tstruct qat_pci_device *qat_dev = comp_dev->qat_dev;\n \n \tif (info != NULL) {\n \t\tinfo->max_nb_queue_pairs =\n-\t\t\tqat_qps_per_service(comp_hw_qps,\n+\t\t\tqat_qps_per_service(qat_dev,\n \t\t\t\t\t QAT_SERVICE_COMPRESSION);\n \t\tinfo->feature_flags = dev->feature_flags;\n \t\tinfo->capabilities = comp_dev->qat_dev_capabilities;\ndiff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c\nindex a2c8aca2c1..f0c8ed1bcf 100644\n--- a/drivers/crypto/qat/qat_asym_pmd.c\n+++ b/drivers/crypto/qat/qat_asym_pmd.c\n@@ -54,12 +54,10 @@ static void qat_asym_dev_info_get(struct rte_cryptodev *dev,\n \t\t\t\t struct rte_cryptodev_info *info)\n {\n \tstruct qat_asym_dev_private *internals = dev->data->dev_private;\n-\tconst struct qat_qp_hw_data *asym_hw_qps =\n-\t\tqat_gen_config[internals->qat_dev->qat_dev_gen]\n-\t\t\t .qp_hw_data[QAT_SERVICE_ASYMMETRIC];\n+\tstruct qat_pci_device *qat_dev = internals->qat_dev;\n \n \tif (info != NULL) {\n-\t\tinfo->max_nb_queue_pairs = qat_qps_per_service(asym_hw_qps,\n+\t\tinfo->max_nb_queue_pairs = qat_qps_per_service(qat_dev,\n \t\t\t\t\t\t\tQAT_SERVICE_ASYMMETRIC);\n \t\tinfo->feature_flags = dev->feature_flags;\n \t\tinfo->capabilities = internals->qat_dev_capabilities;\n@@ -128,6 +126,7 @@ static int qat_asym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \tstruct qat_qp **qp_addr =\n \t\t\t(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);\n \tstruct qat_asym_dev_private *qat_private = dev->data->dev_private;\n+\tstruct qat_pci_device *qat_dev = qat_private->qat_dev;\n \tconst struct qat_qp_hw_data *asym_hw_qps =\n \t\t\tqat_gen_config[qat_private->qat_dev->qat_dev_gen]\n \t\t\t\t .qp_hw_data[QAT_SERVICE_ASYMMETRIC];\n@@ -139,7 +138,7 @@ static int qat_asym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \t}\n-\tif (qp_id >= qat_qps_per_service(asym_hw_qps, QAT_SERVICE_ASYMMETRIC)) {\n+\tif (qp_id >= qat_qps_per_service(qat_dev, QAT_SERVICE_ASYMMETRIC)) {\n \t\tQAT_LOG(ERR, \"qp_id %u invalid for this device\", qp_id);\n \t\treturn -EINVAL;\n \t}\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c\nindex b9601c6c3a..549345b6fa 100644\n--- a/drivers/crypto/qat/qat_sym_pmd.c\n+++ b/drivers/crypto/qat/qat_sym_pmd.c\n@@ -90,13 +90,11 @@ static void qat_sym_dev_info_get(struct rte_cryptodev *dev,\n \t\t\tstruct rte_cryptodev_info *info)\n {\n \tstruct qat_sym_dev_private *internals = dev->data->dev_private;\n-\tconst struct qat_qp_hw_data *sym_hw_qps =\n-\t\tqat_gen_config[internals->qat_dev->qat_dev_gen]\n-\t\t\t .qp_hw_data[QAT_SERVICE_SYMMETRIC];\n+\tstruct qat_pci_device *qat_dev = internals->qat_dev;\n \n \tif (info != NULL) {\n \t\tinfo->max_nb_queue_pairs =\n-\t\t\tqat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC);\n+\t\t\tqat_qps_per_service(qat_dev, QAT_SERVICE_SYMMETRIC);\n \t\tinfo->feature_flags = dev->feature_flags;\n \t\tinfo->capabilities = internals->qat_dev_capabilities;\n \t\tinfo->driver_id = qat_sym_driver_id;\n@@ -164,6 +162,7 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \tstruct qat_qp **qp_addr =\n \t\t\t(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);\n \tstruct qat_sym_dev_private *qat_private = dev->data->dev_private;\n+\tstruct qat_pci_device *qat_dev = qat_private->qat_dev;\n \tconst struct qat_qp_hw_data *sym_hw_qps =\n \t\t\tqat_gen_config[qat_private->qat_dev->qat_dev_gen]\n \t\t\t\t .qp_hw_data[QAT_SERVICE_SYMMETRIC];\n@@ -175,7 +174,7 @@ static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \t\tif (ret < 0)\n \t\t\treturn ret;\n \t}\n-\tif (qp_id >= qat_qps_per_service(sym_hw_qps, QAT_SERVICE_SYMMETRIC)) {\n+\tif (qp_id >= qat_qps_per_service(qat_dev, QAT_SERVICE_SYMMETRIC)) {\n \t\tQAT_LOG(ERR, \"qp_id %u invalid for this device\", qp_id);\n \t\treturn -EINVAL;\n \t}\n", "prefixes": [ "01/15" ] }