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GET /api/patches/92810/?format=api
{ "id": 92810, "url": "http://patches.dpdk.org/api/patches/92810/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210505064104.30248-12-bingz@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210505064104.30248-12-bingz@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210505064104.30248-12-bingz@nvidia.com", "date": "2021-05-05T06:40:58", "name": "[v3,11/17] net/mlx5: add translation of CT action", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "45c403de30cbf2421003273bf13afda9e5a174c7", "submitter": { "id": 1976, "url": "http://patches.dpdk.org/api/people/1976/?format=api", "name": "Bing Zhao", "email": "bingz@nvidia.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210505064104.30248-12-bingz@nvidia.com/mbox/", "series": [ { "id": 16817, "url": "http://patches.dpdk.org/api/series/16817/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16817", "date": "2021-05-05T06:40:47", "name": "conntrack support in mlx5 PMD", "version": 3, "mbox": "http://patches.dpdk.org/series/16817/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/92810/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/92810/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0F0A9A0524;\n\tWed, 5 May 2021 08:42:58 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0F24A410FF;\n\tWed, 5 May 2021 08:42:53 +0200 (CEST)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2061.outbound.protection.outlook.com [40.107.243.61])\n by mails.dpdk.org (Postfix) with ESMTP id 4CA16410F7\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Bing Zhao <bingz@nvidia.com>", "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>, <thomas@monjalon.net>", "CC": "<dev@dpdk.org>, <orika@nvidia.com>, <rasland@nvidia.com>", "Date": "Wed, 5 May 2021 09:40:58 +0300", "Message-ID": "<20210505064104.30248-12-bingz@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20210505064104.30248-1-bingz@nvidia.com>", "References": "<20210427153811.11554-1-bingz@nvidia.com>\n <20210505064104.30248-1-bingz@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.145.6]", "X-ClientProxiedBy": "HQMAIL105.nvidia.com (172.20.187.12) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "1351c821-a6d5-434a-e09d-08d90f90ffc7", "X-MS-TrafficTypeDiagnostic": "CH2PR12MB4325:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <CH2PR12MB43251FC72A53838F68F13D5AD0599@CH2PR12MB4325.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:8273;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n IFTR4UgPL8MvnK+rtq3nujWPDg/xlIrxu57oAWPy1E0G9qHsh+Bq8PwCEfSMj5VtTHaUmuCa0dTkFVgQny8I1N3IEn/tCWxPACQCbCYrvC7+6rLd6fp2fAanW90e6i8BEJQpi7RG2ZN8rX4Te1rLc037YZ3kaJfDymPoRBLWvKiTsoOrUcDl53kneYCY+5AQH2gqczVZPq6F5k2HIk5RqfJScRBTJDBY6IuraMVl3Gz1LIP9FJGE/chp59Yo5r4mRDdJBlkAggQ/y4Ihgzd5pk3ergIIacAqnxyT26pKxgFFxo1YvZ1Dyi8/h77ul+kmrT7panF4lu/RkzuEP17Vv1iXQN5F5jB3aXjGjKHqMRWInCJmQLDTxfVD5jKs6DzlE8lfHYQ/G+YNf3CfgTWxcr7pPkR38iSxc6a6xqSu2t7WJm5NnEr1sCGZlxU7asbtmZcTr/v3OJQg6NlEiYIrA09a1GxVzJSi+Z6awguim5y2OnH870J+6nKtYMFCTAC4rjYd3ctGJjg98cvUfwap8AANIYh1TakfzT77NJBrpMqPOL/nDRSrJmzW9v/40wZmthYDpqUL1/Bmqb7yv2JcIeEZlh/qSyPO0RZ0jRYV8cHCybolF4agTs2pFkh8izxqYp0jiCxYcUdfwa/egAXilW1C+kPMz65MxPccVl7janU6+GOlrMAncn6p/UCrqggZ", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(346002)(39860400002)(376002)(136003)(396003)(36840700001)(46966006)(70206006)(186003)(70586007)(83380400001)(6666004)(26005)(82740400003)(7696005)(82310400003)(86362001)(110136005)(356005)(36906005)(107886003)(5660300002)(6286002)(7636003)(316002)(2616005)(1076003)(16526019)(336012)(426003)(4326008)(2906002)(8676002)(55016002)(36756003)(36860700001)(54906003)(478600001)(47076005)(8936002)(309714004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "05 May 2021 06:42:48.8783 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 1351c821-a6d5-434a-e09d-08d90f90ffc7", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT067.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH2PR12MB4325", "Subject": "[dpdk-dev] [PATCH v3 11/17] net/mlx5: add translation of CT action", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When creating a flow with this action context for CT, it needs to be\ntranslated in 2 levels.\n\nFirst, retrieve from action context to rte_flow action.\nSecond, translate it to the corresponding DR action with traffic\ndirection that was specified when creating or updating via\nrte_flow_action_handle* API.\n\nBefore using the DR action in a flow, the CT context should be\navailable to use in the hardware. A synchronization is done before\ninserting the flow rule with CT action to check the HW availability\nof this CT context.\n\nIn order to release the DR actions and reuse the context of a CT,\nthe reference count should also be handled in the the flow\ndestroying.\n\nThe CT index will be recorded in the rte_flow by reusing the ASO age\nindex to save memory, since only one ASO action is supported in one\nflow rule currently. The action context type should also be saved\nfor CT. When destroying a flow rule, if the context type is CT and\nthe index is valid (non-zero), the release process should be\nhandled. By default, the handling will fall back to try to release\nthe ASO age if any.\n\nSigned-off-by: Bing Zhao <bingz@nvidia.com>\n---\n drivers/net/mlx5/mlx5.h | 2 ++\n drivers/net/mlx5/mlx5_flow.c | 9 +++++++\n drivers/net/mlx5/mlx5_flow.h | 7 +++++-\n drivers/net/mlx5/mlx5_flow_aso.c | 41 ++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow_dv.c | 28 +++++++++++++++++++++-\n 5 files changed, 85 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex d2827e78d7..d01a10ea54 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1710,5 +1710,7 @@ int mlx5_aso_ct_wait_ready(struct mlx5_dev_ctx_shared *sh,\n int mlx5_aso_ct_query_by_wqe(struct mlx5_dev_ctx_shared *sh,\n \t\t\t struct mlx5_aso_ct_action *ct,\n \t\t\t struct rte_flow_action_conntrack *profile);\n+int mlx5_aso_ct_available(struct mlx5_dev_ctx_shared *sh,\n+\t\t\t struct mlx5_aso_ct_action *ct);\n \n #endif /* RTE_PMD_MLX5_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex edad6007a8..f36eeae03f 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -3553,6 +3553,15 @@ flow_action_handles_translate(struct rte_eth_dev *dev,\n \t\t\t\tbreak;\n \t\t\t}\n \t\t\t/* Fall-through */\n+\t\tcase MLX5_INDIRECT_ACTION_TYPE_CT:\n+\t\t\tif (priv->sh->ct_aso_en) {\n+\t\t\t\ttranslated[handle->index].type =\n+\t\t\t\t\tRTE_FLOW_ACTION_TYPE_CONNTRACK;\n+\t\t\t\ttranslated[handle->index].conf =\n+\t\t\t\t\t\t\t (void *)(uintptr_t)idx;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t\t/* Fall-through */\n \t\tdefault:\n \t\t\tmlx5_free(translated);\n \t\t\treturn rte_flow_error_set\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 8f2bc7d2f6..286e3fb6a4 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -226,6 +226,7 @@ enum mlx5_feature_name {\n #define MLX5_FLOW_ACTION_TUNNEL_MATCH (1ull << 38)\n #define MLX5_FLOW_ACTION_MODIFY_FIELD (1ull << 39)\n #define MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY (1ull << 40)\n+#define MLX5_FLOW_ACTION_CT (1ull << 41)\n \n #define MLX5_FLOW_FATE_ACTIONS \\\n \t(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \\\n@@ -969,11 +970,15 @@ struct rte_flow {\n \tuint32_t drv_type:2; /**< Driver type. */\n \tuint32_t tunnel:1;\n \tuint32_t meter:24; /**< Holds flow meter id. */\n+\tuint32_t indirect_type:2; /**< Indirect action type. */\n \tuint32_t rix_mreg_copy;\n \t/**< Index to metadata register copy table resource. */\n \tuint32_t counter; /**< Holds flow counter. */\n \tuint32_t tunnel_id; /**< Tunnel id */\n-\tuint32_t age; /**< Holds ASO age bit index. */\n+\tunion {\n+\t\tuint32_t age; /**< Holds ASO age bit index. */\n+\t\tuint32_t ct; /**< Holds ASO CT index. */\n+\t};\n \tuint32_t geneve_tlv_option; /**< Holds Geneve TLV option id. > */\n } __rte_packed;\n \ndiff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c\nindex 3f7ed371bf..d0a989e213 100644\n--- a/drivers/net/mlx5/mlx5_flow_aso.c\n+++ b/drivers/net/mlx5/mlx5_flow_aso.c\n@@ -1388,3 +1388,44 @@ mlx5_aso_ct_query_by_wqe(struct mlx5_dev_ctx_shared *sh,\n \t\tmlx5_aso_ct_obj_analyze(profile, out_data);\n \treturn ret;\n }\n+\n+/*\n+ * Make sure the conntrack context is synchronized with hardware before\n+ * creating a flow rule that uses it.\n+ *\n+ * @param[in] sh\n+ * Pointer to shared device context.\n+ * @param[in] ct\n+ * Pointer to connection tracking offload object.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_aso_ct_available(struct mlx5_dev_ctx_shared *sh,\n+\t\t struct mlx5_aso_ct_action *ct)\n+{\n+\tstruct mlx5_aso_ct_pools_mng *mng = sh->ct_mng;\n+\tuint32_t poll_cqe_times = MLX5_CT_POLL_WQE_CQE_TIMES;\n+\tenum mlx5_aso_ct_state state =\n+\t\t\t\t__atomic_load_n(&ct->state, __ATOMIC_RELAXED);\n+\n+\tif (state == ASO_CONNTRACK_FREE) {\n+\t\trte_errno = ENXIO;\n+\t\treturn -rte_errno;\n+\t} else if (state == ASO_CONNTRACK_READY ||\n+\t\t state == ASO_CONNTRACK_QUERY) {\n+\t\treturn 0;\n+\t}\n+\tdo {\n+\t\tmlx5_aso_ct_completion_handle(mng);\n+\t\tstate = __atomic_load_n(&ct->state, __ATOMIC_RELAXED);\n+\t\tif (state == ASO_CONNTRACK_READY ||\n+\t\t state == ASO_CONNTRACK_QUERY)\n+\t\t\treturn 0;\n+\t\t/* Waiting for CQE ready, consider should block or sleep. */\n+\t\trte_delay_us_sleep(MLX5_ASO_WQE_CQE_RESPONSE_DELAY);\n+\t} while (--poll_cqe_times);\n+\trte_errno = EBUSY;\n+\treturn -rte_errno;\n+}\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 0fa0671ace..14af900267 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -11381,6 +11381,7 @@ flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,\n \t\treturn rte_flow_error_set(error, EBUSY,\n \t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, NULL,\n \t\t\t\t\t \"Failed to update CT\");\n+\tct->is_original = !!pro->is_original_dir;\n \treturn idx;\n }\n \n@@ -11544,6 +11545,8 @@ flow_dv_translate(struct rte_eth_dev *dev,\n \t\tconst struct rte_flow_action *found_action = NULL;\n \t\tuint32_t jump_group = 0;\n \t\tstruct mlx5_flow_counter *cnt;\n+\t\tuint32_t ct_idx;\n+\t\tstruct mlx5_aso_ct_action *ct;\n \n \t\tif (!mlx5_flow_os_action_supported(action_type))\n \t\t\treturn rte_flow_error_set(error, ENOTSUP,\n@@ -12017,6 +12020,26 @@ flow_dv_translate(struct rte_eth_dev *dev,\n \t\t\t\treturn -rte_errno;\n \t\t\taction_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_CONNTRACK:\n+\t\t\tct_idx = (uint32_t)(uintptr_t)action->conf;\n+\t\t\tct = flow_aso_ct_get_by_idx(dev, ct_idx);\n+\t\t\tif (mlx5_aso_ct_available(priv->sh, ct))\n+\t\t\t\treturn rte_flow_error_set(error, rte_errno,\n+\t\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION,\n+\t\t\t\t\t\tNULL,\n+\t\t\t\t\t\t\"CT is unavailable.\");\n+\t\t\tif (ct->is_original)\n+\t\t\t\tdev_flow->dv.actions[actions_n] =\n+\t\t\t\t\t\t\tct->dr_action_orig;\n+\t\t\telse\n+\t\t\t\tdev_flow->dv.actions[actions_n] =\n+\t\t\t\t\t\t\tct->dr_action_rply;\n+\t\t\tflow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;\n+\t\t\tflow->ct = ct_idx;\n+\t\t\t__atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);\n+\t\t\tactions_n++;\n+\t\t\taction_flags |= MLX5_FLOW_ACTION_CT;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_END:\n \t\t\tactions_end = true;\n \t\t\tif (mhdr_res->actions_num) {\n@@ -13152,7 +13175,10 @@ flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)\n \t\t\tmlx5_flow_meter_detach(priv, fm);\n \t\tflow->meter = 0;\n \t}\n-\tif (flow->age)\n+\t/* Keep the current age handling by default. */\n+\tif (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)\n+\t\tflow_dv_aso_ct_release(dev, flow->ct);\n+\telse if (flow->age)\n \t\tflow_dv_aso_age_release(dev, flow->age);\n \tif (flow->geneve_tlv_option) {\n \t\tflow_dv_geneve_tlv_option_resource_release(dev);\n", "prefixes": [ "v3", "11/17" ] }