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GET /api/patches/92266/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 92266,
    "url": "http://patches.dpdk.org/api/patches/92266/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210427153811.11554-2-bingz@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210427153811.11554-2-bingz@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210427153811.11554-2-bingz@nvidia.com",
    "date": "2021-04-27T15:37:55",
    "name": "[01/17] common/mlx5: add connection tracking object definition",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "a1e9fb48285cabbcc59c01c483a7e4f8a2f2f63f",
    "submitter": {
        "id": 1976,
        "url": "http://patches.dpdk.org/api/people/1976/?format=api",
        "name": "Bing Zhao",
        "email": "bingz@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210427153811.11554-2-bingz@nvidia.com/mbox/",
    "series": [
        {
            "id": 16705,
            "url": "http://patches.dpdk.org/api/series/16705/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16705",
            "date": "2021-04-27T15:37:54",
            "name": "conntrack support in mlx5 PMD",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/16705/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/92266/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/92266/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Bing Zhao <bingz@nvidia.com>",
        "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>",
        "CC": "<dev@dpdk.org>, <orika@nvidia.com>, <rasland@nvidia.com>",
        "Date": "Tue, 27 Apr 2021 18:37:55 +0300",
        "Message-ID": "<20210427153811.11554-2-bingz@nvidia.com>",
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        "Subject": "[dpdk-dev] [PATCH 01/17] common/mlx5: add connection tracking\n object definition",
        "X-BeenThere": "dev@dpdk.org",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The structures of ASO connection tracking offload object are added\nbased on the definitions in the PRM. One CT object context will be\nloaded into the cache completely in a reversed order of dwords. The\nvalid bit should be the MSB of the last dword. This is used for the\nconntrack context creation and update, as well as the query.\n\nThe capabilities 2 (HCA_CAP_2) layout is also added. The connection\ntracking related capabilities could be queried via the HCA_CAP_2.\n\nSigned-off-by: Bing Zhao <bingz@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 85 ++++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 85 insertions(+)",
    "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex c6d8060..853eb58 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -1119,6 +1119,7 @@ enum {\n \tMLX5_GET_HCA_CAP_OP_MOD_ROCE = 0x4 << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_NIC_FLOW_TABLE = 0x7 << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_VDPA_EMULATION = 0x13 << 1,\n+\tMLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE_2 = 0x20 << 1,\n };\n \n #define MLX5_GENERAL_OBJ_TYPES_CAP_VIRTQ_NET_Q \\\n@@ -1661,6 +1662,29 @@ struct mlx5_ifc_flow_table_nic_cap_bits {\n \tstruct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties;\n };\n \n+struct mlx5_ifc_cmd_hca_cap_2_bits {\n+\tu8 reserved_at_0[0x80]; /* End of DW4. */\n+\tu8 reserved_at_80[0xb];\n+\tu8 log_max_num_reserved_qpn[0x5];\n+\tu8 reserved_at_90[0x3];\n+\tu8 log_reserved_qpn_granularity[0x5];\n+\tu8 reserved_at_98[0x3];\n+\tu8 log_reserved_qpn_max_alloc[0x5]; /* End of DW5. */\n+\tu8 max_reformat_insert_size[0x8];\n+\tu8 max_reformat_insert_offset[0x8];\n+\tu8 max_reformat_remove_size[0x8];\n+\tu8 max_reformat_remove_offset[0x8]; /* End of DW6. */\n+\tu8 aso_conntrack_reg_id[0x8];\n+\tu8 reserved_at_c8[0x3];\n+\tu8 log_conn_track_granularity[0x5];\n+\tu8 reserved_at_d0[0x3];\n+\tu8 log_conn_track_max_alloc[0x5];\n+\tu8 reserved_at_d8[0x3];\n+\tu8 log_max_conn_track_offload[0x5];\n+\tu8 reserved_at_e0[0x20]; /* End of DW7. */\n+\tu8 reserved_at_100[0x700];\n+};\n+\n union mlx5_ifc_hca_cap_union_bits {\n \tstruct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;\n \tstruct mlx5_ifc_per_protocol_networking_offload_caps_bits\n@@ -2592,6 +2616,67 @@ struct mlx5_ifc_create_flow_meter_aso_in_bits {\n \tstruct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;\n \tstruct mlx5_ifc_flow_meter_aso_bits flow_meter_aso;\n };\n+\n+struct mlx5_ifc_tcp_window_params_bits {\n+\tu8 max_ack[0x20];\n+\tu8 max_win[0x20];\n+\tu8 reply_end[0x20];\n+\tu8 sent_end[0x20];\n+};\n+\n+struct mlx5_ifc_conn_track_aso_bits {\n+\tstruct mlx5_ifc_tcp_window_params_bits reply_dir; /* End of DW3. */\n+\tstruct mlx5_ifc_tcp_window_params_bits original_dir; /* End of DW7. */\n+\tu8 last_end[0x20]; /* End of DW8. */\n+\tu8 last_ack[0x20]; /* End of DW9. */\n+\tu8 last_seq[0x20]; /* End of DW10. */\n+\tu8 last_win[0x10];\n+\tu8 reserved_at_170[0xa];\n+\tu8 last_dir[0x1];\n+\tu8 last_index[0x5]; /* End of DW11. */\n+\tu8 reserved_at_180[0x40]; /* End of DW13. */\n+\tu8 reply_dircetion_tcp_scale[0x4];\n+\tu8 reply_dircetion_tcp_close_initiated[0x1];\n+\tu8 reply_dircetion_tcp_liberal_enabled[0x1];\n+\tu8 reply_dircetion_tcp_data_unacked[0x1];\n+\tu8 reply_dircetion_tcp_max_ack[0x1];\n+\tu8 reserved_at_1c8[0x8];\n+\tu8 original_dircetion_tcp_scale[0x4];\n+\tu8 original_dircetion_tcp_close_initiated[0x1];\n+\tu8 original_dircetion_tcp_liberal_enabled[0x1];\n+\tu8 original_dircetion_tcp_data_unacked[0x1];\n+\tu8 original_dircetion_tcp_max_ack[0x1];\n+\tu8 reserved_at_1d8[0x8]; /* End of DW14. */\n+\tu8 valid[0x1];\n+\tu8 state[0x3];\n+\tu8 freeze_track[0x1];\n+\tu8 reserved_at_1e5[0xb];\n+\tu8 reserved_at_1f0[0x1];\n+\tu8 connection_assured[0x1];\n+\tu8 sack_permitted[0x1];\n+\tu8 challenged_acked[0x1];\n+\tu8 heartbeat[0x1];\n+\tu8 max_ack_window[0x3];\n+\tu8 reserved_at_1f8[0x1];\n+\tu8 retransmission_counter[0x3];\n+\tu8 retranmission_limit_exceeded[0x1];\n+\tu8 retranmission_limit[0x3]; /* End of DW15. */\n+};\n+\n+struct mlx5_ifc_conn_track_offload_bits {\n+\tu8 modify_field_select[0x40];\n+\tu8 reserved_at_40[0x40];\n+\tu8 reserved_at_80[0x8];\n+\tu8 conn_track_aso_access_pd[0x18];\n+\tu8 reserved_at_a0[0x160];\n+\tstruct mlx5_ifc_conn_track_aso_bits conn_track_aso;\n+};\n+\n+struct mlx5_ifc_create_conn_track_aso_in_bits {\n+\tstruct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;\n+\tstruct mlx5_ifc_conn_track_offload_bits conn_track_offload;\n+};\n+\n enum mlx5_access_aso_opc_mod {\n \tASO_OPC_MOD_IPSEC = 0x0,\n \tASO_OPC_MOD_CONNECTION_TRACKING = 0x1,\n",
    "prefixes": [
        "01/17"
    ]
}