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GET /api/patches/88653/?format=api
{ "id": 88653, "url": "http://patches.dpdk.org/api/patches/88653/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210306162942.6845-12-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210306162942.6845-12-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210306162942.6845-12-pbhagavatula@marvell.com", "date": "2021-03-06T16:29:16", "name": "[11/36] event/cnxk: add event port link and unlink", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "54ded7c51a2328c060adab25280c4d4c9666e87e", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210306162942.6845-12-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 15516, "url": "http://patches.dpdk.org/api/series/15516/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=15516", "date": "2021-03-06T16:29:05", "name": "Marvell CNXK Event device Driver", "version": 1, "mbox": "http://patches.dpdk.org/series/15516/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/88653/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/88653/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2C843A0548;\n\tSat, 6 Mar 2021 17:31:55 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6C7A522A4A4;\n\tSat, 6 Mar 2021 17:30:53 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 826E322A497\n for <dev@dpdk.org>; Sat, 6 Mar 2021 17:30:51 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 126GRnd2028142 for <dev@dpdk.org>; Sat, 6 Mar 2021 08:30:50 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 3747yurew4-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sat, 06 Mar 2021 08:30:50 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Sat, 6 Mar 2021 08:30:49 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Sat, 6 Mar 2021 08:30:49 -0800", "from BG-LT7430.marvell.com (unknown [10.193.68.121])\n by maili.marvell.com (Postfix) with ESMTP id 43DFE3F7040;\n Sat, 6 Mar 2021 08:30:47 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=litnIMYuYCFFe3xJ9dewJLAHYXW13eQAYqZegIOXris=;\n b=WJfg34kUUPTt/RT6JD1xh3E35NqAi+9xJI62c6JjLV4Zzz9FhLwp14jTYFEfeTomfxJc\n 5MuKzdSRDCgQuuacUMFjWLxxk7RBENEIpu4Cq+VD153K/glzIB6W4apKhzFtM0VUG8bs\n OUrDmGlCQDait9D+f0S5c7J6CyZtVQdPtZtrzOUnqv39Dgd7aIVCGaykje3Fo1lsUzKI\n RLHLV1Gn6n9XQ/XCdeSbd0kXvGKDczSvPHZGkh+s4GORIFx1+rCg4p9/rRNxDIiGoUfu\n QWCx9GgB4XCsII3Z1v5yqnmnDjOTbdrJ9XwWAnnP6ItV9LAwC+r5ssUIUXdOxi+13mWb Mg==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>", "CC": "<ndabilpuram@marvell.com>, <dev@dpdk.org>", "Date": "Sat, 6 Mar 2021 21:59:16 +0530", "Message-ID": "<20210306162942.6845-12-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210306162942.6845-1-pbhagavatula@marvell.com>", "References": "<20210306162942.6845-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761\n definitions=2021-03-06_08:2021-03-03,\n 2021-03-06 signatures=0", "Subject": "[dpdk-dev] [PATCH 11/36] event/cnxk: add event port link and unlink", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Shijith Thotton <sthotton@marvell.com>\n\nAdd platform specific event port, queue link and unlink APIs.\n\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 64 +++++++++++++++++-\n drivers/event/cnxk/cn9k_eventdev.c | 101 ++++++++++++++++++++++++++++\n drivers/event/cnxk/cnxk_eventdev.c | 36 ++++++++++\n drivers/event/cnxk/cnxk_eventdev.h | 12 +++-\n 4 files changed, 210 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex c60df7f7b..3cf07734b 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -63,6 +63,24 @@ cn10k_sso_init_hws_mem(void *arg, uint8_t port_id)\n \treturn ws;\n }\n \n+static int\n+cn10k_sso_hws_link(void *arg, void *port, uint16_t *map, uint16_t nb_link)\n+{\n+\tstruct cnxk_sso_evdev *dev = arg;\n+\tstruct cn10k_sso_hws *ws = port;\n+\n+\treturn roc_sso_hws_link(&dev->sso, ws->hws_id, map, nb_link);\n+}\n+\n+static int\n+cn10k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link)\n+{\n+\tstruct cnxk_sso_evdev *dev = arg;\n+\tstruct cn10k_sso_hws *ws = port;\n+\n+\treturn roc_sso_hws_unlink(&dev->sso, ws->hws_id, map, nb_link);\n+}\n+\n static void\n cn10k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)\n {\n@@ -83,9 +101,12 @@ cn10k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)\n static void\n cn10k_sso_hws_release(void *arg, void *hws)\n {\n+\tstruct cnxk_sso_evdev *dev = arg;\n \tstruct cn10k_sso_hws *ws = hws;\n+\tint i;\n \n-\tRTE_SET_USED(arg);\n+\tfor (i = 0; i < dev->nb_event_queues; i++)\n+\t\troc_sso_hws_unlink(&dev->sso, ws->hws_id, (uint16_t *)&i, 1);\n \tmemset(ws, 0, sizeof(*ws));\n }\n \n@@ -149,6 +170,12 @@ cn10k_sso_dev_configure(const struct rte_eventdev *event_dev)\n \tif (rc < 0)\n \t\tgoto cnxk_rsrc_fini;\n \n+\t/* Restore any prior port-queue mapping. */\n+\tcnxk_sso_restore_links(event_dev, cn10k_sso_hws_link);\n+\n+\tdev->configured = 1;\n+\trte_mb();\n+\n \treturn 0;\n cnxk_rsrc_fini:\n \troc_sso_rsrc_fini(&dev->sso);\n@@ -184,6 +211,38 @@ cn10k_sso_port_release(void *port)\n \trte_free(gws_cookie);\n }\n \n+static int\n+cn10k_sso_port_link(struct rte_eventdev *event_dev, void *port,\n+\t\t const uint8_t queues[], const uint8_t priorities[],\n+\t\t uint16_t nb_links)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tuint16_t hwgrp_ids[nb_links];\n+\tuint16_t link;\n+\n+\tRTE_SET_USED(priorities);\n+\tfor (link = 0; link < nb_links; link++)\n+\t\thwgrp_ids[link] = queues[link];\n+\tnb_links = cn10k_sso_hws_link(dev, port, hwgrp_ids, nb_links);\n+\n+\treturn (int)nb_links;\n+}\n+\n+static int\n+cn10k_sso_port_unlink(struct rte_eventdev *event_dev, void *port,\n+\t\t uint8_t queues[], uint16_t nb_unlinks)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tuint16_t hwgrp_ids[nb_unlinks];\n+\tuint16_t unlink;\n+\n+\tfor (unlink = 0; unlink < nb_unlinks; unlink++)\n+\t\thwgrp_ids[unlink] = queues[unlink];\n+\tnb_unlinks = cn10k_sso_hws_unlink(dev, port, hwgrp_ids, nb_unlinks);\n+\n+\treturn (int)nb_unlinks;\n+}\n+\n static struct rte_eventdev_ops cn10k_sso_dev_ops = {\n \t.dev_infos_get = cn10k_sso_info_get,\n \t.dev_configure = cn10k_sso_dev_configure,\n@@ -193,6 +252,9 @@ static struct rte_eventdev_ops cn10k_sso_dev_ops = {\n \t.port_def_conf = cnxk_sso_port_def_conf,\n \t.port_setup = cn10k_sso_port_setup,\n \t.port_release = cn10k_sso_port_release,\n+\t.port_link = cn10k_sso_port_link,\n+\t.port_unlink = cn10k_sso_port_unlink,\n+\t.timeout_ticks = cnxk_sso_timeout_ticks,\n };\n \n static int\ndiff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex 116f5bdab..5be2776cc 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -18,6 +18,54 @@ cn9k_init_hws_ops(struct cn9k_sso_hws_state *ws, uintptr_t base)\n \tws->swtag_desched_op = base + SSOW_LF_GWS_OP_SWTAG_DESCHED;\n }\n \n+static int\n+cn9k_sso_hws_link(void *arg, void *port, uint16_t *map, uint16_t nb_link)\n+{\n+\tstruct cnxk_sso_evdev *dev = arg;\n+\tstruct cn9k_sso_hws_dual *dws;\n+\tstruct cn9k_sso_hws *ws;\n+\tint rc;\n+\n+\tif (dev->dual_ws) {\n+\t\tdws = port;\n+\t\trc = roc_sso_hws_link(&dev->sso,\n+\t\t\t\t CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0), map,\n+\t\t\t\t nb_link);\n+\t\trc |= roc_sso_hws_link(&dev->sso,\n+\t\t\t\t CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1),\n+\t\t\t\t map, nb_link);\n+\t} else {\n+\t\tws = port;\n+\t\trc = roc_sso_hws_link(&dev->sso, ws->hws_id, map, nb_link);\n+\t}\n+\n+\treturn rc;\n+}\n+\n+static int\n+cn9k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link)\n+{\n+\tstruct cnxk_sso_evdev *dev = arg;\n+\tstruct cn9k_sso_hws_dual *dws;\n+\tstruct cn9k_sso_hws *ws;\n+\tint rc;\n+\n+\tif (dev->dual_ws) {\n+\t\tdws = port;\n+\t\trc = roc_sso_hws_unlink(&dev->sso,\n+\t\t\t\t\tCN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0),\n+\t\t\t\t\tmap, nb_link);\n+\t\trc |= roc_sso_hws_unlink(&dev->sso,\n+\t\t\t\t\t CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1),\n+\t\t\t\t\t map, nb_link);\n+\t} else {\n+\t\tws = port;\n+\t\trc = roc_sso_hws_unlink(&dev->sso, ws->hws_id, map, nb_link);\n+\t}\n+\n+\treturn rc;\n+}\n+\n static void\n cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)\n {\n@@ -54,12 +102,24 @@ cn9k_sso_hws_release(void *arg, void *hws)\n \tstruct cnxk_sso_evdev *dev = arg;\n \tstruct cn9k_sso_hws_dual *dws;\n \tstruct cn9k_sso_hws *ws;\n+\tint i;\n \n \tif (dev->dual_ws) {\n \t\tdws = hws;\n+\t\tfor (i = 0; i < dev->nb_event_queues; i++) {\n+\t\t\troc_sso_hws_unlink(&dev->sso,\n+\t\t\t\t\t CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 0),\n+\t\t\t\t\t (uint16_t *)&i, 1);\n+\t\t\troc_sso_hws_unlink(&dev->sso,\n+\t\t\t\t\t CN9K_DUAL_WS_PAIR_ID(dws->hws_id, 1),\n+\t\t\t\t\t (uint16_t *)&i, 1);\n+\t\t}\n \t\tmemset(dws, 0, sizeof(*dws));\n \t} else {\n \t\tws = hws;\n+\t\tfor (i = 0; i < dev->nb_event_queues; i++)\n+\t\t\troc_sso_hws_unlink(&dev->sso, ws->hws_id,\n+\t\t\t\t\t (uint16_t *)&i, 1);\n \t\tmemset(ws, 0, sizeof(*ws));\n \t}\n }\n@@ -183,6 +243,12 @@ cn9k_sso_dev_configure(const struct rte_eventdev *event_dev)\n \tif (rc < 0)\n \t\tgoto cnxk_rsrc_fini;\n \n+\t/* Restore any prior port-queue mapping. */\n+\tcnxk_sso_restore_links(event_dev, cn9k_sso_hws_link);\n+\n+\tdev->configured = 1;\n+\trte_mb();\n+\n \treturn 0;\n cnxk_rsrc_fini:\n \troc_sso_rsrc_fini(&dev->sso);\n@@ -218,6 +284,38 @@ cn9k_sso_port_release(void *port)\n \trte_free(gws_cookie);\n }\n \n+static int\n+cn9k_sso_port_link(struct rte_eventdev *event_dev, void *port,\n+\t\t const uint8_t queues[], const uint8_t priorities[],\n+\t\t uint16_t nb_links)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tuint16_t hwgrp_ids[nb_links];\n+\tuint16_t link;\n+\n+\tRTE_SET_USED(priorities);\n+\tfor (link = 0; link < nb_links; link++)\n+\t\thwgrp_ids[link] = queues[link];\n+\tnb_links = cn9k_sso_hws_link(dev, port, hwgrp_ids, nb_links);\n+\n+\treturn (int)nb_links;\n+}\n+\n+static int\n+cn9k_sso_port_unlink(struct rte_eventdev *event_dev, void *port,\n+\t\t uint8_t queues[], uint16_t nb_unlinks)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tuint16_t hwgrp_ids[nb_unlinks];\n+\tuint16_t unlink;\n+\n+\tfor (unlink = 0; unlink < nb_unlinks; unlink++)\n+\t\thwgrp_ids[unlink] = queues[unlink];\n+\tnb_unlinks = cn9k_sso_hws_unlink(dev, port, hwgrp_ids, nb_unlinks);\n+\n+\treturn (int)nb_unlinks;\n+}\n+\n static struct rte_eventdev_ops cn9k_sso_dev_ops = {\n \t.dev_infos_get = cn9k_sso_info_get,\n \t.dev_configure = cn9k_sso_dev_configure,\n@@ -227,6 +325,9 @@ static struct rte_eventdev_ops cn9k_sso_dev_ops = {\n \t.port_def_conf = cnxk_sso_port_def_conf,\n \t.port_setup = cn9k_sso_port_setup,\n \t.port_release = cn9k_sso_port_release,\n+\t.port_link = cn9k_sso_port_link,\n+\t.port_unlink = cn9k_sso_port_unlink,\n+\t.timeout_ticks = cnxk_sso_timeout_ticks,\n };\n \n static int\ndiff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c\nindex 9d455c93d..5f4075a31 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.c\n+++ b/drivers/event/cnxk/cnxk_eventdev.c\n@@ -161,6 +161,32 @@ cnxk_setup_event_ports(const struct rte_eventdev *event_dev,\n \treturn -ENOMEM;\n }\n \n+void\n+cnxk_sso_restore_links(const struct rte_eventdev *event_dev,\n+\t\t cnxk_sso_link_t link_fn)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tuint16_t *links_map, hwgrp[CNXK_SSO_MAX_HWGRP];\n+\tint i, j;\n+\n+\tfor (i = 0; i < dev->nb_event_ports; i++) {\n+\t\tuint16_t nb_hwgrp = 0;\n+\n+\t\tlinks_map = event_dev->data->links_map;\n+\t\t/* Point links_map to this port specific area */\n+\t\tlinks_map += (i * RTE_EVENT_MAX_QUEUES_PER_DEV);\n+\n+\t\tfor (j = 0; j < dev->nb_event_queues; j++) {\n+\t\t\tif (links_map[j] == 0xdead)\n+\t\t\t\tcontinue;\n+\t\t\thwgrp[nb_hwgrp] = j;\n+\t\t\tnb_hwgrp++;\n+\t\t}\n+\n+\t\tlink_fn(dev, event_dev->data->ports[i], hwgrp, nb_hwgrp);\n+\t}\n+}\n+\n int\n cnxk_sso_dev_validate(const struct rte_eventdev *event_dev)\n {\n@@ -290,6 +316,16 @@ cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,\n \treturn 0;\n }\n \n+int\n+cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,\n+\t\t uint64_t *tmo_ticks)\n+{\n+\tRTE_SET_USED(event_dev);\n+\t*tmo_ticks = NSEC2TICK(ns, rte_get_timer_hz());\n+\n+\treturn 0;\n+}\n+\n static void\n parse_queue_param(char *value, void *opaque)\n {\ndiff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h\nindex 0e8457f02..bf2c961aa 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.h\n+++ b/drivers/event/cnxk/cnxk_eventdev.h\n@@ -17,8 +17,9 @@\n #define CNXK_SSO_XAE_CNT \"xae_cnt\"\n #define CNXK_SSO_GGRP_QOS \"qos\"\n \n-#define NSEC2USEC(__ns) ((__ns) / 1E3)\n-#define USEC2NSEC(__us) ((__us)*1E3)\n+#define NSEC2USEC(__ns)\t\t((__ns) / 1E3)\n+#define USEC2NSEC(__us)\t\t((__us)*1E3)\n+#define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)\n \n #define CNXK_SSO_MAX_HWGRP (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)\n #define CNXK_SSO_FC_NAME \"cnxk_evdev_xaq_fc\"\n@@ -33,6 +34,8 @@\n typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);\n typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);\n typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);\n+typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,\n+\t\t\t uint16_t nb_link);\n \n struct cnxk_sso_qos {\n \tuint16_t queue;\n@@ -48,6 +51,7 @@ struct cnxk_sso_evdev {\n \tuint8_t is_timeout_deq;\n \tuint8_t nb_event_queues;\n \tuint8_t nb_event_ports;\n+\tuint8_t configured;\n \tuint32_t deq_tmo_ns;\n \tuint32_t min_dequeue_timeout_ns;\n \tuint32_t max_dequeue_timeout_ns;\n@@ -169,6 +173,8 @@ int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);\n int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,\n \t\t\t cnxk_sso_init_hws_mem_t init_hws_mem,\n \t\t\t cnxk_sso_hws_setup_t hws_setup);\n+void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,\n+\t\t\t cnxk_sso_link_t link_fn);\n void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,\n \t\t\t struct rte_event_queue_conf *queue_conf);\n int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,\n@@ -178,5 +184,7 @@ void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,\n \t\t\t struct rte_event_port_conf *port_conf);\n int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,\n \t\t\tcnxk_sso_hws_setup_t hws_setup_fn);\n+int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,\n+\t\t\t uint64_t *tmo_ticks);\n \n #endif /* __CNXK_EVENTDEV_H__ */\n", "prefixes": [ "11/36" ] }