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GET /api/patches/88568/?format=api
{ "id": 88568, "url": "http://patches.dpdk.org/api/patches/88568/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210305133918.8005-42-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210305133918.8005-42-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210305133918.8005-42-ndabilpuram@marvell.com", "date": "2021-03-05T13:39:07", "name": "[41/52] common/cnxk: add npc helper API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "042a3a00890bd497db02d978ba058703e11caafd", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210305133918.8005-42-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 15508, "url": "http://patches.dpdk.org/api/series/15508/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=15508", "date": "2021-03-05T13:38:26", "name": "Add Marvell CNXK common driver", "version": 1, "mbox": "http://patches.dpdk.org/series/15508/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/88568/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/88568/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D2DE9A0547;\n\tFri, 5 Mar 2021 14:47:00 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 756FC22A455;\n\tFri, 5 Mar 2021 14:41:36 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id DDDFF22A453\n for <dev@dpdk.org>; Fri, 5 Mar 2021 14:41:34 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 125DewKr001896 for <dev@dpdk.org>; Fri, 5 Mar 2021 05:41:34 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 372s2umrre-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 05 Mar 2021 05:41:33 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 5 Mar 2021 05:41:32 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Fri, 5 Mar 2021 05:41:32 -0800", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 05B733F7041;\n Fri, 5 Mar 2021 05:41:29 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=t+sIXBdlrO3xv/iCEo3XTO2XriJ4zN6uh094NDwGQ5E=;\n b=fNiCo48U02fG+oQc3bsZGYurRWoOoLCSDyC28cdFeDtiQAmmEhCJnKklvWKDH3ZQHCMH\n uCfKpukgD4zRmgRojZ/FD1VBHl8TyGO+HmCgwpEmpvqqZXBOV5M4gWX4TjCSgYs7RsCT\n wgBkQWxJJ/KmbxaxCEJ7tNowKFeT42QjMz61xQaWsC87d7n9Cg46bi7z1h5B52og1RoV\n cTsEVIrPOoaBtdOD/ttBcCUa29AIi3K9igV6A3RMeIBkjtihC2d6FsUHUfAqh55JKYd6\n 9ZtJyDEpXKZaVkNw/ICslXdCrPKWDguhE/K19esU4NVh/8HgF19q4O0Lx1weaSwRqfqh yw==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>", "Date": "Fri, 5 Mar 2021 19:09:07 +0530", "Message-ID": "<20210305133918.8005-42-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210305133918.8005-1-ndabilpuram@marvell.com>", "References": "<20210305133918.8005-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761\n definitions=2021-03-05_08:2021-03-03,\n 2021-03-05 signatures=0", "Subject": "[dpdk-dev] [PATCH 41/52] common/cnxk: add npc helper API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding NPC helper APIs to manage MCAM like pre allocating the mcam,\nconfiguring the rules, shifting mcam rules and preparing the data for\nmcam based on KEX.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\n---\n drivers/common/cnxk/meson.build | 1 +\n drivers/common/cnxk/roc_npc_priv.h | 11 +\n drivers/common/cnxk/roc_npc_utils.c | 631 ++++++++++++++++++++++++++++++++++++\n 3 files changed, 643 insertions(+)\n create mode 100644 drivers/common/cnxk/roc_npc_utils.c", "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex a686763..c4ec988 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -35,6 +35,7 @@ sources = files('roc_dev.c',\n \t\t'roc_npa.c',\n \t\t'roc_npa_debug.c',\n \t\t'roc_npa_irq.c',\n+\t\t'roc_npc_utils.c',\n \t\t'roc_platform.c',\n \t\t'roc_utils.c')\n includes += include_directories('../../bus/pci')\ndiff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h\nindex 0c3947a..185c60e 100644\n--- a/drivers/common/cnxk/roc_npc_priv.h\n+++ b/drivers/common/cnxk/roc_npc_priv.h\n@@ -378,4 +378,15 @@ roc_npc_to_npc_priv(struct roc_npc *npc)\n {\n \treturn (struct npc *)npc->reserved;\n }\n+\n+int npc_update_parse_state(struct npc_parse_state *pst,\n+\t\t\t struct npc_parse_item_info *info, int lid, int lt,\n+\t\t\t uint8_t flags);\n+void npc_get_hw_supp_mask(struct npc_parse_state *pst,\n+\t\t\t struct npc_parse_item_info *info, int lid, int lt);\n+int npc_parse_item_basic(const struct roc_npc_item_info *item,\n+\t\t\t struct npc_parse_item_info *info);\n+int npc_check_preallocated_entry_cache(struct mbox *mbox,\n+\t\t\t\t struct roc_npc_flow *flow,\n+\t\t\t\t struct npc *npc);\n #endif /* _ROC_NPC_PRIV_H_ */\ndiff --git a/drivers/common/cnxk/roc_npc_utils.c b/drivers/common/cnxk/roc_npc_utils.c\nnew file mode 100644\nindex 0000000..5453e1a\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_npc_utils.c\n@@ -0,0 +1,631 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2020 Marvell.\n+ */\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+static void\n+npc_prep_mcam_ldata(uint8_t *ptr, const uint8_t *data, int len)\n+{\n+\tint idx;\n+\n+\tfor (idx = 0; idx < len; idx++)\n+\t\tptr[idx] = data[len - 1 - idx];\n+}\n+\n+static int\n+npc_check_copysz(size_t size, size_t len)\n+{\n+\tif (len <= size)\n+\t\treturn len;\n+\treturn NPC_ERR_PARAM;\n+}\n+\n+static inline int\n+npc_mem_is_zero(const void *mem, int len)\n+{\n+\tconst char *m = mem;\n+\tint i;\n+\n+\tfor (i = 0; i < len; i++) {\n+\t\tif (m[i] != 0)\n+\t\t\treturn 0;\n+\t}\n+\treturn 1;\n+}\n+\n+static void\n+npc_set_hw_mask(struct npc_parse_item_info *info, struct npc_xtract_info *xinfo,\n+\t\tchar *hw_mask)\n+{\n+\tint max_off, offset;\n+\tint j;\n+\n+\tif (xinfo->enable == 0)\n+\t\treturn;\n+\n+\tif (xinfo->hdr_off < info->hw_hdr_len)\n+\t\treturn;\n+\n+\tmax_off = xinfo->hdr_off + xinfo->len - info->hw_hdr_len;\n+\n+\tif (max_off > info->len)\n+\t\tmax_off = info->len;\n+\n+\toffset = xinfo->hdr_off - info->hw_hdr_len;\n+\tfor (j = offset; j < max_off; j++)\n+\t\thw_mask[j] = 0xff;\n+}\n+\n+void\n+npc_get_hw_supp_mask(struct npc_parse_state *pst,\n+\t\t struct npc_parse_item_info *info, int lid, int lt)\n+{\n+\tstruct npc_xtract_info *xinfo, *lfinfo;\n+\tchar *hw_mask = info->hw_mask;\n+\tint lf_cfg = 0;\n+\tint i, j;\n+\tint intf;\n+\n+\tintf = pst->nix_intf;\n+\txinfo = pst->npc->prx_dxcfg[intf][lid][lt].xtract;\n+\tmemset(hw_mask, 0, info->len);\n+\n+\tfor (i = 0; i < NPC_MAX_LD; i++)\n+\t\tnpc_set_hw_mask(info, &xinfo[i], hw_mask);\n+\n+\tfor (i = 0; i < NPC_MAX_LD; i++) {\n+\t\tif (xinfo[i].flags_enable == 0)\n+\t\t\tcontinue;\n+\n+\t\tlf_cfg = pst->npc->prx_lfcfg[i].i;\n+\t\tif (lf_cfg == lid) {\n+\t\t\tfor (j = 0; j < NPC_MAX_LFL; j++) {\n+\t\t\t\tlfinfo = pst->npc->prx_fxcfg[intf][i][j].xtract;\n+\t\t\t\tnpc_set_hw_mask(info, &lfinfo[0], hw_mask);\n+\t\t\t}\n+\t\t}\n+\t}\n+}\n+\n+static inline int\n+npc_mask_is_supported(const char *mask, const char *hw_mask, int len)\n+{\n+\t/*\n+\t * If no hw_mask, assume nothing is supported.\n+\t * mask is never NULL\n+\t */\n+\tif (hw_mask == NULL)\n+\t\treturn npc_mem_is_zero(mask, len);\n+\n+\twhile (len--) {\n+\t\tif ((mask[len] | hw_mask[len]) != hw_mask[len])\n+\t\t\treturn 0; /* False */\n+\t}\n+\treturn 1;\n+}\n+\n+int\n+npc_parse_item_basic(const struct roc_npc_item_info *item,\n+\t\t struct npc_parse_item_info *info)\n+{\n+\t/* Item must not be NULL */\n+\tif (item == NULL)\n+\t\treturn NPC_ERR_PARAM;\n+\n+\t/* Don't support ranges */\n+\tif (item->last != NULL)\n+\t\treturn NPC_ERR_INVALID_RANGE;\n+\n+\t/* If spec is NULL, both mask and last must be NULL, this\n+\t * makes it to match ANY value (eq to mask = 0).\n+\t * Setting either mask or last without spec is an error\n+\t */\n+\tif (item->spec == NULL) {\n+\t\tif (item->last == NULL && item->mask == NULL) {\n+\t\t\tinfo->spec = NULL;\n+\t\t\treturn 0;\n+\t\t}\n+\t\treturn NPC_ERR_INVALID_SPEC;\n+\t}\n+\n+\t/* We have valid spec */\n+\tinfo->spec = item->spec;\n+\n+\t/* If mask is not set, use default mask, err if default mask is\n+\t * also NULL.\n+\t */\n+\tif (item->mask == NULL) {\n+\t\tif (info->def_mask == NULL)\n+\t\t\treturn NPC_ERR_PARAM;\n+\t\tinfo->mask = info->def_mask;\n+\t} else {\n+\t\tinfo->mask = item->mask;\n+\t}\n+\n+\t/* mask specified must be subset of hw supported mask\n+\t * mask | hw_mask == hw_mask\n+\t */\n+\tif (!npc_mask_is_supported(info->mask, info->hw_mask, info->len))\n+\t\treturn NPC_ERR_INVALID_MASK;\n+\n+\treturn 0;\n+}\n+\n+static int\n+npc_update_extraction_data(struct npc_parse_state *pst,\n+\t\t\t struct npc_parse_item_info *info,\n+\t\t\t struct npc_xtract_info *xinfo)\n+{\n+\tuint8_t int_info_mask[NPC_MAX_EXTRACT_DATA_LEN];\n+\tuint8_t int_info[NPC_MAX_EXTRACT_DATA_LEN];\n+\tstruct npc_xtract_info *x;\n+\tint hdr_off;\n+\tint len = 0;\n+\n+\tx = xinfo;\n+\tlen = x->len;\n+\thdr_off = x->hdr_off;\n+\n+\tif (hdr_off < info->hw_hdr_len)\n+\t\treturn 0;\n+\n+\tif (x->enable == 0)\n+\t\treturn 0;\n+\n+\thdr_off -= info->hw_hdr_len;\n+\n+\tif (hdr_off >= info->len)\n+\t\treturn 0;\n+\n+\tif (hdr_off + len > info->len)\n+\t\tlen = info->len - hdr_off;\n+\n+\tlen = npc_check_copysz((ROC_NPC_MAX_MCAM_WIDTH_DWORDS * 8) - x->key_off,\n+\t\t\t len);\n+\tif (len < 0)\n+\t\treturn NPC_ERR_INVALID_SIZE;\n+\n+\t/* Need to reverse complete structure so that dest addr is at\n+\t * MSB so as to program the MCAM using mcam_data & mcam_mask\n+\t * arrays\n+\t */\n+\tnpc_prep_mcam_ldata(int_info, (const uint8_t *)info->spec + hdr_off,\n+\t\t\t x->len);\n+\tnpc_prep_mcam_ldata(int_info_mask,\n+\t\t\t (const uint8_t *)info->mask + hdr_off, x->len);\n+\n+\tmemcpy(pst->mcam_mask + x->key_off, int_info_mask, len);\n+\tmemcpy(pst->mcam_data + x->key_off, int_info, len);\n+\treturn 0;\n+}\n+\n+int\n+npc_update_parse_state(struct npc_parse_state *pst,\n+\t\t struct npc_parse_item_info *info, int lid, int lt,\n+\t\t uint8_t flags)\n+{\n+\tstruct npc_lid_lt_xtract_info *xinfo;\n+\tstruct npc_xtract_info *lfinfo;\n+\tint intf, lf_cfg;\n+\tint i, j, rc = 0;\n+\n+\tpst->layer_mask |= lid;\n+\tpst->lt[lid] = lt;\n+\tpst->flags[lid] = flags;\n+\n+\tintf = pst->nix_intf;\n+\txinfo = &pst->npc->prx_dxcfg[intf][lid][lt];\n+\tif (xinfo->is_terminating)\n+\t\tpst->terminate = 1;\n+\n+\tif (info->spec == NULL)\n+\t\tgoto done;\n+\n+\tfor (i = 0; i < NPC_MAX_LD; i++) {\n+\t\trc = npc_update_extraction_data(pst, info, &xinfo->xtract[i]);\n+\t\tif (rc != 0)\n+\t\t\treturn rc;\n+\t}\n+\n+\tfor (i = 0; i < NPC_MAX_LD; i++) {\n+\t\tif (xinfo->xtract[i].flags_enable == 0)\n+\t\t\tcontinue;\n+\n+\t\tlf_cfg = pst->npc->prx_lfcfg[i].i;\n+\t\tif (lf_cfg == lid) {\n+\t\t\tfor (j = 0; j < NPC_MAX_LFL; j++) {\n+\t\t\t\tlfinfo = pst->npc->prx_fxcfg[intf][i][j].xtract;\n+\t\t\t\trc = npc_update_extraction_data(pst, info,\n+\t\t\t\t\t\t\t\t&lfinfo[0]);\n+\t\t\t\tif (rc != 0)\n+\t\t\t\t\treturn rc;\n+\n+\t\t\t\tif (lfinfo[0].enable)\n+\t\t\t\t\tpst->flags[lid] = j;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+done:\n+\tpst->pattern++;\n+\treturn 0;\n+}\n+\n+static int\n+npc_first_set_bit(uint64_t slab)\n+{\n+\tint num = 0;\n+\n+\tif ((slab & 0xffffffff) == 0) {\n+\t\tnum += 32;\n+\t\tslab >>= 32;\n+\t}\n+\tif ((slab & 0xffff) == 0) {\n+\t\tnum += 16;\n+\t\tslab >>= 16;\n+\t}\n+\tif ((slab & 0xff) == 0) {\n+\t\tnum += 8;\n+\t\tslab >>= 8;\n+\t}\n+\tif ((slab & 0xf) == 0) {\n+\t\tnum += 4;\n+\t\tslab >>= 4;\n+\t}\n+\tif ((slab & 0x3) == 0) {\n+\t\tnum += 2;\n+\t\tslab >>= 2;\n+\t}\n+\tif ((slab & 0x1) == 0)\n+\t\tnum += 1;\n+\n+\treturn num;\n+}\n+\n+static int\n+npc_shift_lv_ent(struct mbox *mbox, struct roc_npc_flow *flow, struct npc *npc,\n+\t\t uint32_t old_ent, uint32_t new_ent)\n+{\n+\tstruct npc_mcam_shift_entry_req *req;\n+\tstruct npc_mcam_shift_entry_rsp *rsp;\n+\tstruct npc_flow_list *list;\n+\tstruct roc_npc_flow *flow_iter;\n+\tint rc = -ENOSPC;\n+\n+\tlist = &npc->flow_list[flow->priority];\n+\n+\t/* Old entry is disabled & it's contents are moved to new_entry,\n+\t * new entry is enabled finally.\n+\t */\n+\treq = mbox_alloc_msg_npc_mcam_shift_entry(mbox);\n+\tif (req == NULL)\n+\t\treturn rc;\n+\treq->curr_entry[0] = old_ent;\n+\treq->new_entry[0] = new_ent;\n+\treq->shift_count = 1;\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Remove old node from list */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id == old_ent)\n+\t\t\tTAILQ_REMOVE(list, flow_iter, next);\n+\t}\n+\n+\t/* Insert node with new mcam id at right place */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id > new_ent)\n+\t\t\tTAILQ_INSERT_BEFORE(flow_iter, flow, next);\n+\t}\n+\treturn rc;\n+}\n+\n+/* Exchange all required entries with a given priority level */\n+static int\n+npc_shift_ent(struct mbox *mbox, struct roc_npc_flow *flow, struct npc *npc,\n+\t struct npc_mcam_alloc_entry_rsp *rsp, int dir, int prio_lvl)\n+{\n+\tstruct plt_bitmap *fr_bmp, *fr_bmp_rev, *lv_bmp, *lv_bmp_rev, *bmp;\n+\tuint32_t e_fr = 0, e_lv = 0, e, e_id = 0, mcam_entries;\n+\tuint64_t fr_bit_pos = 0, lv_bit_pos = 0, bit_pos = 0;\n+\t/* Bit position within the slab */\n+\tuint32_t sl_fr_bit_off = 0, sl_lv_bit_off = 0;\n+\t/* Overall bit position of the start of slab */\n+\t/* free & live entry index */\n+\tint rc_fr = 0, rc_lv = 0, rc = 0, idx = 0;\n+\tstruct npc_mcam_ents_info *ent_info;\n+\t/* free & live bitmap slab */\n+\tuint64_t sl_fr = 0, sl_lv = 0, *sl;\n+\n+\tfr_bmp = npc->free_entries[prio_lvl];\n+\tfr_bmp_rev = npc->free_entries_rev[prio_lvl];\n+\tlv_bmp = npc->live_entries[prio_lvl];\n+\tlv_bmp_rev = npc->live_entries_rev[prio_lvl];\n+\tent_info = &npc->flow_entry_info[prio_lvl];\n+\tmcam_entries = npc->mcam_entries;\n+\n+\t/* New entries allocated are always contiguous, but older entries\n+\t * already in free/live bitmap can be non-contiguous: so return\n+\t * shifted entries should be in non-contiguous format.\n+\t */\n+\twhile (idx <= rsp->count) {\n+\t\tif (!sl_fr && !sl_lv) {\n+\t\t\t/* Lower index elements to be exchanged */\n+\t\t\tif (dir < 0) {\n+\t\t\t\trc_fr = plt_bitmap_scan(fr_bmp, &e_fr, &sl_fr);\n+\t\t\t\trc_lv = plt_bitmap_scan(lv_bmp, &e_lv, &sl_lv);\n+\t\t\t} else {\n+\t\t\t\trc_fr = plt_bitmap_scan(fr_bmp_rev,\n+\t\t\t\t\t\t\t&sl_fr_bit_off, &sl_fr);\n+\t\t\t\trc_lv = plt_bitmap_scan(lv_bmp_rev,\n+\t\t\t\t\t\t\t&sl_lv_bit_off, &sl_lv);\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (rc_fr) {\n+\t\t\tfr_bit_pos = npc_first_set_bit(sl_fr);\n+\t\t\te_fr = sl_fr_bit_off + fr_bit_pos;\n+\t\t} else {\n+\t\t\te_fr = ~(0);\n+\t\t}\n+\n+\t\tif (rc_lv) {\n+\t\t\tlv_bit_pos = npc_first_set_bit(sl_lv);\n+\t\t\te_lv = sl_lv_bit_off + lv_bit_pos;\n+\t\t} else {\n+\t\t\te_lv = ~(0);\n+\t\t}\n+\n+\t\t/* First entry is from free_bmap */\n+\t\tif (e_fr < e_lv) {\n+\t\t\tbmp = fr_bmp;\n+\t\t\te = e_fr;\n+\t\t\tsl = &sl_fr;\n+\t\t\tbit_pos = fr_bit_pos;\n+\t\t\tif (dir > 0)\n+\t\t\t\te_id = mcam_entries - e - 1;\n+\t\t\telse\n+\t\t\t\te_id = e;\n+\t\t} else {\n+\t\t\tbmp = lv_bmp;\n+\t\t\te = e_lv;\n+\t\t\tsl = &sl_lv;\n+\t\t\tbit_pos = lv_bit_pos;\n+\t\t\tif (dir > 0)\n+\t\t\t\te_id = mcam_entries - e - 1;\n+\t\t\telse\n+\t\t\t\te_id = e;\n+\n+\t\t\tif (idx < rsp->count)\n+\t\t\t\trc = npc_shift_lv_ent(mbox, flow, npc, e_id,\n+\t\t\t\t\t\t rsp->entry + idx);\n+\t\t}\n+\n+\t\tplt_bitmap_clear(bmp, e);\n+\t\tplt_bitmap_set(bmp, rsp->entry + idx);\n+\t\t/* Update entry list, use non-contiguous\n+\t\t * list now.\n+\t\t */\n+\t\trsp->entry_list[idx] = e_id;\n+\t\t*sl &= ~(1UL << bit_pos);\n+\n+\t\t/* Update min & max entry identifiers in current\n+\t\t * priority level.\n+\t\t */\n+\t\tif (dir < 0) {\n+\t\t\tent_info->max_id = rsp->entry + idx;\n+\t\t\tent_info->min_id = e_id;\n+\t\t} else {\n+\t\t\tent_info->max_id = e_id;\n+\t\t\tent_info->min_id = rsp->entry;\n+\t\t}\n+\n+\t\tidx++;\n+\t}\n+\treturn rc;\n+}\n+\n+/* Validate if newly allocated entries lie in the correct priority zone\n+ * since NPC_MCAM_LOWER_PRIO & NPC_MCAM_HIGHER_PRIO don't ensure zone accuracy.\n+ * If not properly aligned, shift entries to do so\n+ */\n+static int\n+npc_validate_and_shift_prio_ent(struct mbox *mbox, struct roc_npc_flow *flow,\n+\t\t\t\tstruct npc *npc,\n+\t\t\t\tstruct npc_mcam_alloc_entry_rsp *rsp,\n+\t\t\t\tint req_prio)\n+{\n+\tint prio_idx = 0, rc = 0, needs_shift = 0, idx, prio = flow->priority;\n+\tstruct npc_mcam_ents_info *info = npc->flow_entry_info;\n+\tint dir = (req_prio == NPC_MCAM_HIGHER_PRIO) ? 1 : -1;\n+\tuint32_t tot_ent = 0;\n+\n+\tif (dir < 0)\n+\t\tprio_idx = npc->flow_max_priority - 1;\n+\n+\t/* Only live entries needs to be shifted, free entries can just be\n+\t * moved by bits manipulation.\n+\t */\n+\n+\t/* For dir = -1(NPC_MCAM_LOWER_PRIO), when shifting,\n+\t * NPC_MAX_PREALLOC_ENT are exchanged with adjoining higher priority\n+\t * level entries(lower indexes).\n+\t *\n+\t * For dir = +1(NPC_MCAM_HIGHER_PRIO), during shift,\n+\t * NPC_MAX_PREALLOC_ENT are exchanged with adjoining lower priority\n+\t * level entries(higher indexes) with highest indexes.\n+\t */\n+\tdo {\n+\t\ttot_ent = info[prio_idx].free_ent + info[prio_idx].live_ent;\n+\n+\t\tif (dir < 0 && prio_idx != prio &&\n+\t\t rsp->entry > info[prio_idx].max_id && tot_ent) {\n+\t\t\tneeds_shift = 1;\n+\t\t} else if ((dir > 0) && (prio_idx != prio) &&\n+\t\t\t (rsp->entry < info[prio_idx].min_id) && tot_ent) {\n+\t\t\tneeds_shift = 1;\n+\t\t}\n+\n+\t\tif (needs_shift) {\n+\t\t\tneeds_shift = 0;\n+\t\t\trc = npc_shift_ent(mbox, flow, npc, rsp, dir, prio_idx);\n+\t\t} else {\n+\t\t\tfor (idx = 0; idx < rsp->count; idx++)\n+\t\t\t\trsp->entry_list[idx] = rsp->entry + idx;\n+\t\t}\n+\t} while ((prio_idx != prio) && (prio_idx += dir));\n+\n+\treturn rc;\n+}\n+\n+static int\n+npc_find_ref_entry(struct npc *npc, int *prio, int prio_lvl)\n+{\n+\tstruct npc_mcam_ents_info *info = npc->flow_entry_info;\n+\tint step = 1;\n+\n+\twhile (step < npc->flow_max_priority) {\n+\t\tif (((prio_lvl + step) < npc->flow_max_priority) &&\n+\t\t info[prio_lvl + step].live_ent) {\n+\t\t\t*prio = NPC_MCAM_HIGHER_PRIO;\n+\t\t\treturn info[prio_lvl + step].min_id;\n+\t\t}\n+\n+\t\tif (((prio_lvl - step) >= 0) &&\n+\t\t info[prio_lvl - step].live_ent) {\n+\t\t\t*prio = NPC_MCAM_LOWER_PRIO;\n+\t\t\treturn info[prio_lvl - step].max_id;\n+\t\t}\n+\t\tstep++;\n+\t}\n+\t*prio = NPC_MCAM_ANY_PRIO;\n+\treturn 0;\n+}\n+\n+static int\n+npc_fill_entry_cache(struct mbox *mbox, struct roc_npc_flow *flow,\n+\t\t struct npc *npc, uint32_t *free_ent)\n+{\n+\tstruct plt_bitmap *free_bmp, *free_bmp_rev, *live_bmp, *live_bmp_rev;\n+\tstruct npc_mcam_alloc_entry_rsp rsp_local;\n+\tstruct npc_mcam_alloc_entry_rsp *rsp_cmd;\n+\tstruct npc_mcam_alloc_entry_req *req;\n+\tstruct npc_mcam_alloc_entry_rsp *rsp;\n+\tstruct npc_mcam_ents_info *info;\n+\tint rc = -ENOSPC, prio;\n+\tuint16_t ref_ent, idx;\n+\n+\tinfo = &npc->flow_entry_info[flow->priority];\n+\tfree_bmp = npc->free_entries[flow->priority];\n+\tfree_bmp_rev = npc->free_entries_rev[flow->priority];\n+\tlive_bmp = npc->live_entries[flow->priority];\n+\tlive_bmp_rev = npc->live_entries_rev[flow->priority];\n+\n+\tref_ent = npc_find_ref_entry(npc, &prio, flow->priority);\n+\n+\treq = mbox_alloc_msg_npc_mcam_alloc_entry(mbox);\n+\tif (req == NULL)\n+\t\treturn rc;\n+\treq->contig = 1;\n+\treq->count = npc->flow_prealloc_size;\n+\treq->priority = prio;\n+\treq->ref_entry = ref_ent;\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp_cmd);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\trsp = &rsp_local;\n+\tmemcpy(rsp, rsp_cmd, sizeof(*rsp));\n+\n+\t/* Non-first ent cache fill */\n+\tif (prio != NPC_MCAM_ANY_PRIO) {\n+\t\tnpc_validate_and_shift_prio_ent(mbox, flow, npc, rsp, prio);\n+\t} else {\n+\t\t/* Copy into response entry list */\n+\t\tfor (idx = 0; idx < rsp->count; idx++)\n+\t\t\trsp->entry_list[idx] = rsp->entry + idx;\n+\t}\n+\n+\t/* Update free entries, reverse free entries list,\n+\t * min & max entry ids.\n+\t */\n+\tfor (idx = 0; idx < rsp->count; idx++) {\n+\t\tif (unlikely(rsp->entry_list[idx] < info->min_id))\n+\t\t\tinfo->min_id = rsp->entry_list[idx];\n+\n+\t\tif (unlikely(rsp->entry_list[idx] > info->max_id))\n+\t\t\tinfo->max_id = rsp->entry_list[idx];\n+\n+\t\t/* Skip entry to be returned, not to be part of free\n+\t\t * list.\n+\t\t */\n+\t\tif (prio == NPC_MCAM_HIGHER_PRIO) {\n+\t\t\tif (unlikely(idx == (rsp->count - 1))) {\n+\t\t\t\t*free_ent = rsp->entry_list[idx];\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tif (unlikely(!idx)) {\n+\t\t\t\t*free_ent = rsp->entry_list[idx];\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t}\n+\t\tinfo->free_ent++;\n+\t\tplt_bitmap_set(free_bmp, rsp->entry_list[idx]);\n+\t\tplt_bitmap_set(free_bmp_rev,\n+\t\t\t npc->mcam_entries - rsp->entry_list[idx] - 1);\n+\t}\n+\n+\tinfo->live_ent++;\n+\tplt_bitmap_set(live_bmp, *free_ent);\n+\tplt_bitmap_set(live_bmp_rev, npc->mcam_entries - *free_ent - 1);\n+\n+\treturn 0;\n+}\n+\n+int\n+npc_check_preallocated_entry_cache(struct mbox *mbox, struct roc_npc_flow *flow,\n+\t\t\t\t struct npc *npc)\n+{\n+\tstruct plt_bitmap *free, *free_rev, *live, *live_rev;\n+\tuint32_t pos = 0, free_ent = 0, mcam_entries;\n+\tstruct npc_mcam_ents_info *info;\n+\tuint64_t slab = 0;\n+\tint rc;\n+\n+\tinfo = &npc->flow_entry_info[flow->priority];\n+\n+\tfree_rev = npc->free_entries_rev[flow->priority];\n+\tfree = npc->free_entries[flow->priority];\n+\tlive_rev = npc->live_entries_rev[flow->priority];\n+\tlive = npc->live_entries[flow->priority];\n+\tmcam_entries = npc->mcam_entries;\n+\n+\tif (info->free_ent) {\n+\t\trc = plt_bitmap_scan(free, &pos, &slab);\n+\t\tif (rc) {\n+\t\t\t/* Get free_ent from free entry bitmap */\n+\t\t\tfree_ent = pos + __builtin_ctzll(slab);\n+\t\t\t/* Remove from free bitmaps and add to live ones */\n+\t\t\tplt_bitmap_clear(free, free_ent);\n+\t\t\tplt_bitmap_set(live, free_ent);\n+\t\t\tplt_bitmap_clear(free_rev, mcam_entries - free_ent - 1);\n+\t\t\tplt_bitmap_set(live_rev, mcam_entries - free_ent - 1);\n+\n+\t\t\tinfo->free_ent--;\n+\t\t\tinfo->live_ent++;\n+\t\t\treturn free_ent;\n+\t\t}\n+\t\treturn NPC_ERR_INTERNAL;\n+\t}\n+\n+\trc = npc_fill_entry_cache(mbox, flow, npc, &free_ent);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn free_ent;\n+}\n", "prefixes": [ "41/52" ] }