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GET /api/patches/88317/?format=api
{ "id": 88317, "url": "http://patches.dpdk.org/api/patches/88317/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210301103532.184983-4-lizh@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210301103532.184983-4-lizh@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210301103532.184983-4-lizh@nvidia.com", "date": "2021-03-01T10:35:31", "name": "[RFC,v4,3/4] net/mlx5: support meter PPS profile", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d7c6892bb7f15c278812576119a20d0c43906b40", "submitter": { "id": 1967, "url": "http://patches.dpdk.org/api/people/1967/?format=api", "name": "Li Zhang", "email": "lizh@nvidia.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210301103532.184983-4-lizh@nvidia.com/mbox/", "series": [ { "id": 15418, "url": "http://patches.dpdk.org/api/series/15418/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=15418", "date": "2021-03-01T10:35:28", "name": "adds support PPS(packet per second) on meter", "version": 4, "mbox": "http://patches.dpdk.org/series/15418/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/88317/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/88317/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 481E3A054F;\n\tMon, 1 Mar 2021 11:35:59 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4575C1CC572;\n\tMon, 1 Mar 2021 11:35:55 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by mails.dpdk.org (Postfix) with ESMTP id E99AB1CC56E\n for <dev@dpdk.org>; Mon, 1 Mar 2021 11:35:53 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n lizh@nvidia.com)\n with SMTP; 1 Mar 2021 12:35:48 +0200", "from nvidia.com (c-235-17-1-009.mtl.labs.mlnx [10.235.17.9])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 121AZcTW011605;\n Mon, 1 Mar 2021 12:35:48 +0200" ], "From": "Li Zhang <lizh@nvidia.com>", "To": "dekelp@nvidia.com, orika@nvidia.com, viacheslavo@nvidia.com,\n matan@nvidia.com", "Cc": "dev@dpdk.org, thomas@monjalon.net, rasland@nvidia.com,\n mb@smartsharesystems.com, ajit.khaparde@broadcom.com", "Date": "Mon, 1 Mar 2021 12:35:31 +0200", "Message-Id": "<20210301103532.184983-4-lizh@nvidia.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20210301103532.184983-1-lizh@nvidia.com>", "References": "<20210125010235.1768333-1-lizh@nvidia.com>\n <20210301103532.184983-1-lizh@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [RFC v4 3/4] net/mlx5: support meter PPS profile", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently meter algorithms only supports bytes per second(BPS).\nSuch as Single Rate Three Color Marker (srTCM rfc2697)\nAdd this new meter srTCMp algorithm to support rate is packet per second.\nSo that it can meter traffic by packet per second (PPS).\n\nSigned-off-by: Li Zhang <lizh@nvidia.com>\n---\n doc/guides/nics/mlx5.rst | 1 +\n drivers/net/mlx5/mlx5.h | 13 ++++--\n drivers/net/mlx5/mlx5_flow_aso.c | 17 ++++---\n drivers/net/mlx5/mlx5_flow_meter.c | 71 ++++++++++++++++++++++++------\n 4 files changed, 79 insertions(+), 23 deletions(-)", "diff": "diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex a390a4b53c..93f5c0e4d4 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -362,6 +362,7 @@ Limitations\n - Green color is not supported with drop action.\n - Yellow detection is not supported.\n - Red color must be with drop action.\n+ - meter srTCMp algorithm is supported.\n \n Statistics\n ----------\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 2790995dcc..16fa1b6c4d 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -742,8 +742,13 @@ struct mlx5_flow_meter_info {\n \t/**< Flow meter action. */\n };\n \n-/* RFC2697 parameter structure. */\n-struct mlx5_flow_meter_srtcm_rfc2697_prm {\n+/* PPS(packets per second) map to BPS(Bytes per second).\n+ * HW treat packet as 128bytes in PPS mode\n+ */\n+#define MLX5_MTRS_PPS_MAP_BPS_SHIFT 7\n+\n+/* RFC2697/PPS parameter structure. */\n+struct mlx5_flow_meter_srtcm_prm {\n \trte_be32_t cbs_cir;\n \t/*\n \t * bit 24-28: cbs_exponent, bit 16-23 cbs_mantissa,\n@@ -763,8 +768,8 @@ struct mlx5_flow_meter_profile {\n \tuint32_t id; /**< Profile id. */\n \tstruct rte_mtr_meter_profile profile; /**< Profile detail. */\n \tunion {\n-\t\tstruct mlx5_flow_meter_srtcm_rfc2697_prm srtcm_prm;\n-\t\t/**< srtcm_rfc2697 struct. */\n+\t\tstruct mlx5_flow_meter_srtcm_prm srtcm_prm;\n+\t\t/**< srtcm_rfc2697/srtcm_pps struct. */\n \t};\n \tuint32_t ref_cnt; /**< Use count. */\n };\ndiff --git a/drivers/net/mlx5/mlx5_flow_aso.c b/drivers/net/mlx5/mlx5_flow_aso.c\nindex c9280b1f9d..3f3ba7e8fa 100644\n--- a/drivers/net/mlx5/mlx5_flow_aso.c\n+++ b/drivers/net/mlx5/mlx5_flow_aso.c\n@@ -244,7 +244,6 @@ mlx5_aso_mtr_init_sq(struct mlx5_aso_sq *sq)\n \tvolatile struct mlx5_aso_wqe *restrict wqe;\n \tint i;\n \tint size = 1 << sq->log_desc_n;\n-\tuint32_t idx;\n \n \t/* All the next fields state should stay constant. */\n \tfor (i = 0, wqe = &sq->wqes[0]; i < size; ++i, ++wqe) {\n@@ -257,11 +256,6 @@ mlx5_aso_mtr_init_sq(struct mlx5_aso_sq *sq)\n \t\t\t (BYTEWISE_64BYTE << ASO_CSEG_DATA_MASK_MODE_OFFSET));\n \t\twqe->general_cseg.flags = RTE_BE32(MLX5_COMP_ALWAYS <<\n \t\t\t\t\t\t\t MLX5_COMP_MODE_OFFSET);\n-\t\tfor (idx = 0; idx < MLX5_ASO_METERS_PER_WQE;\n-\t\t\tidx++)\n-\t\t\twqe->aso_dseg.mtrs[idx].v_bo_sc_bbog_mm =\n-\t\t\t\tRTE_BE32((1 << ASO_DSEG_VALID_OFFSET) |\n-\t\t\t\t(MLX5_FLOW_COLOR_GREEN << ASO_DSEG_SC_OFFSET));\n \t}\n }\n \n@@ -744,6 +738,7 @@ mlx5_aso_mtr_sq_enqueue_single(struct mlx5_aso_sq *sq,\n {\n \tvolatile struct mlx5_aso_wqe *wqe = NULL;\n \tstruct mlx5_flow_meter_info *fm = NULL;\n+\tstruct mlx5_flow_meter_profile *fmp;\n \tuint16_t size = 1 << sq->log_desc_n;\n \tuint16_t mask = size - 1;\n \tuint16_t res = size - (uint16_t)(sq->head - sq->tail);\n@@ -781,6 +776,16 @@ mlx5_aso_mtr_sq_enqueue_single(struct mlx5_aso_sq *sq,\n \t\t\tRTE_BE32(MLX5_IFC_FLOW_METER_DISABLE_CBS_CIR_VAL);\n \t\twqe->aso_dseg.mtrs[dseg_idx].ebs_eir = 0;\n \t}\n+\tfmp = fm->profile;\n+\tif (fmp->profile.alg == RTE_MTR_SRTCMP)\n+\t\twqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm =\n+\t\t\t\tRTE_BE32((1 << ASO_DSEG_VALID_OFFSET) |\n+\t\t\t\t(MLX5_FLOW_COLOR_GREEN << ASO_DSEG_SC_OFFSET) |\n+\t\t\t\t(MLX5_METER_MODE_PKT << ASO_DSEG_MTR_MODE));\n+\telse\n+\t\twqe->aso_dseg.mtrs[dseg_idx].v_bo_sc_bbog_mm =\n+\t\t\t\tRTE_BE32((1 << ASO_DSEG_VALID_OFFSET) |\n+\t\t\t\t(MLX5_FLOW_COLOR_GREEN << ASO_DSEG_SC_OFFSET));\n \tsq->head++;\n \tsq->pi += 2;/* Each WQE contains 2 WQEBB's. */\n \trte_io_wmb();\ndiff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c\nindex 49f6229ae6..cf2fe8c173 100644\n--- a/drivers/net/mlx5/mlx5_flow_meter.c\n+++ b/drivers/net/mlx5/mlx5_flow_meter.c\n@@ -33,7 +33,7 @@ mlx5_flow_meter_action_create(struct mlx5_priv *priv,\n #ifdef HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER\n \tstruct mlx5dv_dr_flow_meter_attr mtr_init;\n \tuint32_t fmp[MLX5_ST_SZ_DW(flow_meter_parameters)];\n-\tstruct mlx5_flow_meter_srtcm_rfc2697_prm *srtcm =\n+\tstruct mlx5_flow_meter_srtcm_prm *srtcm =\n \t\t\t\t\t\t &fm->profile->srtcm_prm;\n \tuint32_t cbs_cir = rte_be_to_cpu_32(srtcm->cbs_cir);\n \tuint32_t ebs_eir = rte_be_to_cpu_32(srtcm->ebs_eir);\n@@ -157,6 +157,32 @@ mlx5_flow_meter_profile_validate(struct rte_eth_dev *dev,\n \t\t\t\t\t \"Invalid metering parameters.\");\n \t\t}\n \t}\n+\tif (priv->sh->meter_aso_en &&\n+\t\tprofile->alg == RTE_MTR_SRTCMP) {\n+\t\tif (priv->config.hca_attr.qos.srtcm_sup) {\n+\t\t\t/* Verify support for flow meter parameters. */\n+\t\t\tif (profile->srtcmp.cir > 0 &&\n+\t\t\t (profile->srtcmp.cir <<\n+\t\t\t\t\tMLX5_MTRS_PPS_MAP_BPS_SHIFT)\n+\t\t\t\t\t\t<= MLX5_SRTCM_CIR_MAX &&\n+\t\t\t profile->srtcmp.cbs > 0 &&\n+\t\t\t (profile->srtcmp.cbs <<\n+\t\t\t\t\tMLX5_MTRS_PPS_MAP_BPS_SHIFT)\n+\t\t\t\t\t\t<= MLX5_SRTCM_CBS_MAX &&\n+\t\t\t (profile->srtcmp.ebs <<\n+\t\t\t\t\tMLX5_MTRS_PPS_MAP_BPS_SHIFT)\n+\t\t\t\t\t\t<= MLX5_SRTCM_EBS_MAX)\n+\t\t\t\treturn 0;\n+\t\t\telse\n+\t\t\t\treturn -rte_mtr_error_set\n+\t\t\t\t\t (error, ENOTSUP,\n+\t\t\t\t\t RTE_MTR_ERROR_TYPE_MTR_PARAMS,\n+\t\t\t\t\t NULL,\n+\t\t\t\t\t profile->srtcmp.ebs ?\n+\t\t\t\t\t \"Metering value ebs must be 0.\" :\n+\t\t\t\t\t \"Invalid metering parameters.\");\n+\t\t}\n+\t}\n \treturn -rte_mtr_error_set(error, ENOTSUP,\n \t\t\t\t RTE_MTR_ERROR_TYPE_METER_PROFILE,\n \t\t\t\t NULL, \"Metering algorithm not supported.\");\n@@ -238,19 +264,35 @@ mlx5_flow_meter_xbs_man_exp_calc(uint64_t xbs, uint8_t *man, uint8_t *exp)\n */\n static int\n mlx5_flow_meter_param_fill(struct mlx5_flow_meter_profile *fmp,\n-\t\t\t struct rte_mtr_error *error)\n+\t\t\tstruct mlx5_priv *priv, struct rte_mtr_error *error)\n {\n-\tstruct mlx5_flow_meter_srtcm_rfc2697_prm *srtcm = &fmp->srtcm_prm;\n+\tstruct mlx5_flow_meter_srtcm_prm *srtcm = &fmp->srtcm_prm;\n \tuint8_t man, exp;\n \tuint32_t cbs_exp, cbs_man, cir_exp, cir_man;\n \tuint32_t ebs_exp, ebs_man;\n+\tuint64_t cir, cbs, ebs;\n \n-\tif (fmp->profile.alg != RTE_MTR_SRTCM_RFC2697)\n-\t\treturn -rte_mtr_error_set(error, ENOTSUP,\n+\tif (fmp->profile.alg == RTE_MTR_SRTCM_RFC2697) {\n+\t\tcir = fmp->profile.srtcm_rfc2697.cir;\n+\t\tcbs = fmp->profile.srtcm_rfc2697.cbs;\n+\t\tebs = fmp->profile.srtcm_rfc2697.ebs;\n+\t} else {\n+\t\tif (priv->sh->meter_aso_en &&\n+\t\t\tfmp->profile.alg == RTE_MTR_SRTCMP) {\n+\t\t\tcir = fmp->profile.srtcmp.cir <<\n+\t\t\t\tMLX5_MTRS_PPS_MAP_BPS_SHIFT;\n+\t\t\tcbs = fmp->profile.srtcmp.cbs <<\n+\t\t\t\tMLX5_MTRS_PPS_MAP_BPS_SHIFT;\n+\t\t\tebs = fmp->profile.srtcmp.ebs <<\n+\t\t\t\tMLX5_MTRS_PPS_MAP_BPS_SHIFT;\n+\t\t} else {\n+\t\t\treturn -rte_mtr_error_set(error, ENOTSUP,\n \t\t\t\tRTE_MTR_ERROR_TYPE_METER_PROFILE,\n \t\t\t\tNULL, \"Metering algorithm not supported.\");\n+\t\t}\n+\t}\n \t/* cir = 8G * cir_mantissa * 1/(2^cir_exponent)) Bytes/Sec */\n-\tmlx5_flow_meter_cir_man_exp_calc(fmp->profile.srtcm_rfc2697.cir,\n+\tmlx5_flow_meter_cir_man_exp_calc(cir,\n \t\t\t\t &man, &exp);\n \t/* Check if cir mantissa is too large. */\n \tif (exp > ASO_DSEG_CIR_EXP_MASK)\n@@ -261,7 +303,7 @@ mlx5_flow_meter_param_fill(struct mlx5_flow_meter_profile *fmp,\n \tcir_man = man;\n \tcir_exp = exp;\n \t /* cbs = cbs_mantissa * 2^cbs_exponent */\n-\tmlx5_flow_meter_xbs_man_exp_calc(fmp->profile.srtcm_rfc2697.cbs,\n+\tmlx5_flow_meter_xbs_man_exp_calc(cbs,\n \t\t\t\t &man, &exp);\n \t/* Check if cbs mantissa is too large. */\n \tif (exp > ASO_DSEG_EXP_MASK)\n@@ -275,7 +317,7 @@ mlx5_flow_meter_param_fill(struct mlx5_flow_meter_profile *fmp,\n \t\t\t\tcbs_man << ASO_DSEG_CBS_MAN_OFFSET |\n \t\t\t\tcir_exp << ASO_DSEG_CIR_EXP_OFFSET |\n \t\t\t\tcir_man);\n-\tmlx5_flow_meter_xbs_man_exp_calc(fmp->profile.srtcm_rfc2697.ebs,\n+\tmlx5_flow_meter_xbs_man_exp_calc(ebs,\n \t\t\t\t &man, &exp);\n \t/* Check if ebs mantissa is too large. */\n \tif (exp > ASO_DSEG_EXP_MASK)\n@@ -316,11 +358,14 @@ mlx5_flow_mtr_cap_get(struct rte_eth_dev *dev,\n \t\t\t\t\t RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL,\n \t\t\t\t\t \"Meter is not supported\");\n \tmemset(cap, 0, sizeof(*cap));\n-\tif (priv->sh->meter_aso_en)\n+\tif (priv->sh->meter_aso_en) {\n \t /* 2 meters per one ASO cache line. */\n \t\tcap->n_max = 1 << (qattr->log_max_num_meter_aso + 1);\n-\telse\n+\t\tcap->meter_srtcmp_n_max = qattr->srtcm_sup ? cap->n_max : 0;\n+\t} else {\n \t\tcap->n_max = 1 << qattr->log_max_flow_meter;\n+\t\tcap->meter_srtcmp_n_max = 0;\n+\t}\n \tcap->n_shared_max = cap->n_max;\n \tcap->identical = 1;\n \tcap->shared_identical = 1;\n@@ -382,7 +427,7 @@ mlx5_flow_meter_profile_add(struct rte_eth_dev *dev,\n \tfmp->id = meter_profile_id;\n \tfmp->profile = *profile;\n \t/* Fill the flow meter parameters for the PRM. */\n-\tret = mlx5_flow_meter_param_fill(fmp, error);\n+\tret = mlx5_flow_meter_param_fill(fmp, priv, error);\n \tif (ret)\n \t\tgoto error;\n \t/* Add to list. */\n@@ -539,7 +584,7 @@ mlx5_flow_meter_validate(struct mlx5_priv *priv, uint32_t meter_id,\n static int\n mlx5_flow_meter_action_modify(struct mlx5_priv *priv,\n \t\tstruct mlx5_flow_meter_info *fm,\n-\t\tconst struct mlx5_flow_meter_srtcm_rfc2697_prm *srtcm,\n+\t\tconst struct mlx5_flow_meter_srtcm_prm *srtcm,\n \t\tuint64_t modify_bits, uint32_t active_state, uint32_t is_enable)\n {\n #ifdef HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER\n@@ -899,7 +944,7 @@ mlx5_flow_meter_modify_state(struct mlx5_priv *priv,\n \t\t\t uint32_t new_state,\n \t\t\t struct rte_mtr_error *error)\n {\n-\tstatic const struct mlx5_flow_meter_srtcm_rfc2697_prm srtcm = {\n+\tstatic const struct mlx5_flow_meter_srtcm_prm srtcm = {\n \t\t.cbs_cir = RTE_BE32(MLX5_IFC_FLOW_METER_DISABLE_CBS_CIR_VAL),\n \t\t.ebs_eir = 0,\n \t};\n", "prefixes": [ "RFC", "v4", "3/4" ] }