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GET /api/patches/88192/?format=api
{ "id": 88192, "url": "http://patches.dpdk.org/api/patches/88192/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210225080901.3645291-8-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210225080901.3645291-8-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210225080901.3645291-8-jiawenwu@trustnetic.com", "date": "2021-02-25T08:08:51", "name": "[v3,07/17] net/txgbe: add Rx and Tx unit init for VF device", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "fd27afa03341cdb64110a2befdabc2b4dc24118b", "submitter": { "id": 1932, "url": "http://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210225080901.3645291-8-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 15371, "url": "http://patches.dpdk.org/api/series/15371/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=15371", "date": "2021-02-25T08:08:45", "name": "net/txgbe: add VF driver support", "version": 3, "mbox": "http://patches.dpdk.org/series/15371/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/88192/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/88192/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 876CAA034F;\n\tThu, 25 Feb 2021 09:09:42 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 70DFB1607C3;\n\tThu, 25 Feb 2021 09:08:46 +0100 (CET)", "from smtpproxy21.qq.com (smtpbg702.qq.com [203.205.195.102])\n by mails.dpdk.org (Postfix) with ESMTP id D259A160779\n for <dev@dpdk.org>; Thu, 25 Feb 2021 09:08:42 +0100 (CET)", "from wxdbg.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Thu, 25 Feb 2021 16:08:36 +0800 (CST)" ], "X-QQ-mid": "bizesmtp20t1614240516t80zpnxa", "X-QQ-SSF": "01400000002000C0D000000A0000000", "X-QQ-FEAT": "Me8y4DzRu2R/246elbiy1PY/iC0keIhT3hF1Djc/3ACbdAMld+Ra0Yygq5T5L\n WmLLO1k9fK81LhJbjnSsUCSMXENyY5YvrOYSIXhyIMH34QWvMKJncovbdig0lviSITaSnwd\n gR10AYTsGBOZBSO9Lg8/GpNMPTHXKAFe+wPUbkQLD89h7pbJYuiag0wePiYc/EpC7Q9kQB4\n 03ilE0apiNZgLOxCITtFt5E8MQY23BS++yJQ/wvY4WZdEDAXCVYlvcPNLMqcjRr76EWHGDV\n xnEma7r9roOeVY/RdwQL8+8jR2NA9R4a6DleKvl75dSsXvxemRq4xMRDrx58lrMMR2z9btl\n 1eYRqZXoxroi2fLvmkPLwAbvVLfkQ==", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Date": "Thu, 25 Feb 2021 16:08:51 +0800", "Message-Id": "<20210225080901.3645291-8-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20210225080901.3645291-1-jiawenwu@trustnetic.com>", "References": "<20210225080901.3645291-1-jiawenwu@trustnetic.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign7", "X-QQ-Bgrelay": "1", "Subject": "[dpdk-dev] [PATCH v3 07/17] net/txgbe: add Rx and Tx unit init for\n VF device", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Configure VF device with RX port. Initialize receive and transmit unit,\nset the receive and transmit functions. And support to check the\nstatus of RX and TX descriptors.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/features/txgbe_vf.ini | 6 +\n doc/guides/nics/txgbe.rst | 4 +\n drivers/net/txgbe/base/txgbe_vf.c | 24 ++++\n drivers/net/txgbe/base/txgbe_vf.h | 1 +\n drivers/net/txgbe/txgbe_ethdev.h | 4 +\n drivers/net/txgbe/txgbe_ethdev_vf.c | 46 +++++++\n drivers/net/txgbe/txgbe_rxtx.c | 167 +++++++++++++++++++++++++-\n 7 files changed, 250 insertions(+), 2 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/txgbe_vf.ini b/doc/guides/nics/features/txgbe_vf.ini\nindex d81604502..8f36af0e3 100644\n--- a/doc/guides/nics/features/txgbe_vf.ini\n+++ b/doc/guides/nics/features/txgbe_vf.ini\n@@ -7,6 +7,10 @@\n Link status = Y\n Unicast MAC filter = Y\n Rx interrupt = Y\n+Jumbo frame = Y\n+Scattered Rx = Y\n+LRO = Y\n+TSO = Y\n CRC offload = P\n VLAN offload = P\n QinQ offload = P\n@@ -14,6 +18,8 @@ L3 checksum offload = P\n L4 checksum offload = P\n Inner L3 checksum = P\n Inner L4 checksum = P\n+Rx descriptor status = Y\n+Tx descriptor status = Y\n Multiprocess aware = Y\n Linux = Y\n ARMv8 = Y\ndiff --git a/doc/guides/nics/txgbe.rst b/doc/guides/nics/txgbe.rst\nindex 62aa22932..e520f13f3 100644\n--- a/doc/guides/nics/txgbe.rst\n+++ b/doc/guides/nics/txgbe.rst\n@@ -63,6 +63,10 @@ Please note that enabling debugging options may affect system performance.\n \n Toggle display of transmit descriptor clean messages.\n \n+- ``RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC`` (undefined by default)\n+\n+ Decide to enable or disable HW CRC in VF PMD.\n+\n Dynamic Logging Parameters\n ~~~~~~~~~~~~~~~~~~~~~~~~~~\n \ndiff --git a/drivers/net/txgbe/base/txgbe_vf.c b/drivers/net/txgbe/base/txgbe_vf.c\nindex 20ba0b8e2..1cf09ad42 100644\n--- a/drivers/net/txgbe/base/txgbe_vf.c\n+++ b/drivers/net/txgbe/base/txgbe_vf.c\n@@ -33,6 +33,7 @@ s32 txgbe_init_ops_vf(struct txgbe_hw *hw)\n \t/* RAR, Multicast, VLAN */\n \tmac->set_rar = txgbe_set_rar_vf;\n \tmac->set_uc_addr = txgbevf_set_uc_addr_vf;\n+\tmac->set_rlpml = txgbevf_rlpml_set_vf;\n \n \tmac->max_tx_queues = 1;\n \tmac->max_rx_queues = 1;\n@@ -396,6 +397,29 @@ s32 txgbe_check_mac_link_vf(struct txgbe_hw *hw, u32 *speed,\n \treturn ret_val;\n }\n \n+/**\n+ * txgbevf_rlpml_set_vf - Set the maximum receive packet length\n+ * @hw: pointer to the HW structure\n+ * @max_size: value to assign to max frame size\n+ **/\n+s32 txgbevf_rlpml_set_vf(struct txgbe_hw *hw, u16 max_size)\n+{\n+\tu32 msgbuf[2];\n+\ts32 retval;\n+\n+\tmsgbuf[0] = TXGBE_VF_SET_LPE;\n+\tmsgbuf[1] = max_size;\n+\n+\tretval = txgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);\n+\tif (retval)\n+\t\treturn retval;\n+\tif ((msgbuf[0] & TXGBE_VF_SET_LPE) &&\n+\t (msgbuf[0] & TXGBE_VT_MSGTYPE_NACK))\n+\t\treturn TXGBE_ERR_MBX;\n+\n+\treturn 0;\n+}\n+\n /**\n * txgbevf_negotiate_api_version - Negotiate supported API version\n * @hw: pointer to the HW structure\ndiff --git a/drivers/net/txgbe/base/txgbe_vf.h b/drivers/net/txgbe/base/txgbe_vf.h\nindex f40a8f084..7c84c6892 100644\n--- a/drivers/net/txgbe/base/txgbe_vf.h\n+++ b/drivers/net/txgbe/base/txgbe_vf.h\n@@ -20,6 +20,7 @@ s32 txgbe_check_mac_link_vf(struct txgbe_hw *hw, u32 *speed,\n s32 txgbe_set_rar_vf(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,\n \t\t u32 enable_addr);\n s32 txgbevf_set_uc_addr_vf(struct txgbe_hw *hw, u32 index, u8 *addr);\n+s32 txgbevf_rlpml_set_vf(struct txgbe_hw *hw, u16 max_size);\n int txgbevf_negotiate_api_version(struct txgbe_hw *hw, int api);\n int txgbevf_get_queues(struct txgbe_hw *hw, unsigned int *num_tcs,\n \t\t unsigned int *default_tc);\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h\nindex fe36acc25..52ce9c31e 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.h\n+++ b/drivers/net/txgbe/txgbe_ethdev.h\n@@ -475,6 +475,10 @@ void txgbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n void txgbe_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tstruct rte_eth_txq_info *qinfo);\n \n+int txgbevf_dev_rx_init(struct rte_eth_dev *dev);\n+\n+void txgbevf_dev_tx_init(struct rte_eth_dev *dev);\n+\n uint16_t txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\tuint16_t nb_pkts);\n \ndiff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c\nindex 6a5180e21..559af5b16 100644\n--- a/drivers/net/txgbe/txgbe_ethdev_vf.c\n+++ b/drivers/net/txgbe/txgbe_ethdev_vf.c\n@@ -17,6 +17,7 @@\n \n static int txgbevf_dev_info_get(struct rte_eth_dev *dev,\n \t\t\t\t struct rte_eth_dev_info *dev_info);\n+static int txgbevf_dev_configure(struct rte_eth_dev *dev);\n static int txgbevf_dev_link_update(struct rte_eth_dev *dev,\n \t\t\t\t int wait_to_complete);\n static int txgbevf_dev_close(struct rte_eth_dev *dev);\n@@ -110,6 +111,10 @@ eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev)\n \tPMD_INIT_FUNC_TRACE();\n \n \teth_dev->dev_ops = &txgbevf_eth_dev_ops;\n+\teth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status;\n+\teth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status;\n+\teth_dev->rx_pkt_burst = &txgbe_recv_pkts;\n+\teth_dev->tx_pkt_burst = &txgbe_xmit_pkts;\n \n \t/* for secondary processes, we don't initialise any further as primary\n \t * has already done this work. Only check we don't need a different\n@@ -363,6 +368,43 @@ txgbevf_intr_enable(struct rte_eth_dev *dev)\n \tintr->mask_misc = 0;\n }\n \n+static int\n+txgbevf_dev_configure(struct rte_eth_dev *dev)\n+{\n+\tstruct rte_eth_conf *conf = &dev->data->dev_conf;\n+\tstruct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);\n+\n+\tPMD_INIT_LOG(DEBUG, \"Configured Virtual Function port id: %d\",\n+\t\t dev->data->port_id);\n+\n+\tif (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)\n+\t\tdev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;\n+\n+\t/*\n+\t * VF has no ability to enable/disable HW CRC\n+\t * Keep the persistent behavior the same as Host PF\n+\t */\n+#ifndef RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC\n+\tif (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) {\n+\t\tPMD_INIT_LOG(NOTICE, \"VF can't disable HW CRC Strip\");\n+\t\tconf->rxmode.offloads &= ~DEV_RX_OFFLOAD_KEEP_CRC;\n+\t}\n+#else\n+\tif (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {\n+\t\tPMD_INIT_LOG(NOTICE, \"VF can't enable HW CRC Strip\");\n+\t\tconf->rxmode.offloads |= DEV_RX_OFFLOAD_KEEP_CRC;\n+\t}\n+#endif\n+\n+\t/*\n+\t * Initialize to TRUE. If any of Rx queues doesn't meet the bulk\n+\t * allocation or vector Rx preconditions we will reset it.\n+\t */\n+\tadapter->rx_bulk_alloc_allowed = true;\n+\n+\treturn 0;\n+}\n+\n static int\n txgbevf_dev_close(struct rte_eth_dev *dev)\n {\n@@ -384,6 +426,9 @@ txgbevf_dev_close(struct rte_eth_dev *dev)\n \t **/\n \ttxgbevf_remove_mac_addr(dev, 0);\n \n+\tdev->rx_pkt_burst = NULL;\n+\tdev->tx_pkt_burst = NULL;\n+\n \t/* Disable the interrupts for VF */\n \ttxgbevf_intr_disable(dev);\n \n@@ -660,6 +705,7 @@ txgbevf_dev_interrupt_handler(void *param)\n * operation have been implemented\n */\n static const struct eth_dev_ops txgbevf_eth_dev_ops = {\n+\t.dev_configure = txgbevf_dev_configure,\n \t.link_update = txgbevf_dev_link_update,\n \t.dev_infos_get = txgbevf_dev_info_get,\n \t.rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable,\ndiff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c\nindex ac09e75a3..0c434ae5a 100644\n--- a/drivers/net/txgbe/txgbe_rxtx.c\n+++ b/drivers/net/txgbe/txgbe_rxtx.c\n@@ -2837,8 +2837,10 @@ txgbe_rss_disable(struct rte_eth_dev *dev)\n \tstruct txgbe_hw *hw;\n \n \thw = TXGBE_DEV_HW(dev);\n-\n-\twr32m(hw, TXGBE_RACTL, TXGBE_RACTL_RSSENA, 0);\n+\tif (hw->mac.type == txgbe_mac_raptor_vf)\n+\t\twr32m(hw, TXGBE_VFPLCFG, TXGBE_VFPLCFG_RSSENA, 0);\n+\telse\n+\t\twr32m(hw, TXGBE_RACTL, TXGBE_RACTL_RSSENA, 0);\n }\n \n int\n@@ -4722,6 +4724,167 @@ txgbe_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tqinfo->conf.tx_deferred_start = txq->tx_deferred_start;\n }\n \n+/*\n+ * [VF] Initializes Receive Unit.\n+ */\n+int __rte_cold\n+txgbevf_dev_rx_init(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw *hw;\n+\tstruct txgbe_rx_queue *rxq;\n+\tstruct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;\n+\tuint64_t bus_addr;\n+\tuint32_t srrctl, psrtype;\n+\tuint16_t buf_size;\n+\tuint16_t i;\n+\tint ret;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\thw = TXGBE_DEV_HW(dev);\n+\n+\tif (rte_is_power_of_2(dev->data->nb_rx_queues) == 0) {\n+\t\tPMD_INIT_LOG(ERR, \"The number of Rx queue invalid, \"\n+\t\t\t\"it should be power of 2\");\n+\t\treturn -1;\n+\t}\n+\n+\tif (dev->data->nb_rx_queues > hw->mac.max_rx_queues) {\n+\t\tPMD_INIT_LOG(ERR, \"The number of Rx queue invalid, \"\n+\t\t\t\"it should be equal to or less than %d\",\n+\t\t\thw->mac.max_rx_queues);\n+\t\treturn -1;\n+\t}\n+\n+\t/*\n+\t * When the VF driver issues a TXGBE_VF_RESET request, the PF driver\n+\t * disables the VF receipt of packets if the PF MTU is > 1500.\n+\t * This is done to deal with limitations that imposes\n+\t * the PF and all VFs to share the same MTU.\n+\t * Then, the PF driver enables again the VF receipt of packet when\n+\t * the VF driver issues a TXGBE_VF_SET_LPE request.\n+\t * In the meantime, the VF device cannot be used, even if the VF driver\n+\t * and the Guest VM network stack are ready to accept packets with a\n+\t * size up to the PF MTU.\n+\t * As a work-around to this PF behaviour, force the call to\n+\t * txgbevf_rlpml_set_vf even if jumbo frames are not used. This way,\n+\t * VF packets received can work in all cases.\n+\t */\n+\tif (txgbevf_rlpml_set_vf(hw,\n+\t (uint16_t)dev->data->dev_conf.rxmode.max_rx_pkt_len)) {\n+\t\tPMD_INIT_LOG(ERR, \"Set max packet length to %d failed.\",\n+\t\t\t dev->data->dev_conf.rxmode.max_rx_pkt_len);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/*\n+\t * Assume no header split and no VLAN strip support\n+\t * on any Rx queue first .\n+\t */\n+\trxmode->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;\n+\n+\t/* Set PSR type for VF RSS according to max Rx queue */\n+\tpsrtype = TXGBE_VFPLCFG_PSRL4HDR |\n+\t\t TXGBE_VFPLCFG_PSRL4HDR |\n+\t\t TXGBE_VFPLCFG_PSRL2HDR |\n+\t\t TXGBE_VFPLCFG_PSRTUNHDR |\n+\t\t TXGBE_VFPLCFG_PSRTUNMAC;\n+\twr32(hw, TXGBE_VFPLCFG, TXGBE_VFPLCFG_PSR(psrtype));\n+\n+\t/* Setup RX queues */\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\trxq = dev->data->rx_queues[i];\n+\n+\t\t/* Allocate buffers for descriptor rings */\n+\t\tret = txgbe_alloc_rx_queue_mbufs(rxq);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\n+\t\t/* Setup the Base and Length of the Rx Descriptor Rings */\n+\t\tbus_addr = rxq->rx_ring_phys_addr;\n+\n+\t\twr32(hw, TXGBE_RXBAL(i),\n+\t\t\t\t(uint32_t)(bus_addr & BIT_MASK32));\n+\t\twr32(hw, TXGBE_RXBAH(i),\n+\t\t\t\t(uint32_t)(bus_addr >> 32));\n+\t\twr32(hw, TXGBE_RXRP(i), 0);\n+\t\twr32(hw, TXGBE_RXWP(i), 0);\n+\n+\t\t/* Configure the RXCFG register */\n+\t\tsrrctl = TXGBE_RXCFG_RNGLEN(rxq->nb_rx_desc);\n+\n+\t\t/* Set if packets are dropped when no descriptors available */\n+\t\tif (rxq->drop_en)\n+\t\t\tsrrctl |= TXGBE_RXCFG_DROP;\n+\n+\t\t/*\n+\t\t * Configure the RX buffer size in the PKTLEN field of\n+\t\t * the RXCFG register of the queue.\n+\t\t * The value is in 1 KB resolution. Valid values can be from\n+\t\t * 1 KB to 16 KB.\n+\t\t */\n+\t\tbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(rxq->mb_pool) -\n+\t\t\tRTE_PKTMBUF_HEADROOM);\n+\t\tbuf_size = ROUND_UP(buf_size, 1 << 10);\n+\t\tsrrctl |= TXGBE_RXCFG_PKTLEN(buf_size);\n+\n+\t\t/*\n+\t\t * VF modification to write virtual function RXCFG register\n+\t\t */\n+\t\twr32(hw, TXGBE_RXCFG(i), srrctl);\n+\n+\t\tif (rxmode->offloads & DEV_RX_OFFLOAD_SCATTER ||\n+\t\t /* It adds dual VLAN length for supporting dual VLAN */\n+\t\t (rxmode->max_rx_pkt_len +\n+\t\t\t\t2 * TXGBE_VLAN_TAG_SIZE) > buf_size) {\n+\t\t\tif (!dev->data->scattered_rx)\n+\t\t\t\tPMD_INIT_LOG(DEBUG, \"forcing scatter mode\");\n+\t\t\tdev->data->scattered_rx = 1;\n+\t\t}\n+\n+\t\tif (rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)\n+\t\t\trxmode->offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;\n+\t}\n+\n+\t/*\n+\t * Device configured with multiple RX queues.\n+\t */\n+\ttxgbe_dev_mq_rx_configure(dev);\n+\n+\ttxgbe_set_rx_function(dev);\n+\n+\treturn 0;\n+}\n+\n+/*\n+ * [VF] Initializes Transmit Unit.\n+ */\n+void __rte_cold\n+txgbevf_dev_tx_init(struct rte_eth_dev *dev)\n+{\n+\tstruct txgbe_hw *hw;\n+\tstruct txgbe_tx_queue *txq;\n+\tuint64_t bus_addr;\n+\tuint16_t i;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\thw = TXGBE_DEV_HW(dev);\n+\n+\t/* Setup the Base and Length of the Tx Descriptor Rings */\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\ttxq = dev->data->tx_queues[i];\n+\t\tbus_addr = txq->tx_ring_phys_addr;\n+\t\twr32(hw, TXGBE_TXBAL(i),\n+\t\t\t\t(uint32_t)(bus_addr & BIT_MASK32));\n+\t\twr32(hw, TXGBE_TXBAH(i),\n+\t\t\t\t(uint32_t)(bus_addr >> 32));\n+\t\twr32m(hw, TXGBE_TXCFG(i), TXGBE_TXCFG_BUFLEN_MASK,\n+\t\t\tTXGBE_TXCFG_BUFLEN(txq->nb_tx_desc));\n+\t\t/* Setup the HW Tx Head and TX Tail descriptor pointers */\n+\t\twr32(hw, TXGBE_TXRP(i), 0);\n+\t\twr32(hw, TXGBE_TXWP(i), 0);\n+\t}\n+}\n+\n int\n txgbe_rss_conf_init(struct txgbe_rte_flow_rss_conf *out,\n \t\t const struct rte_flow_action_rss *in)\n", "prefixes": [ "v3", "07/17" ] }