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GET /api/patches/87420/?format=api
{ "id": 87420, "url": "http://patches.dpdk.org/api/patches/87420/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210127160948.6008-14-lironh@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210127160948.6008-14-lironh@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210127160948.6008-14-lironh@marvell.com", "date": "2021-01-27T16:09:27", "name": "[v3,13/34] net/mvpp2: add dsa mode support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8683434f8cf057e06d8f172829b21b9b31a23515", "submitter": { "id": 996, "url": "http://patches.dpdk.org/api/people/996/?format=api", "name": "Liron Himi", "email": "lironh@marvell.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210127160948.6008-14-lironh@marvell.com/mbox/", "series": [ { "id": 14976, "url": "http://patches.dpdk.org/api/series/14976/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14976", "date": "2021-01-27T16:09:14", "name": "net/mvpp2: misc updates", "version": 3, "mbox": "http://patches.dpdk.org/series/14976/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/87420/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/87420/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B8D76A052A;\n\tWed, 27 Jan 2021 17:12:52 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CAB90140F17;\n\tWed, 27 Jan 2021 17:10:32 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 1B9AC140EFA\n for <dev@dpdk.org>; Wed, 27 Jan 2021 17:10:27 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 10RG5dYl027128; Wed, 27 Jan 2021 08:10:27 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 368j1uc38k-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 27 Jan 2021 08:10:27 -0800", "from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 27 Jan 2021 08:10:26 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH04.marvell.com\n (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 27 Jan 2021 08:10:25 -0800", "from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Wed, 27 Jan 2021 08:10:24 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=WSg2dFlRWH+FRVfCvWNWFugY0YT3E/NcnZQ+KuxRe8s=;\n b=ERCVMaCidaW23iCetSsYCfdSzT6ivI/gD8FsYzP1dBBDkU4qhGkO4wFPtGn2LzPDx3+Q\n RLZqA5D1WDkpyBDD0esz3Nw8aW/udQWxpSm1aLVZh4zOHmiiBPw36EKovAusPVDA+1xm\n n4mTvhIcZrWCth+67FI3+ZIDMGNXUyrvanswP3IprE83rrCyPJ/J1fal7ZvVZak6DLVD\n PrX91jV4FS0wKjC6X/KcCE7kvWZ7OtO4gSlm62gCDhleZWC1dl0y1jug+6MXAylWCBDn\n B+0HUN/23Ya9o3cUl8l8geGDpewr13jmbxHxaKLgQ18M3B2VTQIQoCOidHfm1a9BD2YA VQ==", "From": "<lironh@marvell.com>", "To": "<jerinj@marvell.com>, <ferruh.yigit@intel.com>", "CC": "<dev@dpdk.org>, Liron Himi <lironh@marvell.com>", "Date": "Wed, 27 Jan 2021 18:09:27 +0200", "Message-ID": "<20210127160948.6008-14-lironh@marvell.com>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20210127160948.6008-1-lironh@marvell.com>", "References": "<20210122191925.24308-1-lironh@marvell.com>\n <20210127160948.6008-1-lironh@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737\n definitions=2021-01-27_05:2021-01-27,\n 2021-01-27 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 13/34] net/mvpp2: add dsa mode support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Liron Himi <lironh@marvell.com>\n\nExtend the config file with 'dsa-mode' field.\ncurrently 'eth' (default) and 'dsa' headers are supported.\n\nSigned-off-by: Liron Himi <lironh@marvell.com>\n---\n doc/guides/nics/mvpp2.rst | 11 ++++--\n drivers/net/mvpp2/mrvl_ethdev.c | 4 ++\n drivers/net/mvpp2/mrvl_qos.c | 65 ++++++++++++++++++++++++++-------\n drivers/net/mvpp2/mrvl_qos.h | 1 +\n 4 files changed, 64 insertions(+), 17 deletions(-)", "diff": "diff --git a/doc/guides/nics/mvpp2.rst b/doc/guides/nics/mvpp2.rst\nindex e1246efae1..c0e88c6b11 100644\n--- a/doc/guides/nics/mvpp2.rst\n+++ b/doc/guides/nics/mvpp2.rst\n@@ -188,12 +188,12 @@ MVPP2 PMD supports the following extended statistics:\n \t- ``tx_errors``: number of TX MAC errors\n \n \n-.. _qossupport:\n+.. _extconf:\n \n-QoS Configuration\n------------------\n+External Configuration\n+----------------------\n \n-QoS configuration is done through external configuration file. Path to the\n+Several driver configuration (e.g. QoS) can be done through external configuration file. Path to the\n file must be given as `cfg` in driver's vdev parameter list.\n \n Configuration syntax\n@@ -209,6 +209,7 @@ Configuration syntax\n cbs = <cbs>\n \n [port <portnum> default]\n+ dsa_mode = <dsa_mode>\n default_tc = <default_tc>\n mapping_priority = <mapping_priority>\n \n@@ -241,6 +242,8 @@ Where:\n \n - ``<portnum>``: DPDK Port number (0..n).\n \n+- ``<dsa_mode>``: Indicate what is the dsa header mode (`none`, `dsa`, or `ext_dsa`).\n+\n - ``<default_tc>``: Default traffic class (e.g. 0)\n \n - ``<mapping_priority>``: QoS priority for mapping (`ip`, `vlan`, `ip/vlan` or `vlan/ip`).\ndiff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c\nindex 99e2e5a670..db097ef64a 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.c\n+++ b/drivers/net/mvpp2/mrvl_ethdev.c\n@@ -689,6 +689,10 @@ mrvl_dev_start(struct rte_eth_dev *dev)\n \tsnprintf(match, sizeof(match), \"ppio-%d:%d\",\n \t\t priv->pp_id, priv->ppio_id);\n \tpriv->ppio_params.match = match;\n+\tpriv->ppio_params.eth_start_hdr = PP2_PPIO_HDR_ETH;\n+\tif (mrvl_qos_cfg)\n+\t\tpriv->ppio_params.eth_start_hdr =\n+\t\t\tmrvl_qos_cfg->port[dev->data->port_id].eth_start_hdr;\n \n \t/*\n \t * Calculate the minimum bpool size for refill feature as follows:\ndiff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c\nindex 7fd970309e..976cb06a84 100644\n--- a/drivers/net/mvpp2/mrvl_qos.c\n+++ b/drivers/net/mvpp2/mrvl_qos.c\n@@ -19,6 +19,10 @@\n \n /* Parsing tokens. Defined conveniently, so that any correction is easy. */\n #define MRVL_TOK_DEFAULT \"default\"\n+#define MRVL_TOK_DSA_MODE \"dsa_mode\"\n+#define MRVL_TOK_DSA_MODE_NONE \"none\"\n+#define MRVL_TOK_DSA_MODE_DSA \"dsa\"\n+#define MRVL_TOK_DSA_MODE_EXT_DSA \"ext_dsa\"\n #define MRVL_TOK_DEFAULT_TC \"default_tc\"\n #define MRVL_TOK_DSCP \"dscp\"\n #define MRVL_TOK_MAPPING_PRIORITY \"mapping_priority\"\n@@ -494,16 +498,19 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path,\n \tconst char *entry;\n \tchar sec_name[32];\n \n-\tif (file == NULL)\n-\t\trte_exit(EXIT_FAILURE, \"Cannot load configuration %s\\n\", path);\n+\tif (file == NULL) {\n+\t\tMRVL_LOG(ERR, \"Cannot load configuration %s\\n\", path);\n+\t\treturn -1;\n+\t}\n \n \t/* Create configuration. This is never accessed on the fast path,\n \t * so we can ignore socket.\n \t */\n \t*cfg = rte_zmalloc(\"mrvl_qos_cfg\", sizeof(struct mrvl_qos_cfg), 0);\n-\tif (*cfg == NULL)\n-\t\trte_exit(EXIT_FAILURE, \"Cannot allocate configuration %s\\n\",\n-\t\t\tpath);\n+\tif (*cfg == NULL) {\n+\t\tMRVL_LOG(ERR, \"Cannot allocate configuration %s\\n\", path);\n+\t\treturn -1;\n+\t}\n \n \tn = rte_cfgfile_num_sections(file, MRVL_TOK_PORT,\n \t\tsizeof(MRVL_TOK_PORT) - 1);\n@@ -528,6 +535,31 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path,\n \t\t\tcontinue;\n \t\t}\n \n+\t\tentry = rte_cfgfile_get_entry(file, sec_name,\n+\t\t\t\tMRVL_TOK_DSA_MODE);\n+\t\tif (entry) {\n+\t\t\tif (!strncmp(entry, MRVL_TOK_DSA_MODE_NONE,\n+\t\t\t\tsizeof(MRVL_TOK_DSA_MODE_NONE)))\n+\t\t\t\t(*cfg)->port[n].eth_start_hdr =\n+\t\t\t\tPP2_PPIO_HDR_ETH;\n+\t\t\telse if (!strncmp(entry, MRVL_TOK_DSA_MODE_DSA,\n+\t\t\t\tsizeof(MRVL_TOK_DSA_MODE_DSA)))\n+\t\t\t\t(*cfg)->port[n].eth_start_hdr =\n+\t\t\t\tPP2_PPIO_HDR_ETH_DSA;\n+\t\t\telse if (!strncmp(entry, MRVL_TOK_DSA_MODE_EXT_DSA,\n+\t\t\t\tsizeof(MRVL_TOK_DSA_MODE_EXT_DSA))) {\n+\t\t\t\t(*cfg)->port[n].eth_start_hdr =\n+\t\t\t\tPP2_PPIO_HDR_ETH_EXT_DSA;\n+\t\t\t} else {\n+\t\t\t\tMRVL_LOG(ERR,\n+\t\t\t\t\t\"Error in parsing %s value (%s)!\\n\",\n+\t\t\t\t\tMRVL_TOK_DSA_MODE, entry);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t} else {\n+\t\t\t(*cfg)->port[n].eth_start_hdr = PP2_PPIO_HDR_ETH;\n+\t\t}\n+\n \t\t/*\n \t\t * Read per-port rate limiting. Setting that will\n \t\t * disable per-queue rate limiting.\n@@ -575,13 +607,15 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path,\n \t\t\t\t(*cfg)->port[n].mapping_priority =\n \t\t\t\t\tPP2_CLS_QOS_TBL_IP_PRI;\n \t\t\telse if (!strncmp(entry, MRVL_TOK_VLAN,\n-\t\t\t\tsizeof(MRVL_TOK_VLAN)))\n+\t\t\t\tsizeof(MRVL_TOK_VLAN))) {\n \t\t\t\t(*cfg)->port[n].mapping_priority =\n \t\t\t\t\tPP2_CLS_QOS_TBL_VLAN_PRI;\n-\t\t\telse\n-\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t} else {\n+\t\t\t\tMRVL_LOG(ERR,\n \t\t\t\t\t\"Error in parsing %s value (%s)!\\n\",\n \t\t\t\t\tMRVL_TOK_MAPPING_PRIORITY, entry);\n+\t\t\t\treturn -1;\n+\t\t\t}\n \t\t} else {\n \t\t\t(*cfg)->port[n].mapping_priority =\n \t\t\t\tPP2_CLS_QOS_TBL_VLAN_IP_PRI;\n@@ -604,18 +638,22 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path,\n \n \t\tfor (i = 0; i < MRVL_PP2_RXQ_MAX; ++i) {\n \t\t\tret = get_outq_cfg(file, n, i, *cfg);\n-\t\t\tif (ret < 0)\n-\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\tif (ret < 0) {\n+\t\t\t\tMRVL_LOG(ERR,\n \t\t\t\t\t\"Error %d parsing port %d outq %d!\\n\",\n \t\t\t\t\tret, n, i);\n+\t\t\t\treturn -1;\n+\t\t\t}\n \t\t}\n \n \t\tfor (i = 0; i < MRVL_PP2_TC_MAX; ++i) {\n \t\t\tret = parse_tc_cfg(file, n, i, *cfg);\n-\t\t\tif (ret < 0)\n-\t\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\tif (ret < 0) {\n+\t\t\t\tMRVL_LOG(ERR,\n \t\t\t\t\t\"Error %d parsing port %d tc %d!\\n\",\n \t\t\t\t\tret, n, i);\n+\t\t\t\treturn -1;\n+\t\t\t}\n \t\t}\n \n \t\tentry = rte_cfgfile_get_entry(file, sec_name,\n@@ -628,7 +666,8 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char *path,\n \t\t} else {\n \t\t\tif ((*cfg)->port[n].use_global_defaults == 0) {\n \t\t\t\tMRVL_LOG(ERR,\n-\t\t\t\t\t \"Default Traffic Class required in custom configuration!\");\n+\t\t\t\t\t \"Default Traffic Class required in \"\n+\t\t\t\t\t \"custom configuration!\");\n \t\t\t\treturn -1;\n \t\t\t}\n \t\t}\ndiff --git a/drivers/net/mvpp2/mrvl_qos.h b/drivers/net/mvpp2/mrvl_qos.h\nindex f03e7731c6..0934752cfe 100644\n--- a/drivers/net/mvpp2/mrvl_qos.h\n+++ b/drivers/net/mvpp2/mrvl_qos.h\n@@ -20,6 +20,7 @@\n /* QoS config. */\n struct mrvl_qos_cfg {\n \tstruct port_cfg {\n+\t\tenum pp2_ppio_eth_start_hdr eth_start_hdr;\n \t\tint rate_limit_enable;\n \t\tstruct pp2_ppio_rate_limit_params rate_limit_params;\n \t\tstruct {\n", "prefixes": [ "v3", "13/34" ] }