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GET /api/patches/85180/?format=api
{ "id": 85180, "url": "http://patches.dpdk.org/api/patches/85180/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201215060519.302145-24-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201215060519.302145-24-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201215060519.302145-24-qi.z.zhang@intel.com", "date": "2020-12-15T06:05:15", "name": "[23/27] net/ice/base: align macro names to the specification", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "94d584c83448d693fb0e24a1911b13a09ad2396a", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201215060519.302145-24-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 14300, "url": "http://patches.dpdk.org/api/series/14300/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14300", "date": "2020-12-15T06:04:52", "name": "ice base code update", "version": 1, "mbox": "http://patches.dpdk.org/series/14300/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/85180/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/85180/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id ED139A09E9;\n\tTue, 15 Dec 2020 07:09:34 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A4DB1CAAE;\n\tTue, 15 Dec 2020 07:02:08 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 795B8CA9B\n for <dev@dpdk.org>; Tue, 15 Dec 2020 07:02:06 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Dec 2020 22:02:04 -0800", "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga002.jf.intel.com with ESMTP; 14 Dec 2020 22:02:02 -0800" ], "IronPort-SDR": [ "\n m7cEQ03I13dqDvrKk2/7wFYhCSdeMAJ0PKTyvqbesqLwftFng8+HJeoC6J6VqPrrGEp+esfKih\n 1HEcMfppgfmQ==", "\n YXqFEq62dPUSz1yoe3CahzEOToo2noYAms9WW1AhU4/Bvb02cW3b2lP+89tcqH8bDcsNm41RRr\n j5fAdTRF/3Cw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9835\"; a=\"193200311\"", "E=Sophos;i=\"5.78,420,1599548400\"; d=\"scan'208\";a=\"193200311\"", "E=Sophos;i=\"5.78,420,1599548400\"; d=\"scan'208\";a=\"351723741\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>", "Date": "Tue, 15 Dec 2020 14:05:15 +0800", "Message-Id": "<20201215060519.302145-24-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20201215060519.302145-1-qi.z.zhang@intel.com>", "References": "<20201215060519.302145-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 23/27] net/ice/base: align macro names to the\n\tspecification", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "For get PHY abilities AQ, the specification defines \"report modes\"\nas \"with media\", \"without media\" and \"active configuration\". For\nclarity, rename macros to align with the specification.\n\nSigned-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 4 ++--\n drivers/net/ice/base/ice_common.c | 12 ++++++------\n drivers/net/ice/ice_dcf_parent.c | 2 +-\n drivers/net/ice/ice_ethdev.c | 4 ++--\n 4 files changed, 11 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex b07d7d7b60..ff5f495370 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -1222,8 +1222,8 @@ struct ice_aqc_get_phy_caps {\n #define ICE_AQC_REPORT_MODE_S\t\t\t1\n #define ICE_AQC_REPORT_MODE_M\t\t\t(7 << ICE_AQC_REPORT_MODE_S)\n #define ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA\t0\n-#define ICE_AQC_REPORT_TOPO_CAP\t\t\tBIT(1)\n-#define ICE_AQC_REPORT_SW_CFG\t\t\tBIT(2)\n+#define ICE_AQC_REPORT_TOPO_CAP_MEDIA\t\tBIT(1)\n+#define ICE_AQC_REPORT_ACTIVE_CFG\t\tBIT(2)\n #define ICE_AQC_REPORT_DFLT_CFG\t\t\tBIT(3)\n \t__le32 reserved1;\n \t__le32 addr_high;\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex a1dce031fb..f2fb132060 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -198,7 +198,7 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,\n \tice_debug(hw, ICE_DBG_LINK, \" module_type[2] = 0x%x\\n\",\n \t\t pcaps->module_type[2]);\n \n-\tif (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP) {\n+\tif (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP_MEDIA) {\n \t\tpi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);\n \t\tpi->phy.phy_type_high = LE64_TO_CPU(pcaps->phy_type_high);\n \t\tice_memcpy(pi->phy.link_info.module_type, &pcaps->module_type,\n@@ -783,7 +783,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \n \t/* Initialize port_info struct with PHY capabilities */\n \tstatus = ice_aq_get_phy_caps(hw->port_info, false,\n-\t\t\t\t ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);\n+\t\t\t\t ICE_AQC_REPORT_TOPO_CAP_MEDIA, pcaps, NULL);\n \tice_free(hw, pcaps);\n \tif (status)\n \t\tice_warn(hw, \"Get PHY capabilities failed status = %d, continuing anyway\\n\",\n@@ -2777,7 +2777,7 @@ enum ice_status ice_update_link_info(struct ice_port_info *pi)\n \t\tif (!pcaps)\n \t\t\treturn ICE_ERR_NO_MEMORY;\n \n-\t\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP,\n+\t\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA,\n \t\t\t\t\t pcaps, NULL);\n \n \t\tif (status == ICE_SUCCESS)\n@@ -2900,7 +2900,7 @@ ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,\n \t\t/* Query the value of FC that both the NIC and attached media\n \t\t * can do.\n \t\t */\n-\t\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP,\n+\t\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA,\n \t\t\t\t\t pcaps, NULL);\n \t\tif (status) {\n \t\t\tice_free(pi->hw, pcaps);\n@@ -2969,7 +2969,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n \t/* Get the current PHY config */\n-\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG,\n+\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG,\n \t\t\t\t pcaps, NULL);\n \n \tif (status) {\n@@ -3128,7 +3128,7 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,\n \tstatus = ice_aq_get_phy_caps(pi, false,\n \t\t\t\t (ice_fw_supports_report_dflt_cfg(hw) ?\n \t\t\t\t ICE_AQC_REPORT_DFLT_CFG :\n-\t\t\t\t ICE_AQC_REPORT_TOPO_CAP), pcaps, NULL);\n+\t\t\t\t ICE_AQC_REPORT_TOPO_CAP_MEDIA), pcaps, NULL);\n \n \tif (status)\n \t\tgoto out;\ndiff --git a/drivers/net/ice/ice_dcf_parent.c b/drivers/net/ice/ice_dcf_parent.c\nindex 30ead4c9fd..7d565028f6 100644\n--- a/drivers/net/ice/ice_dcf_parent.c\n+++ b/drivers/net/ice/ice_dcf_parent.c\n@@ -202,7 +202,7 @@ ice_dcf_init_parent_hw(struct ice_hw *hw)\n \n \t/* Initialize port_info struct with PHY capabilities */\n \tstatus = ice_aq_get_phy_caps(hw->port_info, false,\n-\t\t\t\t ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);\n+\t\t\t\t ICE_AQC_REPORT_TOPO_CAP_MEDIA, pcaps, NULL);\n \tice_free(hw, pcaps);\n \tif (status)\n \t\tgoto err_unroll_alloc;\ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 9a5d6a559f..bb9a065816 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -3840,8 +3840,8 @@ ice_force_phys_link_state(struct ice_hw *hw, bool link_up)\n \tif (!pcaps)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n-\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, pcaps,\n-\t\t\t\t NULL);\n+\tstatus = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG,\n+\t\t\t\t pcaps, NULL);\n \tif (status)\n \t\tgoto out;\n \n", "prefixes": [ "23/27" ] }