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Update a patch.

GET /api/patches/85164/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 85164,
    "url": "http://patches.dpdk.org/api/patches/85164/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201215060519.302145-8-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201215060519.302145-8-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201215060519.302145-8-qi.z.zhang@intel.com",
    "date": "2020-12-15T06:04:59",
    "name": "[07/27] net/ice/base: read Option ROM combo version from CIVD section",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "8a0fc0f8ba76ebcc833575c47c7769817c38cc8a",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201215060519.302145-8-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 14300,
            "url": "http://patches.dpdk.org/api/series/14300/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14300",
            "date": "2020-12-15T06:04:52",
            "name": "ice base code update",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/14300/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/85164/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/85164/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 68EC0A09E9;\n\tTue, 15 Dec 2020 07:04:05 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8940EC9E6;\n\tTue, 15 Dec 2020 07:01:42 +0100 (CET)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 830A9C9B4\n for <dev@dpdk.org>; Tue, 15 Dec 2020 07:01:37 +0100 (CET)",
            "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Dec 2020 22:01:36 -0800",
            "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga002.jf.intel.com with ESMTP; 14 Dec 2020 22:01:35 -0800"
        ],
        "IronPort-SDR": [
            "\n I+VncG7jKyQhwqp0TqjhgGxpbOIeLumFtXaDbyBrdp/L+g7+bhLJs1i3l8UhlwgsKZV758aq27\n MrBqrpmWagIw==",
            "\n YUCgF59evXF+HauVack6c1k/1qV/+agsb6Y/DIs883Qqo9OJeXib0htP5w+WIpvT4QXOCpnvpC\n wBe0z7tWmwRw=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9835\"; a=\"193200231\"",
            "E=Sophos;i=\"5.78,420,1599548400\"; d=\"scan'208\";a=\"193200231\"",
            "E=Sophos;i=\"5.78,420,1599548400\"; d=\"scan'208\";a=\"351723402\""
        ],
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "qiming.yang@intel.com",
        "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>",
        "Date": "Tue, 15 Dec 2020 14:04:59 +0800",
        "Message-Id": "<20201215060519.302145-8-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20201215060519.302145-1-qi.z.zhang@intel.com>",
        "References": "<20201215060519.302145-1-qi.z.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 07/27] net/ice/base: read Option ROM combo\n\tversion from CIVD section",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The driver currently reads the combo image version data from within the\nBoot Configuration TLV block of the PFA area of the NVM. This allows\naccess to the active Option ROM version data, assuming that it has been\nproperly copied into this section.\n\nThere is no equivalent method for reading the Option ROM version data\nfrom a pending Option ROM update, as it will not yet have been copied\ninto the PFA boot configuration block. Instead, replace this\nimplementation with one which scans for the CIVD data section of the\nOption ROM image data.\n\nThis CIVD data is stored in a packed structured format within the Option\nROM. It is always aligned to a 512 byte boundary, and starts with\na special '$CIV' 4-byte signature. Data integrity is checked using\na simple modulo 256 sum of the structure bytes.\n\nImplement a new ice_get_orom_civd_data function which allows reading\nfrom the selected flash bank (active or inactive), and scans for valid\nCIVD data. Use this instead of the boot configuration TLV in order to\nreport the combo version data of precisely what is in the Option ROM\ndata.\n\nTo allow access to reading the inactive Option ROM bank, introduce a new\nice_get_inactive_orom_ver function. Use of a new function is done in\norder to avoid leaking the bank selection abstraction outside of\nice_nvm.c\n\nWith this new function, the driver can now read and display the version\nof the to-be-activated Option ROM when an update has been initiated but\nnot yet finalized.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_nvm.c | 121 ++++++++++++++++++++++-----------\n drivers/net/ice/base/ice_nvm.h |  13 ++++\n 2 files changed, 95 insertions(+), 39 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex e2c9068bc5..71affd1812 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -629,64 +629,109 @@ static enum ice_status ice_get_orom_srev(struct ice_hw *hw, enum ice_bank_select\n }\n \n /**\n- * ice_get_orom_ver_info - Read Option ROM version information\n+ * ice_get_orom_civd_data - Get the combo version information from Option ROM\n  * @hw: pointer to the HW struct\n- * @orom: pointer to Option ROM info structure\n+ * @bank: whether to read from the active or inactive flash module\n+ * @civd: storage for the Option ROM CIVD data.\n  *\n- * Read the Combo Image version data from the Boot Configuration TLV and fill\n- * in the option ROM version data.\n+ * Searches through the Option ROM flash contents to locate the CIVD data for\n+ * the image.\n  */\n static enum ice_status\n-ice_get_orom_ver_info(struct ice_hw *hw, struct ice_orom_info *orom)\n+ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank,\n+\t\t       struct ice_orom_civd_info *civd)\n {\n-\tu16 combo_hi, combo_lo, boot_cfg_tlv, boot_cfg_tlv_len;\n+\tstruct ice_orom_civd_info tmp;\n \tenum ice_status status;\n-\tu32 combo_ver;\n-\n-\tstatus = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,\n-\t\t\t\t\tICE_SR_BOOT_CFG_PTR);\n-\tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read Boot Configuration Block TLV.\\n\");\n-\t\treturn status;\n-\t}\n+\tu32 offset;\n \n-\t/* Boot Configuration Block must have length at least 2 words\n-\t * (Combo Image Version High and Combo Image Version Low)\n+\t/* The CIVD section is located in the Option ROM aligned to 512 bytes.\n+\t * The first 4 bytes must contain the ASCII characters \"$CIV\".\n+\t * A simple modulo 256 sum of all of the bytes of the structure must\n+\t * equal 0.\n \t */\n-\tif (boot_cfg_tlv_len < 2) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Invalid Boot Configuration Block TLV size.\\n\");\n-\t\treturn ICE_ERR_INVAL_SIZE;\n-\t}\n+\tfor (offset = 0; (offset + 512) <= hw->flash.banks.orom_size; offset += 512) {\n+\t\tu8 sum = 0, i;\n \n-\tstatus = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OROM_VER_OFF),\n-\t\t\t\t  &combo_hi);\n-\tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read OROM_VER hi.\\n\");\n-\t\treturn status;\n+\t\tstatus = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR,\n+\t\t\t\t\t       offset, (u8 *)&tmp, sizeof(tmp));\n+\t\tif (status) {\n+\t\t\tice_debug(hw, ICE_DBG_NVM, \"Unable to read Option ROM CIVD data\\n\");\n+\t\t\treturn status;\n+\t\t}\n+\n+\t\t/* Skip forward until we find a matching signature */\n+\t\tif (memcmp(\"$CIV\", tmp.signature, sizeof(tmp.signature)) != 0)\n+\t\t\tcontinue;\n+\n+\t\t/* Verify that the simple checksum is zero */\n+\t\tfor (i = 0; i < sizeof(tmp); i++)\n+\t\t\tsum += ((u8 *)&tmp)[i];\n+\n+\t\tif (sum) {\n+\t\t\tice_debug(hw, ICE_DBG_NVM, \"Found CIVD data with invalid checksum of %u\\n\",\n+\t\t\t\t  sum);\n+\t\t\treturn ICE_ERR_NVM;\n+\t\t}\n+\n+\t\t*civd = tmp;\n+\t\treturn ICE_SUCCESS;\n \t}\n \n-\tstatus = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OROM_VER_OFF + 1),\n-\t\t\t\t  &combo_lo);\n+\treturn ICE_ERR_NVM;\n+}\n+\n+/**\n+ * ice_get_orom_ver_info - Read Option ROM version information\n+ * @hw: pointer to the HW struct\n+ * @bank: whether to read from the active or inactive flash module\n+ * @orom: pointer to Option ROM info structure\n+ *\n+ * Read Option ROM version and security revision from the Option ROM flash\n+ * section.\n+ */\n+static enum ice_status\n+ice_get_orom_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_orom_info *orom)\n+{\n+\tstruct ice_orom_civd_info civd;\n+\tenum ice_status status;\n+\tu32 combo_ver;\n+\n+\tstatus = ice_get_orom_civd_data(hw, bank, &civd);\n \tif (status) {\n-\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read OROM_VER lo.\\n\");\n+\t\tice_debug(hw, ICE_DBG_NVM, \"Failed to locate valid Option ROM CIVD data\\n\");\n \t\treturn status;\n \t}\n \n-\tcombo_ver = ((u32)combo_hi << 16) | combo_lo;\n+\tcombo_ver = LE32_TO_CPU(civd.combo_ver);\n \n-\torom->major = (u8)((combo_ver & ICE_OROM_VER_MASK) >>\n-\t\t\t   ICE_OROM_VER_SHIFT);\n+\torom->major = (u8)((combo_ver & ICE_OROM_VER_MASK) >> ICE_OROM_VER_SHIFT);\n \torom->patch = (u8)(combo_ver & ICE_OROM_VER_PATCH_MASK);\n-\torom->build = (u16)((combo_ver & ICE_OROM_VER_BUILD_MASK) >>\n-\t\t\t    ICE_OROM_VER_BUILD_SHIFT);\n+\torom->build = (u16)((combo_ver & ICE_OROM_VER_BUILD_MASK) >> ICE_OROM_VER_BUILD_SHIFT);\n \n-\tstatus = ice_get_orom_srev(hw, ICE_ACTIVE_FLASH_BANK, &orom->srev);\n-\tif (status)\n+\tstatus = ice_get_orom_srev(hw, bank, &orom->srev);\n+\tif (status) {\n \t\tice_debug(hw, ICE_DBG_NVM, \"Failed to read Option ROM security revision.\\n\");\n+\t\treturn status;\n+\t}\n \n \treturn ICE_SUCCESS;\n }\n \n+/**\n+ * ice_get_inactive_orom_ver - Read Option ROM version from the inactive bank\n+ * @hw: pointer to the HW structure\n+ * @orom: storage for Option ROM version information\n+ *\n+ * Reads the Option ROM version and security revision data for the inactive\n+ * section of flash. Used to access version data for a pending update that has\n+ * not yet been activated.\n+ */\n+enum ice_status ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom)\n+{\n+\treturn ice_get_orom_ver_info(hw, ICE_INACTIVE_FLASH_BANK, orom);\n+}\n+\n /**\n  * ice_discover_flash_size - Discover the available flash size.\n  * @hw: pointer to the HW struct\n@@ -937,11 +982,9 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)\n \t\treturn status;\n \t}\n \n-\tstatus = ice_get_orom_ver_info(hw, &flash->orom);\n-\tif (status) {\n+\tstatus = ice_get_orom_ver_info(hw, ICE_ACTIVE_FLASH_BANK, &flash->orom);\n+\tif (status)\n \t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read Option ROM info.\\n\");\n-\t\treturn status;\n-\t}\n \n \treturn ICE_SUCCESS;\n }\ndiff --git a/drivers/net/ice/base/ice_nvm.h b/drivers/net/ice/base/ice_nvm.h\nindex 8e2eb4df1b..74fd16305a 100644\n--- a/drivers/net/ice/base/ice_nvm.h\n+++ b/drivers/net/ice/base/ice_nvm.h\n@@ -26,6 +26,17 @@\n #define ICE_NVM_REG_RW_MODULE\t0x0\n #define ICE_NVM_REG_RW_FLAGS\t0x1\n \n+#pragma pack(1)\n+struct ice_orom_civd_info {\n+\tu8 signature[4];\t/* Must match ASCII '$CIV' characters */\n+\tu8 checksum;\t\t/* Simple modulo 256 sum of all structure bytes must equal 0 */\n+\t__le32 combo_ver;\t/* Combo Image Version number */\n+\tu8 combo_name_len;\t/* Length of the unicode combo image version string, max of 32 */\n+\t__le16 combo_name[32];\t/* Unicode string representing the Combo Image version */\n+};\n+\n+#pragma pack()\n+\n #define ICE_NVM_ACCESS_MAJOR_VER\t0\n #define ICE_NVM_ACCESS_MINOR_VER\t5\n \n@@ -98,6 +109,8 @@ enum ice_status\n ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,\n \t\t       u16 module_type);\n enum ice_status\n+ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom);\n+enum ice_status\n ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);\n enum ice_status ice_init_nvm(struct ice_hw *hw);\n enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);\n",
    "prefixes": [
        "07/27"
    ]
}