Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/85077/?format=api
{ "id": 85077, "url": "http://patches.dpdk.org/api/patches/85077/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201213102056.11380-30-talshn@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201213102056.11380-30-talshn@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201213102056.11380-30-talshn@nvidia.com", "date": "2020-12-13T10:20:53", "name": "[v3,29/32] net/mlx5/windows: implement device attribute getter", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "10029a2d5cc36bfd58e27930cfac1204bc2dada1", "submitter": { "id": 1893, "url": "http://patches.dpdk.org/api/people/1893/?format=api", "name": "Tal Shnaiderman", "email": "talshn@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201213102056.11380-30-talshn@nvidia.com/mbox/", "series": [ { "id": 14276, "url": "http://patches.dpdk.org/api/series/14276/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14276", "date": "2020-12-13T10:20:24", "name": "mlx5 Windows support - part #5", "version": 3, "mbox": "http://patches.dpdk.org/series/14276/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/85077/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/85077/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E3798A04B5;\n\tSun, 13 Dec 2020 11:31:26 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 34DF3CAC9;\n\tSun, 13 Dec 2020 11:22:33 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id EDDE9C9B6\n for <dev@dpdk.org>; Sun, 13 Dec 2020 11:21:48 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n talshn@nvidia.com) with SMTP; 13 Dec 2020 12:21:44 +0200", "from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BDALe1t018562;\n Sun, 13 Dec 2020 12:21:44 +0200" ], "From": "Tal Shnaiderman <talshn@nvidia.com>", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com,\n ophirmu@nvidia.com", "Date": "Sun, 13 Dec 2020 12:20:53 +0200", "Message-Id": "<20201213102056.11380-30-talshn@nvidia.com>", "X-Mailer": "git-send-email 2.16.1.windows.4", "In-Reply-To": "<20201213102056.11380-1-talshn@nvidia.com>", "References": "<20201210150648.8784-2-talshn@nvidia.com>\n <20201213102056.11380-1-talshn@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v3 29/32] net/mlx5/windows: implement device\n\tattribute getter", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ophir Munk <ophirmu@nvidia.com>\n\nThis commit is the Windows implementation of mlx5_os_get_dev_attr() API.\nIt follows the commit in [1]. A new file named mlx5_os.c is added under\nwindows directory as its Linux counterpart file: linux/mlx5_os.c.\n\n[1].\ncommit e85f623e13ea (\"net/mlx5: remove attributes dependency on Verbs\")\n\nSigned-off-by: Ophir Munk <ophirmu@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 43 +++++++++++++++++++++\n drivers/net/mlx5/windows/meson.build | 8 ++++\n drivers/net/mlx5/windows/mlx5_os.c | 75 ++++++++++++++++++++++++++++++++++++\n 3 files changed, 126 insertions(+)\n create mode 100644 drivers/net/mlx5/windows/meson.build\n create mode 100644 drivers/net/mlx5/windows/mlx5_os.c", "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex 27a4e4f0f1..d62d2558eb 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -2217,6 +2217,49 @@ struct mlx5_ifc_cqc_bits {\n \tu8 dbr_addr[0x40];\n };\n \n+struct mlx5_ifc_health_buffer_bits {\n+\tu8 reserved_0[0x100];\n+\tu8 assert_existptr[0x20];\n+\tu8 assert_callra[0x20];\n+\tu8 reserved_1[0x40];\n+\tu8 fw_version[0x20];\n+\tu8 hw_id[0x20];\n+\tu8 reserved_2[0x20];\n+\tu8 irisc_index[0x8];\n+\tu8 synd[0x8];\n+\tu8 ext_synd[0x10];\n+};\n+\n+struct mlx5_ifc_initial_seg_bits {\n+\tu8 fw_rev_minor[0x10];\n+\tu8 fw_rev_major[0x10];\n+\tu8 cmd_interface_rev[0x10];\n+\tu8 fw_rev_subminor[0x10];\n+\tu8 reserved_0[0x40];\n+\tu8 cmdq_phy_addr_63_32[0x20];\n+\tu8 cmdq_phy_addr_31_12[0x14];\n+\tu8 reserved_1[0x2];\n+\tu8 nic_interface[0x2];\n+\tu8 log_cmdq_size[0x4];\n+\tu8 log_cmdq_stride[0x4];\n+\tu8 command_doorbell_vector[0x20];\n+\tu8 reserved_2[0xf00];\n+\tu8 initializing[0x1];\n+\tu8 nic_interface_supported[0x7];\n+\tu8 reserved_4[0x18];\n+\tstruct mlx5_ifc_health_buffer_bits health_buffer;\n+\tu8 no_dram_nic_offset[0x20];\n+\tu8 reserved_5[0x6de0];\n+\tu8 internal_timer_h[0x20];\n+\tu8 internal_timer_l[0x20];\n+\tu8 reserved_6[0x20];\n+\tu8 reserved_7[0x1f];\n+\tu8 clear_int[0x1];\n+\tu8 health_syndrome[0x8];\n+\tu8 health_counter[0x18];\n+\tu8 reserved_8[0x17fc0];\n+};\n+\n struct mlx5_ifc_create_cq_out_bits {\n \tu8 status[0x8];\n \tu8 reserved_at_8[0x18];\ndiff --git a/drivers/net/mlx5/windows/meson.build b/drivers/net/mlx5/windows/meson.build\nnew file mode 100644\nindex 0000000000..2ea0792a40\n--- /dev/null\n+++ b/drivers/net/mlx5/windows/meson.build\n@@ -0,0 +1,8 @@\n+# SPDX-License-Identifier: BSD-3-Clause\n+# Copyright 2020 Mellanox Technologies, Ltd\n+\n+includes += include_directories('.')\n+sources += files(\n+\t'mlx5_os.c',\n+)\n+\ndiff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nnew file mode 100644\nindex 0000000000..e0646670a3\n--- /dev/null\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -0,0 +1,75 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2020 Mellanox Technologies, Ltd\n+ */\n+\n+#include <errno.h>\n+#include <stdalign.h>\n+#include <stddef.h>\n+#include <stdint.h>\n+#include <stdlib.h>\n+\n+#include <rte_windows.h>\n+\n+#include <mlx5_glue.h>\n+#include <mlx5_devx_cmds.h>\n+#include <mlx5_common.h>\n+\n+#include \"mlx5_defs.h\"\n+#include \"mlx5.h\"\n+#include \"mlx5_autoconf.h\"\n+\n+/**\n+ * Get mlx5 device attributes.\n+ *\n+ * @param ctx\n+ * Pointer to device context.\n+ *\n+ * @param device_attr\n+ * Pointer to mlx5 device attributes.\n+ *\n+ * @return\n+ * 0 on success, non zero error number otherwise\n+ */\n+int\n+mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)\n+{\n+\tstruct mlx5_context *mlx5_ctx;\n+\tstruct mlx5_hca_attr hca_attr;\n+\tvoid *pv_iseg = NULL;\n+\tu32 cb_iseg = 0;\n+\tint err = 0;\n+\n+\tif (!ctx)\n+\t\treturn -EINVAL;\n+\tmlx5_ctx = (struct mlx5_context *)ctx;\n+\tmemset(device_attr, 0, sizeof(*device_attr));\n+\terr = mlx5_devx_cmd_query_hca_attr(mlx5_ctx, &hca_attr);\n+\tif (err) {\n+\t\tDRV_LOG(ERR, \"Failed to get device hca_cap\");\n+\t\treturn err;\n+\t}\n+\tdevice_attr->max_cq = 1 << hca_attr.log_max_cq;\n+\tdevice_attr->max_qp = 1 << hca_attr.log_max_qp;\n+\tdevice_attr->max_qp_wr = 1 << hca_attr.log_max_qp_sz;\n+\tdevice_attr->max_cqe = 1 << hca_attr.log_max_cq_sz;\n+\tdevice_attr->max_mr = 1 << hca_attr.log_max_mrw_sz;\n+\tdevice_attr->max_pd = 1 << hca_attr.log_max_pd;\n+\tdevice_attr->max_srq = 1 << hca_attr.log_max_srq;\n+\tdevice_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz;\n+\tif (hca_attr.rss_ind_tbl_cap) {\n+\t\tdevice_attr->max_rwq_indirection_table_size =\n+\t\t\t1 << hca_attr.rss_ind_tbl_cap;\n+\t}\n+\tpv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg);\n+\tif (pv_iseg == NULL) {\n+\t\tDRV_LOG(ERR, \"Failed to get device hca_iseg\");\n+\t\treturn errno;\n+\t}\n+\tif (!err) {\n+\t\tsnprintf(device_attr->fw_ver, 64, \"%x.%x.%04x\",\n+\t\t\tMLX5_GET(initial_seg, pv_iseg, fw_rev_major),\n+\t\t\tMLX5_GET(initial_seg, pv_iseg, fw_rev_minor),\n+\t\t\tMLX5_GET(initial_seg, pv_iseg, fw_rev_subminor));\n+\t}\n+\treturn err;\n+}\n", "prefixes": [ "v3", "29/32" ] }