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GET /api/patches/84032/?format=api
{ "id": 84032, "url": "http://patches.dpdk.org/api/patches/84032/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1605126422-522-1-git-send-email-timothy.mcdaniel@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1605126422-522-1-git-send-email-timothy.mcdaniel@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1605126422-522-1-git-send-email-timothy.mcdaniel@intel.com", "date": "2020-11-11T20:26:59", "name": "event/dlb2: add missing delayed token pop logic", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "95d320fcb0bb90e4e3a1812ce8c525c890db160a", "submitter": { "id": 826, "url": "http://patches.dpdk.org/api/people/826/?format=api", "name": "Timothy McDaniel", "email": "timothy.mcdaniel@intel.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1605126422-522-1-git-send-email-timothy.mcdaniel@intel.com/mbox/", "series": [ { "id": 13818, "url": "http://patches.dpdk.org/api/series/13818/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13818", "date": "2020-11-11T20:26:59", "name": "event/dlb2: add missing delayed token pop logic", "version": 1, "mbox": "http://patches.dpdk.org/series/13818/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/84032/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/84032/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6DA66A09D9;\n\tWed, 11 Nov 2020 21:25:56 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 29C56593A;\n\tWed, 11 Nov 2020 21:25:38 +0100 (CET)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by dpdk.org (Postfix) with ESMTP id 7B2BD592B\n for <dev@dpdk.org>; Wed, 11 Nov 2020 21:25:35 +0100 (CET)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Nov 2020 12:25:32 -0800", "from txasoft-yocto.an.intel.com ([10.123.72.192])\n by fmsmga005.fm.intel.com with ESMTP; 11 Nov 2020 12:25:28 -0800" ], "IronPort-SDR": [ "\n BG1IyqwLyPom/S+4GeE4YQGYWyvDvsxZBYEdH4PlZKr9i9HaJbPcmINIaURSktxXN4oZt2Cdi5\n mmio4OML29uA==", "\n /VN7T/IdzWTs22tYqapp/e1IdBzC8rPxD5IwRw3UeDdbhKb68Y2LKLj5fn/Cj1CUCJQQHjF+nS\n vlzgljrmx5nA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9802\"; a=\"167627802\"", "E=Sophos;i=\"5.77,470,1596524400\"; d=\"scan'208\";a=\"167627802\"", "E=Sophos;i=\"5.77,470,1596524400\"; d=\"scan'208\";a=\"531855293\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Timothy McDaniel <timothy.mcdaniel@intel.com>", "To": "", "Cc": "dev@dpdk.org, erik.g.carrillo@intel.com, gage.eads@intel.com,\n harry.van.haaren@intel.com, jerinj@marvell.com, thomas@monjalon.net,\n david.marchand@redhat.com", "Date": "Wed, 11 Nov 2020 14:26:59 -0600", "Message-Id": "<1605126422-522-1-git-send-email-timothy.mcdaniel@intel.com>", "X-Mailer": "git-send-email 1.7.10", "Subject": "[dpdk-dev] [PATCH] event/dlb2: add missing delayed token pop logic", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The code contained in this commit was inadvertently omitted\nwhen dissecting the dlb2 code base into discrete patches for\nupstream.\n\nSigned-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>\n---\n drivers/event/dlb2/dlb2.c | 314 +++++++++++++++++++++++--------------\n drivers/event/dlb2/dlb2_selftest.c | 4 +-\n 2 files changed, 201 insertions(+), 117 deletions(-)", "diff": "diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c\nindex d42e48b..8672486 100644\n--- a/drivers/event/dlb2/dlb2.c\n+++ b/drivers/event/dlb2/dlb2.c\n@@ -1082,6 +1082,25 @@ dlb2_init_qe_mem(struct dlb2_port *qm_port, char *mz_name)\n \treturn ret;\n }\n \n+static inline uint16_t\n+dlb2_event_enqueue_delayed(void *event_port,\n+\t\t\t const struct rte_event events[]);\n+\n+static inline uint16_t\n+dlb2_event_enqueue_burst_delayed(void *event_port,\n+\t\t\t\t const struct rte_event events[],\n+\t\t\t\t uint16_t num);\n+\n+static inline uint16_t\n+dlb2_event_enqueue_new_burst_delayed(void *event_port,\n+\t\t\t\t const struct rte_event events[],\n+\t\t\t\t uint16_t num);\n+\n+static inline uint16_t\n+dlb2_event_enqueue_forward_burst_delayed(void *event_port,\n+\t\t\t\t\t const struct rte_event events[],\n+\t\t\t\t\t uint16_t num);\n+\n static int\n dlb2_hw_create_ldb_port(struct dlb2_eventdev *dlb2,\n \t\t\tstruct dlb2_eventdev_port *ev_port,\n@@ -1198,6 +1217,20 @@ dlb2_hw_create_ldb_port(struct dlb2_eventdev *dlb2,\n \n \tqm_port->dequeue_depth = dequeue_depth;\n \tqm_port->token_pop_thresh = dequeue_depth;\n+\n+\t/* The default enqueue functions do not include delayed-pop support for\n+\t * performance reasons.\n+\t */\n+\tif (qm_port->token_pop_mode == DELAYED_POP) {\n+\t\tdlb2->event_dev->enqueue = dlb2_event_enqueue_delayed;\n+\t\tdlb2->event_dev->enqueue_burst =\n+\t\t\tdlb2_event_enqueue_burst_delayed;\n+\t\tdlb2->event_dev->enqueue_new_burst =\n+\t\t\tdlb2_event_enqueue_new_burst_delayed;\n+\t\tdlb2->event_dev->enqueue_forward_burst =\n+\t\t\tdlb2_event_enqueue_forward_burst_delayed;\n+\t}\n+\n \tqm_port->owed_tokens = 0;\n \tqm_port->issued_releases = 0;\n \n@@ -2427,11 +2460,6 @@ dlb2_event_build_hcws(struct dlb2_port *qm_port,\n \tcase 3:\n \tcase 2:\n \tcase 1:\n-\t\t/* At least one QE will be valid, so only zero out three */\n-\t\tqe[1].cmd_byte = 0;\n-\t\tqe[2].cmd_byte = 0;\n-\t\tqe[3].cmd_byte = 0;\n-\n \t\tfor (i = 0; i < num; i++) {\n \t\t\tqe[i].cmd_byte =\n \t\t\t\tcmd_byte_map[qm_port->is_directed][ev[i].op];\n@@ -2452,6 +2480,8 @@ dlb2_event_build_hcws(struct dlb2_port *qm_port,\n \t\t\tqe[i].u.event_type.sub = ev[i].sub_event_type;\n \t\t}\n \t\tbreak;\n+\tcase 0:\n+\t\tbreak;\n \t}\n }\n \n@@ -2578,29 +2608,57 @@ dlb2_event_enqueue_prep(struct dlb2_eventdev_port *ev_port,\n }\n \n static inline uint16_t\n-dlb2_event_enqueue_burst(void *event_port,\n-\t\t\t const struct rte_event events[],\n-\t\t\t uint16_t num)\n+__dlb2_event_enqueue_burst(void *event_port,\n+\t\t\t const struct rte_event events[],\n+\t\t\t uint16_t num,\n+\t\t\t bool use_delayed)\n {\n \tstruct dlb2_eventdev_port *ev_port = event_port;\n \tstruct dlb2_port *qm_port = &ev_port->qm_port;\n \tstruct process_local_port_data *port_data;\n-\tint i, cnt;\n+\tint i;\n \n \tRTE_ASSERT(ev_port->enq_configured);\n \tRTE_ASSERT(events != NULL);\n \n-\tcnt = 0;\n+\ti = 0;\n \n \tport_data = &dlb2_port[qm_port->id][PORT_TYPE(qm_port)];\n \n-\tfor (i = 0; i < num; i += DLB2_NUM_QES_PER_CACHE_LINE) {\n+\twhile (i < num) {\n \t\tuint8_t sched_types[DLB2_NUM_QES_PER_CACHE_LINE];\n \t\tuint8_t queue_ids[DLB2_NUM_QES_PER_CACHE_LINE];\n+\t\tint pop_offs = 0;\n \t\tint j = 0;\n \n+\t\tmemset(qm_port->qe4,\n+\t\t 0,\n+\t\t DLB2_NUM_QES_PER_CACHE_LINE *\n+\t\t sizeof(struct dlb2_enqueue_qe));\n+\n \t\tfor (; j < DLB2_NUM_QES_PER_CACHE_LINE && (i + j) < num; j++) {\n \t\t\tconst struct rte_event *ev = &events[i + j];\n+\t\t\tint16_t thresh = qm_port->token_pop_thresh;\n+\n+\t\t\tif (use_delayed &&\n+\t\t\t qm_port->token_pop_mode == DELAYED_POP &&\n+\t\t\t (ev->op == RTE_EVENT_OP_FORWARD ||\n+\t\t\t ev->op == RTE_EVENT_OP_RELEASE) &&\n+\t\t\t qm_port->issued_releases >= thresh - 1) {\n+\t\t\t\t/* Insert the token pop QE and break out. This\n+\t\t\t\t * may result in a partial HCW, but that is\n+\t\t\t\t * simpler than supporting arbitrary QE\n+\t\t\t\t * insertion.\n+\t\t\t\t */\n+\t\t\t\tdlb2_construct_token_pop_qe(qm_port, j);\n+\n+\t\t\t\t/* Reset the releases for the next QE batch */\n+\t\t\t\tqm_port->issued_releases -= thresh;\n+\n+\t\t\t\tpop_offs = 1;\n+\t\t\t\tj++;\n+\t\t\t\tbreak;\n+\t\t\t}\n \n \t\t\tif (dlb2_event_enqueue_prep(ev_port, qm_port, ev,\n \t\t\t\t\t\t &sched_types[j],\n@@ -2611,38 +2669,52 @@ dlb2_event_enqueue_burst(void *event_port,\n \t\tif (j == 0)\n \t\t\tbreak;\n \n-\t\tdlb2_event_build_hcws(qm_port, &events[i], j,\n+\t\tdlb2_event_build_hcws(qm_port, &events[i], j - pop_offs,\n \t\t\t\t sched_types, queue_ids);\n \n-\t\tif (qm_port->token_pop_mode == DELAYED_POP && j < 4 &&\n-\t\t qm_port->issued_releases >= qm_port->token_pop_thresh - 1) {\n-\t\t\tdlb2_construct_token_pop_qe(qm_port, j);\n-\n-\t\t\t/* Reset the releases counter for the next QE batch */\n-\t\t\tqm_port->issued_releases -= qm_port->token_pop_thresh;\n-\t\t}\n-\n \t\tdlb2_hw_do_enqueue(qm_port, i == 0, port_data);\n \n-\t\tcnt += j;\n+\t\t/* Don't include the token pop QE in the enqueue count */\n+\t\ti += j - pop_offs;\n \n-\t\tif (j < DLB2_NUM_QES_PER_CACHE_LINE)\n+\t\t/* Don't interpret j < DLB2_NUM_... as out-of-credits if\n+\t\t * pop_offs != 0\n+\t\t */\n+\t\tif (j < DLB2_NUM_QES_PER_CACHE_LINE && pop_offs == 0)\n \t\t\tbreak;\n \t}\n \n-\tif (qm_port->token_pop_mode == DELAYED_POP &&\n-\t qm_port->issued_releases >= qm_port->token_pop_thresh - 1) {\n-\t\tdlb2_consume_qe_immediate(qm_port, qm_port->owed_tokens);\n-\t\tqm_port->issued_releases -= qm_port->token_pop_thresh;\n-\t}\n-\treturn cnt;\n+\treturn i;\n+}\n+\n+static uint16_t\n+dlb2_event_enqueue_burst(void *event_port,\n+\t\t\t const struct rte_event events[],\n+\t\t\t uint16_t num)\n+{\n+\treturn __dlb2_event_enqueue_burst(event_port, events, num, false);\n+}\n+\n+static uint16_t\n+dlb2_event_enqueue_burst_delayed(void *event_port,\n+\t\t\t\t const struct rte_event events[],\n+\t\t\t\t uint16_t num)\n+{\n+\treturn __dlb2_event_enqueue_burst(event_port, events, num, true);\n }\n \n static inline uint16_t\n dlb2_event_enqueue(void *event_port,\n \t\t const struct rte_event events[])\n {\n-\treturn dlb2_event_enqueue_burst(event_port, events, 1);\n+\treturn __dlb2_event_enqueue_burst(event_port, events, 1, false);\n+}\n+\n+static inline uint16_t\n+dlb2_event_enqueue_delayed(void *event_port,\n+\t\t\t const struct rte_event events[])\n+{\n+\treturn __dlb2_event_enqueue_burst(event_port, events, 1, true);\n }\n \n static uint16_t\n@@ -2650,7 +2722,15 @@ dlb2_event_enqueue_new_burst(void *event_port,\n \t\t\t const struct rte_event events[],\n \t\t\t uint16_t num)\n {\n-\treturn dlb2_event_enqueue_burst(event_port, events, num);\n+\treturn __dlb2_event_enqueue_burst(event_port, events, num, false);\n+}\n+\n+static uint16_t\n+dlb2_event_enqueue_new_burst_delayed(void *event_port,\n+\t\t\t\t const struct rte_event events[],\n+\t\t\t\t uint16_t num)\n+{\n+\treturn __dlb2_event_enqueue_burst(event_port, events, num, true);\n }\n \n static uint16_t\n@@ -2658,7 +2738,93 @@ dlb2_event_enqueue_forward_burst(void *event_port,\n \t\t\t\t const struct rte_event events[],\n \t\t\t\t uint16_t num)\n {\n-\treturn dlb2_event_enqueue_burst(event_port, events, num);\n+\treturn __dlb2_event_enqueue_burst(event_port, events, num, false);\n+}\n+\n+static uint16_t\n+dlb2_event_enqueue_forward_burst_delayed(void *event_port,\n+\t\t\t\t\t const struct rte_event events[],\n+\t\t\t\t\t uint16_t num)\n+{\n+\treturn __dlb2_event_enqueue_burst(event_port, events, num, true);\n+}\n+\n+static void\n+dlb2_event_release(struct dlb2_eventdev *dlb2,\n+\t\t uint8_t port_id,\n+\t\t int n)\n+{\n+\tstruct process_local_port_data *port_data;\n+\tstruct dlb2_eventdev_port *ev_port;\n+\tstruct dlb2_port *qm_port;\n+\tint i;\n+\n+\tif (port_id > dlb2->num_ports) {\n+\t\tDLB2_LOG_ERR(\"Invalid port id %d in dlb2-event_release\\n\",\n+\t\t\t port_id);\n+\t\trte_errno = -EINVAL;\n+\t\treturn;\n+\t}\n+\n+\tev_port = &dlb2->ev_ports[port_id];\n+\tqm_port = &ev_port->qm_port;\n+\tport_data = &dlb2_port[qm_port->id][PORT_TYPE(qm_port)];\n+\n+\ti = 0;\n+\n+\tif (qm_port->is_directed) {\n+\t\ti = n;\n+\t\tgoto sw_credit_update;\n+\t}\n+\n+\twhile (i < n) {\n+\t\tint pop_offs = 0;\n+\t\tint j = 0;\n+\n+\t\t/* Zero-out QEs */\n+\t\tqm_port->qe4[0].cmd_byte = 0;\n+\t\tqm_port->qe4[1].cmd_byte = 0;\n+\t\tqm_port->qe4[2].cmd_byte = 0;\n+\t\tqm_port->qe4[3].cmd_byte = 0;\n+\n+\t\tfor (; j < DLB2_NUM_QES_PER_CACHE_LINE && (i + j) < n; j++) {\n+\t\t\tint16_t thresh = qm_port->token_pop_thresh;\n+\n+\t\t\tif (qm_port->token_pop_mode == DELAYED_POP &&\n+\t\t\t qm_port->issued_releases >= thresh - 1) {\n+\t\t\t\t/* Insert the token pop QE */\n+\t\t\t\tdlb2_construct_token_pop_qe(qm_port, j);\n+\n+\t\t\t\t/* Reset the releases for the next QE batch */\n+\t\t\t\tqm_port->issued_releases -= thresh;\n+\n+\t\t\t\tpop_offs = 1;\n+\t\t\t\tj++;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\n+\t\t\tqm_port->qe4[j].cmd_byte = DLB2_COMP_CMD_BYTE;\n+\t\t\tqm_port->issued_releases++;\n+\t\t}\n+\n+\t\tdlb2_hw_do_enqueue(qm_port, i == 0, port_data);\n+\n+\t\t/* Don't include the token pop QE in the release count */\n+\t\ti += j - pop_offs;\n+\t}\n+\n+sw_credit_update:\n+\t/* each release returns one credit */\n+\tif (!ev_port->outstanding_releases) {\n+\t\tDLB2_LOG_ERR(\"%s: Outstanding releases underflowed.\\n\",\n+\t\t\t __func__);\n+\t\treturn;\n+\t}\n+\tev_port->outstanding_releases -= i;\n+\tev_port->inflight_credits += i;\n+\n+\t/* Replenish s/w credits if enough releases are performed */\n+\tdlb2_replenish_sw_credits(dlb2, ev_port);\n }\n \n static inline void\n@@ -3067,86 +3233,6 @@ dlb2_inc_cq_idx(struct dlb2_port *qm_port, int cnt)\n \tqm_port->gen_bit = (~(idx >> qm_port->gen_bit_shift)) & 0x1;\n }\n \n-static int\n-dlb2_event_release(struct dlb2_eventdev *dlb2,\n-\t\t uint8_t port_id,\n-\t\t int n)\n-{\n-\tstruct process_local_port_data *port_data;\n-\tstruct dlb2_eventdev_port *ev_port;\n-\tstruct dlb2_port *qm_port;\n-\tint i, cnt;\n-\n-\tif (port_id > dlb2->num_ports) {\n-\t\tDLB2_LOG_ERR(\"Invalid port id %d in dlb2-event_release\\n\",\n-\t\t\t port_id);\n-\t\trte_errno = -EINVAL;\n-\t\treturn rte_errno;\n-\t}\n-\n-\tev_port = &dlb2->ev_ports[port_id];\n-\tqm_port = &ev_port->qm_port;\n-\tport_data = &dlb2_port[qm_port->id][PORT_TYPE(qm_port)];\n-\n-\tcnt = 0;\n-\n-\tif (qm_port->is_directed) {\n-\t\tcnt = n;\n-\t\tgoto sw_credit_update;\n-\t}\n-\n-\tfor (i = 0; i < n; i += DLB2_NUM_QES_PER_CACHE_LINE) {\n-\t\tint j;\n-\n-\t\t/* Zero-out QEs */\n-\t\tqm_port->qe4[0].cmd_byte = 0;\n-\t\tqm_port->qe4[1].cmd_byte = 0;\n-\t\tqm_port->qe4[2].cmd_byte = 0;\n-\t\tqm_port->qe4[3].cmd_byte = 0;\n-\n-\t\tfor (j = 0; j < DLB2_NUM_QES_PER_CACHE_LINE && (i + j) < n; j++)\n-\t\t\tqm_port->qe4[j].cmd_byte = DLB2_COMP_CMD_BYTE;\n-\n-\t\tqm_port->issued_releases += j;\n-\n-\t\tif (j == 0)\n-\t\t\tbreak;\n-\n-\t\tif (qm_port->token_pop_mode == DELAYED_POP && j < 4 &&\n-\t\t qm_port->issued_releases >= qm_port->token_pop_thresh - 1) {\n-\t\t\tdlb2_construct_token_pop_qe(qm_port, j);\n-\n-\t\t\t/* Reset the releases counter for the next QE batch */\n-\t\t\tqm_port->issued_releases -= qm_port->token_pop_thresh;\n-\t\t}\n-\n-\t\tdlb2_hw_do_enqueue(qm_port, i == 0, port_data);\n-\n-\t\tcnt += j;\n-\t}\n-\n-\tif (qm_port->token_pop_mode == DELAYED_POP &&\n-\t qm_port->issued_releases >= qm_port->token_pop_thresh - 1) {\n-\t\tdlb2_consume_qe_immediate(qm_port, qm_port->owed_tokens);\n-\t\tqm_port->issued_releases -= qm_port->token_pop_thresh;\n-\t}\n-\n-sw_credit_update:\n-\t/* each release returns one credit */\n-\tif (!ev_port->outstanding_releases) {\n-\t\tDLB2_LOG_ERR(\"Unrecoverable application error. Outstanding releases underflowed.\\n\");\n-\t\trte_errno = -ENOTRECOVERABLE;\n-\t\treturn rte_errno;\n-\t}\n-\n-\tev_port->outstanding_releases -= cnt;\n-\tev_port->inflight_credits += cnt;\n-\n-\t/* Replenish s/w credits if enough releases are performed */\n-\tdlb2_replenish_sw_credits(dlb2, ev_port);\n-\treturn 0;\n-}\n-\n static inline int16_t\n dlb2_hw_dequeue_sparse(struct dlb2_eventdev *dlb2,\n \t\t struct dlb2_eventdev_port *ev_port,\n@@ -3367,8 +3453,7 @@ dlb2_event_dequeue_burst(void *event_port, struct rte_event *ev, uint16_t num,\n \tif (ev_port->implicit_release && ev_port->outstanding_releases > 0) {\n \t\tuint16_t out_rels = ev_port->outstanding_releases;\n \n-\t\tif (dlb2_event_release(dlb2, ev_port->id, out_rels))\n-\t\t\treturn 0; /* rte_errno is set */\n+\t\tdlb2_event_release(dlb2, ev_port->id, out_rels);\n \n \t\tDLB2_INC_STAT(ev_port->stats.tx_implicit_rel, out_rels);\n \t}\n@@ -3405,8 +3490,7 @@ dlb2_event_dequeue_burst_sparse(void *event_port, struct rte_event *ev,\n \tif (ev_port->implicit_release && ev_port->outstanding_releases > 0) {\n \t\tuint16_t out_rels = ev_port->outstanding_releases;\n \n-\t\tif (dlb2_event_release(dlb2, ev_port->id, out_rels))\n-\t\t\treturn 0; /* rte_errno is set */\n+\t\tdlb2_event_release(dlb2, ev_port->id, out_rels);\n \n \t\tDLB2_INC_STAT(ev_port->stats.tx_implicit_rel, out_rels);\n \t}\ndiff --git a/drivers/event/dlb2/dlb2_selftest.c b/drivers/event/dlb2/dlb2_selftest.c\nindex f433654..5cf66c5 100644\n--- a/drivers/event/dlb2/dlb2_selftest.c\n+++ b/drivers/event/dlb2/dlb2_selftest.c\n@@ -1320,7 +1320,7 @@ test_delayed_pop(void)\n \t\t}\n \t}\n \n-\t/* Dequeue dequeue_depth events but only release dequeue_depth - 2.\n+\t/* Dequeue dequeue_depth events but only release dequeue_depth - 1.\n \t * Delayed pop won't perform the pop and no more events will be\n \t * scheduled.\n \t */\n@@ -1336,7 +1336,7 @@ test_delayed_pop(void)\n \n \tev.op = RTE_EVENT_OP_RELEASE;\n \n-\tfor (i = 0; i < port_conf.dequeue_depth - 2; i++) {\n+\tfor (i = 0; i < port_conf.dequeue_depth - 1; i++) {\n \t\tif (rte_event_enqueue_burst(evdev, 0, &ev, 1) != 1) {\n \t\t\tprintf(\"%d: RELEASE enqueue expected to succeed\\n\",\n \t\t\t __LINE__);\n", "prefixes": [] }