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GET /api/patches/84031/?format=api
{ "id": 84031, "url": "http://patches.dpdk.org/api/patches/84031/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1605126422-522-2-git-send-email-timothy.mcdaniel@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1605126422-522-2-git-send-email-timothy.mcdaniel@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1605126422-522-2-git-send-email-timothy.mcdaniel@intel.com", "date": "2020-11-11T20:27:00", "name": "event/dlb2: remove duplicate/unused PCI code and constants", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "405825a5c1ae455076f46714c0d432e9f558afdb", "submitter": { "id": 826, "url": "http://patches.dpdk.org/api/people/826/?format=api", "name": "Timothy McDaniel", "email": "timothy.mcdaniel@intel.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1605126422-522-2-git-send-email-timothy.mcdaniel@intel.com/mbox/", "series": [ { "id": 13817, "url": "http://patches.dpdk.org/api/series/13817/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13817", "date": "2020-11-11T20:27:00", "name": "event/dlb2: remove duplicate/unused PCI code and constants", "version": 1, "mbox": "http://patches.dpdk.org/series/13817/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/84031/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/84031/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F422DA09D9;\n\tWed, 11 Nov 2020 21:25:37 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4CF685913;\n\tWed, 11 Nov 2020 21:25:36 +0100 (CET)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by dpdk.org (Postfix) with ESMTP id D567C493D\n for <dev@dpdk.org>; Wed, 11 Nov 2020 21:25:34 +0100 (CET)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Nov 2020 12:25:32 -0800", "from txasoft-yocto.an.intel.com ([10.123.72.192])\n by fmsmga005.fm.intel.com with ESMTP; 11 Nov 2020 12:25:29 -0800" ], "IronPort-SDR": [ "\n Xigf36a7R5P42RRmFYnT1Muq+lNEVasa7vIHDMoEMjYWUVvh7SfBzJZfG0YcszlBFv6vIijjOP\n 69GIDOp5+TUw==", "\n 324pu8Ttc/C1WpJP4MBiHx9EOFysBJOcdWcka/xVnlUmP9/KHc+oqxR4wRtxRAGMYCCCpHsjXO\n u9DOt9Z15ypg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9802\"; a=\"167627803\"", "E=Sophos;i=\"5.77,470,1596524400\"; d=\"scan'208\";a=\"167627803\"", "E=Sophos;i=\"5.77,470,1596524400\"; d=\"scan'208\";a=\"531855315\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Timothy McDaniel <timothy.mcdaniel@intel.com>", "To": "", "Cc": "dev@dpdk.org, erik.g.carrillo@intel.com, gage.eads@intel.com,\n harry.van.haaren@intel.com, jerinj@marvell.com, thomas@monjalon.net,\n david.marchand@redhat.com", "Date": "Wed, 11 Nov 2020 14:27:00 -0600", "Message-Id": "<1605126422-522-2-git-send-email-timothy.mcdaniel@intel.com>", "X-Mailer": "git-send-email 1.7.10", "In-Reply-To": "<1605126422-522-1-git-send-email-timothy.mcdaniel@intel.com>", "References": "<1605126422-522-1-git-send-email-timothy.mcdaniel@intel.com>", "Subject": "[dpdk-dev] [PATCH] event/dlb2: remove duplicate/unused PCI code and\n\tconstants", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Use rte_pci_find_ext_capability instead of private version,\nRemove unused PCI offsets and values\nUse PCI definitions from rte_pci.h, where available.\n\nSigned-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>\n---\n drivers/event/dlb2/pf/dlb2_main.c | 46 ++++++---------------------------------\n 1 file changed, 7 insertions(+), 39 deletions(-)", "diff": "diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c\nindex 06b6aee..a9d407f 100644\n--- a/drivers/event/dlb2/pf/dlb2_main.c\n+++ b/drivers/event/dlb2/pf/dlb2_main.c\n@@ -26,17 +26,10 @@\n #define NO_OWNER_VF 0\t/* PF ONLY! */\n #define NOT_VF_REQ false /* PF ONLY! */\n \n-#define DLB2_PCI_CFG_SPACE_SIZE 256\n #define DLB2_PCI_CAP_POINTER 0x34\n #define DLB2_PCI_CAP_NEXT(hdr) (((hdr) >> 8) & 0xFC)\n #define DLB2_PCI_CAP_ID(hdr) ((hdr) & 0xFF)\n-#define DLB2_PCI_EXT_CAP_NEXT(hdr) (((hdr) >> 20) & 0xFFC)\n-#define DLB2_PCI_EXT_CAP_ID(hdr) ((hdr) & 0xFFFF)\n-#define DLB2_PCI_EXT_CAP_ID_ERR 1\n-#define DLB2_PCI_ERR_UNCOR_MASK 8\n-#define DLB2_PCI_ERR_UNC_UNSUP 0x00100000\n \n-#define DLB2_PCI_EXP_DEVCTL 8\n #define DLB2_PCI_LNKCTL 16\n #define DLB2_PCI_SLTCTL 24\n #define DLB2_PCI_RTCTL 28\n@@ -44,14 +37,12 @@\n #define DLB2_PCI_LNKCTL2 48\n #define DLB2_PCI_SLTCTL2 56\n #define DLB2_PCI_CMD 4\n-#define DLB2_PCI_X_CMD 2\n #define DLB2_PCI_EXP_DEVSTA 10\n #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20\n #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000\n \n #define DLB2_PCI_CAP_ID_EXP 0x10\n #define DLB2_PCI_CAP_ID_MSIX 0x11\n-#define DLB2_PCI_EXT_CAP_ID_PAS 0x1B\n #define DLB2_PCI_EXT_CAP_ID_PRI 0x13\n #define DLB2_PCI_EXT_CAP_ID_ACS 0xD\n \n@@ -73,29 +64,6 @@\n #define DLB2_PCI_ACS_UF 0x10\n #define DLB2_PCI_ACS_EC 0x20\n \n-static int\n-dlb2_pci_find_ext_capability(struct rte_pci_device *pdev, uint32_t id)\n-{\n-\tuint32_t hdr;\n-\tsize_t sz;\n-\tint pos;\n-\n-\tpos = DLB2_PCI_CFG_SPACE_SIZE;\n-\tsz = sizeof(hdr);\n-\n-\twhile (pos > 0xFF) {\n-\t\tif (rte_pci_read_config(pdev, &hdr, sz, pos) != (int)sz)\n-\t\t\treturn -1;\n-\n-\t\tif (DLB2_PCI_EXT_CAP_ID(hdr) == id)\n-\t\t\treturn pos;\n-\n-\t\tpos = DLB2_PCI_EXT_CAP_NEXT(hdr);\n-\t}\n-\n-\treturn -1;\n-}\n-\n static int dlb2_pci_find_capability(struct rte_pci_device *pdev, uint32_t id)\n {\n \tuint8_t pos;\n@@ -299,7 +267,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \t\treturn pcie_cap_offset;\n \t}\n \n-\toff = pcie_cap_offset + DLB2_PCI_EXP_DEVCTL;\n+\toff = pcie_cap_offset + RTE_PCI_EXP_DEVCTL;\n \tif (rte_pci_read_config(pdev, &dev_ctl_word, 2, off) != 2)\n \t\tdev_ctl_word = 0;\n \n@@ -328,7 +296,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \t\tslt_word2 = 0;\n \n \toff = DLB2_PCI_EXT_CAP_ID_PRI;\n-\tpri_cap_offset = dlb2_pci_find_ext_capability(pdev, off);\n+\tpri_cap_offset = rte_pci_find_ext_capability(pdev, off);\n \n \tif (pri_cap_offset >= 0) {\n \t\toff = pri_cap_offset + DLB2_PCI_PRI_ALLOC_REQ;\n@@ -371,7 +339,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \t\treturn -1;\n \t}\n \n-\toff = pcie_cap_offset + DLB2_PCI_EXP_DEVCTL;\n+\toff = pcie_cap_offset + RTE_PCI_EXP_DEVCTL;\n \tret = rte_pci_read_config(pdev, &devctl_word, 2, off);\n \tif (ret != 2) {\n \t\tDLB2_LOG_ERR(\"[%s()] failed to read the pcie device control\\n\",\n@@ -393,7 +361,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \t/* Restore PCI config state */\n \n \tif (pcie_cap_offset >= 0) {\n-\t\toff = pcie_cap_offset + DLB2_PCI_EXP_DEVCTL;\n+\t\toff = pcie_cap_offset + RTE_PCI_EXP_DEVCTL;\n \t\tret = rte_pci_write_config(pdev, &dev_ctl_word, 2, off);\n \t\tif (ret != 2) {\n \t\t\tDLB2_LOG_ERR(\"[%s()] failed to write the pcie device control at offset %d\\n\",\n@@ -470,8 +438,8 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \t\t}\n \t}\n \n-\toff = DLB2_PCI_EXT_CAP_ID_ERR;\n-\terr_cap_offset = dlb2_pci_find_ext_capability(pdev, off);\n+\toff = RTE_PCI_EXT_CAP_ID_ERR;\n+\terr_cap_offset = rte_pci_find_ext_capability(pdev, off);\n \n \tif (err_cap_offset >= 0) {\n \t\tuint32_t tmp;\n@@ -556,7 +524,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)\n \t}\n \n \toff = DLB2_PCI_EXT_CAP_ID_ACS;\n-\tacs_cap_offset = dlb2_pci_find_ext_capability(pdev, off);\n+\tacs_cap_offset = rte_pci_find_ext_capability(pdev, off);\n \n \tif (acs_cap_offset >= 0) {\n \t\tuint16_t acs_cap, acs_ctrl, acs_mask;\n", "prefixes": [] }